From c9a41f515d1e5955c44cb04926f5f5f4be4a0cd0 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Tue, 15 Aug 2017 11:54:19 +0100 Subject: ARM: dts: iwg22m: Add iWave RZG1E SODIMM SOM Add support for iWave RZG1E SODIMM System On Module. http://www.iwavesystems.com/rz-g1e-sodimm-module.html Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 arch/arm/boot/dts/r8a7745-iwg22m.dtsi (limited to 'arch/arm/boot/dts/r8a7745-iwg22m.dtsi') diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi new file mode 100644 index 000000000000..9dbd854aacf8 --- /dev/null +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi @@ -0,0 +1,24 @@ +/* + * Device Tree Source for the iWave-RZG1E-G22M SODIMM SOM + * + * Copyright (C) 2017 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include "r8a7745.dtsi" + +/ { + compatible = "iwave,g22m", "renesas,r8a7745"; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0x20000000>; + }; +}; + +&extal_clk { + clock-frequency = <20000000>; +}; -- cgit From 3350ed907182049b806992f228021e7997183dda Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Thu, 17 Aug 2017 18:31:43 +0100 Subject: ARM: dts: iwg22m: Add eMMC support Add eMMC support for iW-RainboW-G22M-SM. Signed-off-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm/boot/dts/r8a7745-iwg22m.dtsi') diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi index 9dbd854aacf8..afb1148baa2f 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi @@ -17,8 +17,34 @@ device_type = "memory"; reg = <0 0x40000000 0 0x20000000>; }; + + reg_3p3v: 3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; }; &extal_clk { clock-frequency = <20000000>; }; + +&pfc { + mmcif0_pins: mmc { + groups = "mmc_data8", "mmc_ctrl"; + function = "mmc"; + }; +}; + +&mmcif0 { + pinctrl-0 = <&mmcif0_pins>; + pinctrl-names = "default"; + + vmmc-supply = <®_3p3v>; + bus-width = <8>; + non-removable; + status = "okay"; +}; -- cgit From a7b8f48d2fa14330a1886f7fd640187c8b4470c5 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Tue, 22 Aug 2017 19:22:46 +0100 Subject: ARM: dts: iwg22m: Add RTC support Add support for the bq32000 RTC to the iwg22m device tree. Signed-off-by: Fabrizio Castro Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch/arm/boot/dts/r8a7745-iwg22m.dtsi') diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi index afb1148baa2f..e306e7c5b644 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi @@ -37,6 +37,11 @@ groups = "mmc_data8", "mmc_ctrl"; function = "mmc"; }; + + i2c3_pins: i2c3 { + groups = "i2c3_b"; + function = "i2c3"; + }; }; &mmcif0 { @@ -48,3 +53,16 @@ non-removable; status = "okay"; }; + +&i2c3 { + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + rtc@68 { + compatible = "ti,bq32000"; + reg = <0x68>; + }; +}; -- cgit From 599114ee21057040c058043fdc1367878350d5e4 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Wed, 13 Sep 2017 18:05:36 +0100 Subject: ARM: dts: iwg22m: Enable SDHI1 controller Enable the SDHI1 controller on iWave RZ/G1E SoM. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/boot/dts/r8a7745-iwg22m.dtsi') diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi index e306e7c5b644..f7f9ceff35a6 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi @@ -9,6 +9,7 @@ */ #include "r8a7745.dtsi" +#include / { compatible = "iwave,g22m", "renesas,r8a7745"; @@ -38,6 +39,12 @@ function = "mmc"; }; + sdhi1_pins: sd1 { + groups = "sdhi1_data4", "sdhi1_ctrl"; + function = "sdhi1"; + power-source = <3300>; + }; + i2c3_pins: i2c3 { groups = "i2c3_b"; function = "i2c3"; @@ -54,6 +61,16 @@ status = "okay"; }; +&sdhi1 { + pinctrl-0 = <&sdhi1_pins>; + pinctrl-names = "default"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + cd-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &i2c3 { pinctrl-0 = <&i2c3_pins>; pinctrl-names = "default"; -- cgit From cf1cc6f1da41ceb60f6389b6b46f4f6dc06a2b63 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Wed, 13 Sep 2017 18:05:41 +0100 Subject: ARM: dts: iwg22m: Add SPI NOR support Add support for the SPI NOR device used to boot up the system to the System on Module DT. Signed-off-by: Fabrizio Castro Signed-off-by: Chris Paterson Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7745-iwg22m.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm/boot/dts/r8a7745-iwg22m.dtsi') diff --git a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi index f7f9ceff35a6..ed9a8cf3fe36 100644 --- a/arch/arm/boot/dts/r8a7745-iwg22m.dtsi +++ b/arch/arm/boot/dts/r8a7745-iwg22m.dtsi @@ -39,6 +39,11 @@ function = "mmc"; }; + qspi_pins: qspi { + groups = "qspi_ctrl", "qspi_data2"; + function = "qspi"; + }; + sdhi1_pins: sd1 { groups = "sdhi1_data4", "sdhi1_ctrl"; function = "sdhi1"; @@ -61,6 +66,27 @@ status = "okay"; }; +&qspi { + pinctrl-0 = <&qspi_pins>; + pinctrl-names = "default"; + + status = "okay"; + + /* WARNING - This device contains the bootloader. Handle with care. */ + flash: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "sst,sst25vf016b", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + m25p,fast-read; + spi-cpol; + spi-cpha; + }; +}; + &sdhi1 { pinctrl-0 = <&sdhi1_pins>; pinctrl-names = "default"; -- cgit