From c3373b09ba0391bcd9e992b0a2ce52d48d33e47b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 29 Jan 2016 11:17:25 +0100 Subject: ARM: dts: silk: Enable SCIF_CLK frequency and pins Add and enable the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. This increases the range and accuracy of supported baud rates. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-silk.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm/boot/dts/r8a7794-silk.dts') diff --git a/arch/arm/boot/dts/r8a7794-silk.dts b/arch/arm/boot/dts/r8a7794-silk.dts index 98b8bcca84da..66f077a3ca41 100644 --- a/arch/arm/boot/dts/r8a7794-silk.dts +++ b/arch/arm/boot/dts/r8a7794-silk.dts @@ -126,11 +126,19 @@ }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif2_pins: serial2 { renesas,groups = "scif2_data"; renesas,function = "scif2"; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk"; + renesas,function = "scif_clk"; + }; + ether_pins: ether { renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,function = "eth"; @@ -184,6 +192,11 @@ status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + ðer { pinctrl-0 = <ðer_pins &phy1_pins>; pinctrl-names = "default"; -- cgit