From ec32bd9fcadc26d8a184c9a09ec3fe29e097c175 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sun, 2 Aug 2015 22:29:33 +0200 Subject: ARM: dts: rockchip: set correct dwc2 params for cortex-a9 socs According to the manual, the fifo sizes are the same as on later socs like the rk3288 and this also fixes an error about "insufficient fifo memory", as it seems the values read from the ip are wrong. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3xxx.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/boot/dts/rk3xxx.dtsi') diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index a2ae9f32464d..c571ac87a4ff 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -172,6 +172,11 @@ interrupts = ; clocks = <&cru HCLK_OTG0>; clock-names = "otg"; + dr_mode = "otg"; + g-np-tx-fifo-size = <16>; + g-rx-fifo-size = <275>; + g-tx-fifo-size = <256 128 128 64 64 32>; + g-use-dma; status = "disabled"; }; @@ -181,6 +186,7 @@ interrupts = ; clocks = <&cru HCLK_OTG1>; clock-names = "otg"; + dr_mode = "host"; status = "disabled"; }; -- cgit