From bbd73c02e7d19e7227d4780f9597f95ffb84bb68 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 28 Nov 2019 08:45:22 +0100 Subject: ARM: dts: at91: sama5d2: set the sdmmc gclk frequency Set the frequency of the generated clock used by sdmmc devices in order to not rely on the configuration done by previous components. Signed-off-by: Ludovic Desroches Link: https://lore.kernel.org/r/20191128074522.69706-3-ludovic.desroches@microchip.com Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/sama5d2.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot/dts/sama5d2.dtsi') diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 1b6f44b47f45..2012b7407c60 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -300,6 +300,8 @@ interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>; clock-names = "hclock", "multclk", "baseclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 31>; + assigned-clock-rates = <480000000>; status = "disabled"; }; @@ -309,6 +311,8 @@ interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>; clock-names = "hclock", "multclk", "baseclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 32>; + assigned-clock-rates = <480000000>; status = "disabled"; }; -- cgit