From b771ae27bc72c7be48993872396c8f1d9a72b12d Mon Sep 17 00:00:00 2001 From: Maxime Coquelin Date: Wed, 23 Sep 2015 19:53:58 +0200 Subject: ARM: dts: stih410: Enable USB2.0 and related PHY nodes at board level A board might not expose the USB2.0 ports, so disable them by default in SoC file, and enable them in b2120 board. Acked-by: Patrice Chotard Acked-by: Peter Griffin Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih410.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/boot/dts/stih410.dtsi') diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi index 23f4a48e207b..e3150e38a8e8 100644 --- a/arch/arm/boot/dts/stih410.dtsi +++ b/arch/arm/boot/dts/stih410.dtsi @@ -22,6 +22,8 @@ resets = <&softreset STIH407_PICOPHY_SOFTRESET>, <&picophyreset STIH407_PICOPHY0_RESET>; reset-names = "global", "port"; + + status = "disabled"; }; usb2_picophy2: phy3 { @@ -31,6 +33,8 @@ resets = <&softreset STIH407_PICOPHY_SOFTRESET>, <&picophyreset STIH407_PICOPHY1_RESET>; reset-names = "global", "port"; + + status = "disabled"; }; ohci0: usb@9a03c00 { @@ -43,6 +47,8 @@ reset-names = "power", "softreset"; phys = <&usb2_picophy1>; phy-names = "usb"; + + status = "disabled"; }; ehci0: usb@9a03e00 { @@ -57,6 +63,8 @@ reset-names = "power", "softreset"; phys = <&usb2_picophy1>; phy-names = "usb"; + + status = "disabled"; }; ohci1: usb@9a83c00 { @@ -69,6 +77,8 @@ reset-names = "power", "softreset"; phys = <&usb2_picophy2>; phy-names = "usb"; + + status = "disabled"; }; ehci1: usb@9a83e00 { @@ -83,6 +93,8 @@ reset-names = "power", "softreset"; phys = <&usb2_picophy2>; phy-names = "usb"; + + status = "disabled"; }; sti-display-subsystem { -- cgit