From 5d089d42bc36d54f459fdfb5caf0fe9f3b14ae09 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 24 Jul 2019 15:47:54 +0200 Subject: ARM: tegra: Add SOR0_OUT clock on Tegra124 This clock is needed for eDP to properly function, so add it to the SOR device tree node. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/tegra124.dtsi') diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index b113e47b2b2a..413bfb981de8 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -157,10 +157,11 @@ reg = <0x0 0x54540000 0x0 0x00040000>; interrupts = ; clocks = <&tegra_car TEGRA124_CLK_SOR0>, + <&tegra_car TEGRA124_CLK_SOR0_OUT>, <&tegra_car TEGRA124_CLK_PLL_D_OUT0>, <&tegra_car TEGRA124_CLK_PLL_DP>, <&tegra_car TEGRA124_CLK_CLK_M>; - clock-names = "sor", "parent", "dp", "safe"; + clock-names = "sor", "out", "parent", "dp", "safe"; resets = <&tegra_car 182>; reset-names = "sor"; status = "disabled"; -- cgit