From bc8841f0c1e6945fd7fde6faad3300d1b08abd86 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 21 Jun 2019 19:53:16 +0900 Subject: ARM: dts: uniphier: update to new Denali NAND binding With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller and NAND chips"), the Denali NAND controller driver migrated to the new controller/chip representation. Update DT for it. In the new binding, the number of connected chips are described in DT instead of run-time probed. I added just one chip to the reference boards, where we do not know if the on-board NAND device is a single chip or multiple chips. If we added too many chips into DT, it would end up with the timeout error in nand_scan_ident(). I changed all the pinctrl properties to use the single CS. Signed-off-by: Masahiro Yamada --- arch/arm/boot/dts/uniphier-pro5.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/uniphier-pro5.dtsi') diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi index 365738739412..eff74717b37c 100644 --- a/arch/arm/boot/dts/uniphier-pro5.dtsi +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi @@ -458,9 +458,11 @@ status = "disabled"; reg-names = "nand_data", "denali_reg"; reg = <0x68000000 0x20>, <0x68100000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <0 65 4>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand2cs>; + pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; resets = <&sys_rst 2>; -- cgit