From 53d2669844263fd5fdc70f0eb6a2eb8a21086d8e Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Mon, 20 Apr 2015 16:02:31 +0200 Subject: ARM: ux500: Move GPIO regulator for SD-card into board DTSs The GPIO regulator for the SD-card isn't a ux500 SOC configuration, but instead it's specific to the board. Move the definition of it, into the board DTSs. Fixes: c94a4ab7af3f ("ARM: ux500: Disable the MMCI gpio-regulator by default") Signed-off-by: Ulf Hansson Reviewed-by: Bjorn Andersson Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 17 ----------------- arch/arm/boot/dts/ste-href.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/ste-snowball.dts | 15 +++++++++++++++ 3 files changed, 32 insertions(+), 17 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index bfd3f1c734b8..2201cd5da3bb 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -1017,23 +1017,6 @@ status = "disabled"; }; - vmmci: regulator-gpio { - compatible = "regulator-gpio"; - - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2900000>; - regulator-name = "mmci-reg"; - regulator-type = "voltage"; - - startup-delay-us = <100>; - enable-active-high; - - states = <1800000 0x1 - 2900000 0x0>; - - status = "disabled"; - }; - mcde@a0350000 { compatible = "stericsson,mcde"; reg = <0xa0350000 0x1000>, /* MCDE */ diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi index bf8f0eddc2c0..8cf499ad31a5 100644 --- a/arch/arm/boot/dts/ste-href.dtsi +++ b/arch/arm/boot/dts/ste-href.dtsi @@ -111,6 +111,23 @@ pinctrl-1 = <&i2c3_sleep_mode>; }; + vmmci: regulator-gpio { + compatible = "regulator-gpio"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2900000>; + regulator-name = "mmci-reg"; + regulator-type = "voltage"; + + startup-delay-us = <100>; + enable-active-high; + + states = <1800000 0x1 + 2900000 0x0>; + + status = "disabled"; + }; + // External Micro SD slot sdi0_per1@80126000 { arm,primecell-periphid = <0x10480180>; diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts index 206826a855c0..65a7f630af82 100644 --- a/arch/arm/boot/dts/ste-snowball.dts +++ b/arch/arm/boot/dts/ste-snowball.dts @@ -146,8 +146,23 @@ }; vmmci: regulator-gpio { + compatible = "regulator-gpio"; + gpios = <&gpio7 4 0x4>; enable-gpio = <&gpio6 25 0x4>; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2900000>; + regulator-name = "mmci-reg"; + regulator-type = "voltage"; + + startup-delay-us = <100>; + enable-active-high; + + states = <1800000 0x1 + 2900000 0x0>; + + status = "disabled"; }; // External Micro SD slot -- cgit From f9a8c3914ba85f19c3360b19612d77c47adb8942 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Mon, 20 Apr 2015 16:02:32 +0200 Subject: ARM: ux500: Enable GPIO regulator for SD-card for HREF boards Fixes: c94a4ab7af3f ("ARM: ux500: Disable the MMCI gpio-regulator by default") Signed-off-by: Ulf Hansson Reviewed-by: Bjorn Andersson Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-href.dtsi | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/ste-href.dtsi b/arch/arm/boot/dts/ste-href.dtsi index 8cf499ad31a5..744c1e3a744d 100644 --- a/arch/arm/boot/dts/ste-href.dtsi +++ b/arch/arm/boot/dts/ste-href.dtsi @@ -124,8 +124,6 @@ states = <1800000 0x1 2900000 0x0>; - - status = "disabled"; }; // External Micro SD slot -- cgit From 11133db7a836b0cb411faa048f07a38e994d1382 Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Mon, 20 Apr 2015 16:02:33 +0200 Subject: ARM: ux500: Enable GPIO regulator for SD-card for snowball Fixes: c94a4ab7af3f ("ARM: ux500: Disable the MMCI gpio-regulator by default") Signed-off-by: Ulf Hansson Reviewed-by: Bjorn Andersson Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-snowball.dts | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts index 65a7f630af82..1bc84ebdccaa 100644 --- a/arch/arm/boot/dts/ste-snowball.dts +++ b/arch/arm/boot/dts/ste-snowball.dts @@ -161,8 +161,6 @@ states = <1800000 0x1 2900000 0x0>; - - status = "disabled"; }; // External Micro SD slot -- cgit From 750e30d4076ae5e02ad13a376e96c95a2627742c Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Tue, 14 Apr 2015 11:50:13 +0200 Subject: ARM: mvebu: armada-xp-openblocks-ax3-4: Disable internal RTC There is no crystal connected to the internal RTC on the Open Block AX3. So let's disable it in order to prevent the kernel probing the driver uselessly. Eventually this patches removes the following warning message from the boot log: "rtc-mv d0010300.rtc: internal RTC not ticking" Acked-by: Andrew Lunn Signed-off-by: Gregory CLEMENT Cc: # v3.8 + --- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index e3b08fb959e5..990e8a2100f0 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -105,6 +105,10 @@ }; internal-regs { + rtc@10300 { + /* No crystal connected to the internal RTC */ + status = "disabled"; + }; serial@12000 { status = "okay"; }; -- cgit From cfe8c59762244251fd9a5e281d48808095ff4090 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 14 Apr 2015 11:05:04 -0300 Subject: ARM: dts: imx23-olinuxino: Fix polarity of LED GPIO On imx23-olinuxino the LED turns on when level logic high is aplied to GPIO2_1. Fix the gpios property accordingly. Fixes: b34aa1850244 ("ARM: dts: imx23-olinuxino: Remove unneeded "default-on"") Reported-by: Stefan Wahren Signed-off-by: Fabio Estevam Tested-by: Stefan Wahren Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23-olinuxino.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index 7e6eef2488e8..839a3b96910d 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts @@ -12,6 +12,7 @@ */ /dts-v1/; +#include #include "imx23.dtsi" / { @@ -122,7 +123,7 @@ user { label = "green"; - gpios = <&gpio2 1 1>; + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; }; }; }; -- cgit From 0fdebe1a2f4d3a8fc03754022fabf8ba95e131a3 Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Tue, 14 Apr 2015 20:37:26 +0000 Subject: ARM: dts: imx23-olinuxino: Fix dr_mode of usb0 The dr_mode of usb0 on imx233-olinuxino is left to default "otg". Since the green LED (GPIO2_1) on imx233-olinuxino is connected to the same pin as USB_OTG_ID it's possible to disable USB host by LED toggling: echo 0 > /sys/class/leds/green/brightness [ 1068.890000] ci_hdrc ci_hdrc.0: remove, state 1 [ 1068.890000] usb usb1: USB disconnect, device number 1 [ 1068.920000] usb 1-1: USB disconnect, device number 2 [ 1068.920000] usb 1-1.1: USB disconnect, device number 3 [ 1069.070000] usb 1-1.2: USB disconnect, device number 4 [ 1069.450000] ci_hdrc ci_hdrc.0: USB bus 1 deregistered [ 1074.460000] ci_hdrc ci_hdrc.0: timeout waiting for 00000800 in 11 This patch fixes the issue by setting dr_mode to "host" in the dts file. Reported-by: Harald Geyer Signed-off-by: Stefan Wahren Reviewed-by: Fabio Estevam Reviewed-by: Marek Vasut Acked-by: Peter Chen Fixes: b49312948285 ("ARM: dts: imx23-olinuxino: Add USB host support") Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23-olinuxino.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index 839a3b96910d..82045398bf1f 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts @@ -94,6 +94,7 @@ ahb@80080000 { usb0: usb@80080000 { + dr_mode = "host"; vbus-supply = <®_usb0_vbus>; status = "okay"; }; -- cgit From 7f8d49dcc66a3dd3a8fc3078330b8fb9e616ad3f Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 21 Apr 2015 15:59:53 +0200 Subject: ARM: dts: imx6: phyFLEX: USB VBUS control is active-high The fixed-regulator bindings require a separate property enable-active-high, the standard gpio phandle property polarity setting is ignored. Signed-off-by: Philipp Zabel Fixes: 4fe69a934b1f ("ARM: dts: Add Phytec pfla02 with i.MX6 DualLite/Solo") Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index 19cc269a08d4..1ce6133b67f5 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -31,6 +31,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio4 15 0>; + enable-active-high; }; reg_usb_h1_vbus: regulator@1 { @@ -40,6 +41,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio1 0 0>; + enable-active-high; }; }; -- cgit From f90d3f0d0a11fa77918fd5497cb616dd2faa8431 Mon Sep 17 00:00:00 2001 From: Markus Pargmann Date: Fri, 24 Apr 2015 09:27:33 +0200 Subject: ARM: dts: imx25: Add #pwm-cells to pwm4 The property '#pwm-cells' is currently missing. It is not possible to use pwm4 without this property. Signed-off-by: Markus Pargmann Fixes: 5658a68fb578 ("ARM i.MX25: Add devicetree") Cc: Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx25.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi index e4d3aecc4ed2..677f81d9dcd5 100644 --- a/arch/arm/boot/dts/imx25.dtsi +++ b/arch/arm/boot/dts/imx25.dtsi @@ -428,6 +428,7 @@ pwm4: pwm@53fc8000 { compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; + #pwm-cells = <2>; reg = <0x53fc8000 0x4000>; clocks = <&clks 108>, <&clks 52>; clock-names = "ipg", "per"; -- cgit From 4ada77e37a773168fea484899201e272ab44ba8b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 24 Apr 2015 13:29:47 +0200 Subject: ARM: dts: imx28: Fix AUART4 TX-DMA interrupt name Fix a typo in the TX DMA interrupt name for AUART4. This patch makes AUART4 operational again. Signed-off-by: Marek Vasut Fixes: f30fb03d4d3a ("ARM: dts: add generic DMA device tree binding for mxs-dma") Cc: stable@vger.kernel.org Acked-by: Stefan Wahren Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx28.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi index 25e25f82fbae..4e073e854742 100644 --- a/arch/arm/boot/dts/imx28.dtsi +++ b/arch/arm/boot/dts/imx28.dtsi @@ -913,7 +913,7 @@ 80 81 68 69 70 71 72 73 74 75 76 77>; - interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty", + interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty", "saif0", "saif1", "i2c0", "i2c1", "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; -- cgit From 68ce9a1f24b8e8894955032a4af74998315be9fe Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 28 Apr 2015 09:05:21 +0800 Subject: ARM: dts: imx6qdl-sabreauto: remove pinctrl-assert-gpios The pinctrl-assert-gpios is an invalid pinctrl property. It was probably sneaked from vendor tree. Remove it. Fixes: 4e18a2243a87 ("ARM: imx6qdl-sabreauto.dtsi: add max7310 support") Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi index 46b2fed7c319..3b24b12651b2 100644 --- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi @@ -185,7 +185,6 @@ &i2c3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; - pinctrl-assert-gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>; status = "okay"; max7310_a: gpio@30 { -- cgit From a4b6916cb3578b05f30ef520cd6deb7f8fd97dda Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Fri, 3 Apr 2015 09:21:11 +0200 Subject: ARM: tegra: Correct which USB controller has the UTMI pad registers It should be the first controller, not the second. The indexes of the usb resets were also wrong and have been fixed. The issue was caused by the changes in 308efde ("ARM: tegra: Add resets & has-utmi-pad-registers flag to all USB PHYs") being misapplied by git due to the patch context being insufficient. This broke USB after 6261b06 ("regulator: Defer lookup of supply to regulator_get"), because it changed the order in which the controllers were probed. The fix for this issue was suggested by Mikko Perttunen and Tuomas Tynkkynen. Signed-off-by: Tomeu Vizoso Cc: Mikko Perttunen Cc: Tuomas Tynkkynen Tested-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index cf01c818b8ea..13cc7ca5e031 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -826,7 +826,7 @@ <&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_USBD>; clock-names = "reg", "pll_u", "utmi-pads"; - resets = <&tegra_car 59>, <&tegra_car 22>; + resets = <&tegra_car 22>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; @@ -838,6 +838,7 @@ nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; + nvidia,has-utmi-pad-registers; status = "disabled"; }; @@ -862,7 +863,7 @@ <&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_USBD>; clock-names = "reg", "pll_u", "utmi-pads"; - resets = <&tegra_car 22>, <&tegra_car 22>; + resets = <&tegra_car 58>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; @@ -874,7 +875,6 @@ nvidia,hssquelch-level = <2>; nvidia,hsdiscon-level = <5>; nvidia,xcvr-hsslew = <12>; - nvidia,has-utmi-pad-registers; status = "disabled"; }; @@ -899,7 +899,7 @@ <&tegra_car TEGRA124_CLK_PLL_U>, <&tegra_car TEGRA124_CLK_USBD>; clock-names = "reg", "pll_u", "utmi-pads"; - resets = <&tegra_car 58>, <&tegra_car 22>; + resets = <&tegra_car 59>, <&tegra_car 22>; reset-names = "usb", "utmi-pads"; nvidia,hssync-start-delay = <0>; nvidia,idle-wait-delay = <17>; -- cgit From 12392f5896c9affc03c1ddd95a83c32238862a58 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 29 Apr 2015 16:55:43 +0300 Subject: ARM: shmobile: koelsch: Fix adv7511 IRQ sensing The adv7511 IRQ is low level triggered, not falling edge triggered. The wrong sense configuration results in no interrupt being triggered at all, breaking hotplug detection. Fix it. Signed-off-by: Laurent Pinchart Fixes: 83a0731b39f3 ("ARM: shmobile: koelsch: Add DU HDMI output support") Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 74c3212f1f11..824ddab9c3ad 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -545,7 +545,7 @@ compatible = "adi,adv7511w"; reg = <0x39>; interrupt-parent = <&gpio3>; - interrupts = <29 IRQ_TYPE_EDGE_FALLING>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; adi,input-depth = <8>; adi,input-colorspace = "rgb"; -- cgit From ae142bd9976532aa5232ab0b00e621690d8bfe6a Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 27 Apr 2015 08:55:18 +0200 Subject: ARM: mvebu: Fix the main PLL frequency on Armada 375, 38x and 39x SoCs Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the Armada 375, 38x and 39x, the frequency is 1GHz. When writing support for these last SoCs, there was no official value for the PLL. Now that we have it, this patch fixes it in the device tree. This value is currently only used by the NAND driver for the setting the NAND timing. Fortunately it is not actually used: all the mainline board with a NAND flash comes with a NAND device tree node using the "marvell,nand-keep-config" property. With this property the timings are not modified in the kernel driver and are kept from the bootloader. Signed-off-by: Gregory CLEMENT Acked-by: Andrew Lunn Acked-by: Marcin Wojtas --- arch/arm/boot/dts/armada-375.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 2 +- arch/arm/boot/dts/armada-39x.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index c675257f2377..f076ff856d8b 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -69,7 +69,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */ refclk: oscillator { diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index ed2dd8ba4080..218a2acd36e5 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -585,7 +585,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; /* 25 MHz reference crystal */ diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi index 0e85fc15ceda..ecd1318109ba 100644 --- a/arch/arm/boot/dts/armada-39x.dtsi +++ b/arch/arm/boot/dts/armada-39x.dtsi @@ -502,7 +502,7 @@ mainpll: mainpll { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <2000000000>; + clock-frequency = <1000000000>; }; }; }; -- cgit From 1819e3034ee26ffadc71880064ed8b8e7d74f52c Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Sun, 1 Mar 2015 21:07:08 +0200 Subject: ARM: dts: OMAP3-N900: Add microphone bias voltages N900 audio recording needs that codec provides bias voltage for integrated digital microphone and headset microphone depending which one is used. Digital microphone uses 2 V bias and it comes from the codec A part. Codec B part drives the headset microphone bias and that is set to 2.5 V. Cc: stable@vger.kernel.org # v3.16+ Signed-off-by: Pavel Machek [Jarkko: Headset mic bias changed to 2 (2.5 V) as it was before commit e2e8bfdf6157 ("ASoC: tlv320aic3x: Convert mic bias to a supply widget")] Signed-off-by: Jarkko Nikula Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-n900.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index a29315833ecd..5c16145920ea 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -498,6 +498,8 @@ DRVDD-supply = <&vmmc2>; IOVDD-supply = <&vio>; DVDD-supply = <&vio>; + + ai3x-micbias-vg = <1>; }; tlv320aic3x_aux: tlv320aic3x@19 { @@ -509,6 +511,8 @@ DRVDD-supply = <&vmmc2>; IOVDD-supply = <&vio>; DVDD-supply = <&vio>; + + ai3x-micbias-vg = <2>; }; tsl2563: tsl2563@29 { -- cgit From 2055088b5e17b450fcfb536568aee00eccd0ced5 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Tue, 31 Mar 2015 03:28:10 +0200 Subject: ARM: dts: omap3: Add #iommu-cells to isp and iva iommu Add missing #iommu-cells property to the isp and iva iommu nodes. This fixes the binding (property is required according to the generic iommu binding) and removes the following kernel warning triggered once the iommu nodes are referenced: [ 0.647521] /ocp/isp@480bc000: could not get #iommu-cells for /ocp/mmu@480bd400 Signed-off-by: Sebastian Reichel Cc: Laurent Pinchart Acked-by: Sakari Ailus Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index d18a90f5eca3..69a40cfc1f29 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -456,6 +456,7 @@ }; mmu_isp: mmu@480bd400 { + #iommu-cells = <0>; compatible = "ti,omap2-iommu"; reg = <0x480bd400 0x80>; interrupts = <24>; @@ -464,6 +465,7 @@ }; mmu_iva: mmu@5d000000 { + #iommu-cells = <0>; compatible = "ti,omap2-iommu"; reg = <0x5d000000 0x80>; interrupts = <28>; -- cgit From e7a7357341664148cabf98a3ab50b5d449afca0b Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Wed, 8 Apr 2015 18:56:26 -0500 Subject: ARM: dts: am57xx-beagle-x15: Fix IRQ type for mcp7941x The interrupt polarity provided in devicetree is used to configure the interrupt controller(ARM GIC), however, it seems that we have an inverter at the GIC boundary inside AM57xx which inverts the signal input from sys_irq external interrupt source. Further, as per GIC distributor TRM, http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438d/BGBHIACJ.html#BABJFCFB ARM GIC distributor does not support IRQ trigger type IRQ_TYPE_LEVEL_LOW, and only rising or level high signals. However, for some reason, the current configuration(which gets ignored by GIC driver) functions on some platforms, however, on few platforms results in infinite interrupts hogging the system down. Switch over to rising edge for GIC configuration which is also aligned with trigger point from the RTC chip and the internal inversion. Fixes: 5a0f93c6576a ("ARM: dts: Add am57xx-beagle-x15") Signed-off-by: Grygorii Strashko Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 15f198e4864d..7ac6ee2c52d8 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -455,7 +455,7 @@ mcp_rtc: rtc@6f { compatible = "microchip,mcp7941x"; reg = <0x6f>; - interrupts = ; /* IRQ_SYS_1N */ + interrupts = ; /* IRQ_SYS_1N */ pinctrl-names = "default"; pinctrl-0 = <&mcp79410_pins_default>; -- cgit From 00edd3170c757772f74c533e61298be249447a11 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 8 Apr 2015 18:56:27 -0500 Subject: ARM: dts: am57xx-beagle-x15: Fix RTC aliases With commit bc078316d86c ("ARM: dts: DRA7: Add node for RTC"), we now have AM57xx RTC register itself as alias 0 even before DS1307 or TPS rtc drivers are loaded up. However, since neither TPS, nor AM57xx RTC are capable of being backedup by battery, we would like to maintain the "primary" rtc as mcp79410 rtc device. This also generates the following warnings in the bootlog highlighting the issue: [ 5.895445] rtc-ds1307 2-006f: /aliases ID 0 not available ... [ 6.476285] palmas-rtc 48070000.i2c:tps659038@58:tps659038_rtc: /aliases ID 1 not available So, add proper aliases to ensure that RTC order is always consistent to userspace immaterial of probe order. Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 1 + arch/arm/boot/dts/dra7.dtsi | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 7ac6ee2c52d8..be9b6a552ae2 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -18,6 +18,7 @@ aliases { rtc0 = &mcp_rtc; rtc1 = &tps659038_rtc; + rtc2 = &rtc; }; memory { diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 5332b57b4950..0f73fea9f5c3 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1203,7 +1203,7 @@ status = "disabled"; }; - rtc@48838000 { + rtc: rtc@48838000 { compatible = "ti,am3352-rtc"; reg = <0x48838000 0x100>; interrupts = , -- cgit From faa4ec1eedbe6d352dc22c945540a64b5c896a95 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 9 Apr 2015 10:59:26 -0500 Subject: ARM: dts: am437x-sk: fix for new newhaven display module revision AM437x Starter Kit uses a NewHaven Display module with a 4.3" display and EDT FT5306 touchscreen On that module's new revision, NewHave decided to change the pinout on the 6 pin flat-pcb touchscreen connector so that instead of having WAKE pin, we now have RESETn. The new display module is available on AM437x SK Beta and all new revisions while the older revision is only available on AM437x SK Alpha which, unfortunately, can't be supported anymore in mainline without a revert of this patch. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 8ae29c955c11..fbc50f92e622 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -473,7 +473,7 @@ interrupt-parent = <&gpio0>; interrupts = <31 0>; - wake-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; touchscreen-size-x = <480>; touchscreen-size-y = <272>; -- cgit From f6b957fdce50ddbd1899948ab109cca64e571eba Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 9 Apr 2015 10:59:27 -0500 Subject: ARM: dts: am437x-sk: reduce col-scan-delay-us The new AM437x SK Beta boards have removed the large capacitors on the gpio-matrix column lines which means we can reduce col-scan-delay-us to 5us without loosing functionality. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index fbc50f92e622..c17097d2c167 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -49,7 +49,7 @@ pinctrl-0 = <&matrix_keypad_pins>; debounce-delay-ms = <5>; - col-scan-delay-us = <1500>; + col-scan-delay-us = <5>; row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ -- cgit From 5eb6719816faad8e915d4f46ad61a440d641d183 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Wed, 8 Apr 2015 17:40:59 -0500 Subject: ARM: dts: am57xx-beagle-x15: Switch UART mux pins BeagleBoard-X15 pre-production change includes switching over to UART pins that now allow for UART download capability. All original boards should either have been returned for modifications or already modified for the required change and maintaining compatibility for older boards are no longer needed. Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index be9b6a552ae2..dd53ea56b0ed 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -131,8 +131,8 @@ uart3_pins_default: uart3_pins_default { pinctrl-single,pins = < - 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd.rxd */ - 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd.txd */ + 0x3f8 (PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ + 0x3fc (PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ >; }; @@ -479,7 +479,7 @@ &uart3 { status = "okay"; interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, - <&dra7_pmx_core 0x248>; + <&dra7_pmx_core 0x3f8>; pinctrl-names = "default"; pinctrl-0 = <&uart3_pins_default>; -- cgit From ed12f102ba9f55d2617fc6b5e4fbecbf9a132ba7 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Thu, 9 Apr 2015 17:33:17 -0500 Subject: ARM: dts: am57xx-beagle-x15: Switch GPIO fan number BeagleBoard-X15 pre-production change includes switching the GPIO fan gpio over from 1 to 2 to allow for a potential fix at a later point in time for USB client VBUS detection using PMIC VBUS detect capability. Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index dd53ea56b0ed..7128fad991ac 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -84,7 +84,7 @@ gpio_fan: gpio_fan { /* Based on 5v 500mA AFB02505HHB */ compatible = "gpio-fan"; - gpios = <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>; + gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>; gpio-fan,speed-map = <0 0>, <13000 1>; #cooling-cells = <2>; -- cgit From 1822734677d95888d18e3c0e0743727effa62f8e Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Thu, 16 Apr 2015 16:56:33 -0500 Subject: ARM: dts: dra7: Fix efuse register size for ABB Fix a typo in DRA7 dtsi where 12 bytes are needed for register description of ABB efuse registers, however only 8 bytes are provided to map. For some weird reason, this does not generate abort at offset 0x8, probably due to default maps already provided in io.c for the bus register ranges. Reported-by: Matt Gessner Reported-by: Suman Anna Signed-off-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 0f73fea9f5c3..f03a091cd076 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -911,7 +911,7 @@ ti,clock-cycles = <16>; reg = <0x4ae07ddc 0x4>, <0x4ae07de0 0x4>, - <0x4ae06014 0x4>, <0x4a003b20 0x8>, + <0x4ae06014 0x4>, <0x4a003b20 0xc>, <0x4ae0c158 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", @@ -944,7 +944,7 @@ ti,clock-cycles = <16>; reg = <0x4ae07e34 0x4>, <0x4ae07e24 0x4>, - <0x4ae06010 0x4>, <0x4a0025cc 0x8>, + <0x4ae06010 0x4>, <0x4a0025cc 0xc>, <0x4a002470 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", @@ -977,7 +977,7 @@ ti,clock-cycles = <16>; reg = <0x4ae07e30 0x4>, <0x4ae07e20 0x4>, - <0x4ae06010 0x4>, <0x4a0025e0 0x8>, + <0x4ae06010 0x4>, <0x4a0025e0 0xc>, <0x4a00246c 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", @@ -1010,7 +1010,7 @@ ti,clock-cycles = <16>; reg = <0x4ae07de4 0x4>, <0x4ae07de8 0x4>, - <0x4ae06010 0x4>, <0x4a003b08 0x8>, + <0x4ae06010 0x4>, <0x4a003b08 0xc>, <0x4ae0c154 0x4>; reg-names = "setup-address", "control-address", "int-address", "efuse-address", -- cgit From e7309c2673a389a495fcfad70376d3bae8b9bc89 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 24 Apr 2015 12:54:20 -0500 Subject: bus: omap_l3_noc: Fix master id address decoding for OMAP5 The L3 Error handling on OMAP5 for the most part is very similar to that of OMAP4, and had leveraged common data structures and register layout definitions so far. Upon closer inspection, there are a few minor differences causing an incorrect decoding and reporting of the master NIU upon an error: 1. The L3_TARG_STDERRLOG_MSTADDR.STDERRLOG_MSTADDR occupies 11 bits on OMAP5 as against 8 bits on OMAP4, with the master NIU connID encoded in the 6 MSBs of the STDERRLOG_MSTADDR field. 2. The CLK3 FlagMux component has 1 input source on OMAP4 and 3 input sources on OMAP5. The common DEBUGSS source is at a different input on each SoC. Fix the above issues by using a OMAP5-specific compatible property and using SoC-specific data where there are differences. Signed-off-by: Suman Anna Acked-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap5.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index efe5f737f39b..7d24ae0306b5 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -128,7 +128,7 @@ * hierarchy. */ ocp { - compatible = "ti,omap4-l3-noc", "simple-bus"; + compatible = "ti,omap5-l3-noc", "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; -- cgit From 0d747762966e47e3660cbd1b7806791c83e04f91 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Sat, 9 May 2015 02:33:42 +0900 Subject: ARM: dts: Make DP a consumer of DISP1 power domain on Exynos5420 Commit ea08de16eb1b ("ARM: dts: Add DISP1 power domain for exynos5420") added a device node for the Exynos5420 DISP1 power domain but dit not make the DP controller a consumer of that power domain. This causes an "Unhandled fault: imprecise external abort" error if the exynos-dp driver tries to access the DP controller registers and the PD was turned off. This lead to a kernel panic and a complete system hang. Make the DP controller device node a consumer of the DISP1 power domain to ensure that the PD is turned on when the exynos-dp driver is probed. Fixes: ea08de16eb1b ("ARM: dts: Add DISP1 power domain for exynos5420") Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index f67b23f303c3..45317538bbae 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -536,6 +536,7 @@ clock-names = "dp"; phys = <&dp_phy>; phy-names = "dp"; + power-domains = <&disp_pd>; }; mipi_phy: video-phy@10040714 { -- cgit From ee2020a4ca847e2cde4d5ee73572388061730809 Mon Sep 17 00:00:00 2001 From: Markus Reichl Date: Sat, 9 May 2015 03:05:51 +0900 Subject: ARM: dts: add 'rtc_src' clock to rtc node for exynos4412-odroid boards The Exynos4412 SoC has a s3c6410 RTC where the source clock is now a mandatory property. This patch fixes probe failure of s3c-rtc on Odroid-X2/U2/U3 boards. Signed-off-by: Markus Reichl Tested-by: Tobias Jakobi Reviewed-by: Chanwoo Choi Reviewed-by: Javier Martinez Canillas Tested-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 8de12af7c276..d6b49e5b32e9 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -9,6 +9,7 @@ #include #include +#include #include "exynos4412.dtsi" / { @@ -105,6 +106,8 @@ rtc@10070000 { status = "okay"; + clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; + clock-names = "rtc", "rtc_src"; }; g2d@10800000 { -- cgit From cb0f7c8b40c52124fdb73b5e5a1b28202efbb43b Mon Sep 17 00:00:00 2001 From: Abhilash Kesavan Date: Sat, 9 May 2015 03:11:21 +0900 Subject: ARM: dts: Fix typo in trip point temperature for exynos5420/5440 Remove the extra zero in the "cpu-crit-0" trip point for exynos5420 and exynos5440. Signed-off-by: Abhilash Kesavan Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420-trip-points.dtsi | 2 +- arch/arm/boot/dts/exynos5440-trip-points.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi b/arch/arm/boot/dts/exynos5420-trip-points.dtsi index 5d31fc140823..2180a0152c9b 100644 --- a/arch/arm/boot/dts/exynos5420-trip-points.dtsi +++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi @@ -28,7 +28,7 @@ trips { type = "active"; }; cpu-crit-0 { - temperature = <1200000>; /* millicelsius */ + temperature = <120000>; /* millicelsius */ hysteresis = <0>; /* millicelsius */ type = "critical"; }; diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi b/arch/arm/boot/dts/exynos5440-trip-points.dtsi index 48adfa8f4300..356e963edf11 100644 --- a/arch/arm/boot/dts/exynos5440-trip-points.dtsi +++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi @@ -18,7 +18,7 @@ trips { type = "active"; }; cpu-crit-0 { - temperature = <1050000>; /* millicelsius */ + temperature = <105000>; /* millicelsius */ hysteresis = <0>; /* millicelsius */ type = "critical"; }; -- cgit From 8cf5e6dc8dd55d0f1ad46ab4046c3a8a51d2136d Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Sat, 9 May 2015 03:15:16 +0900 Subject: ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for exynos5250-snow The Marvell mwifiex driver prevents the system to enter into a suspend state if the card power is not preserved during a suspend/resume cycle. So Suspend-to-RAM and Suspend-to-idle are failing on Exynos5250 Snow. Add the keep-power-in-suspend Power Management property to the SDIO/MMC node so the mwifiex suspend handler doesn't fail and the system is able to enter into a suspend state. Signed-off-by: Javier Martinez Canillas Reviewed-by: Doug Anderson Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-snow.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index 2657e842e5a5..1eca97ee4bd6 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -567,6 +567,7 @@ num-slots = <1>; broken-cd; cap-sdio-irq; + keep-power-in-suspend; card-detect-delay = <200>; samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-sdr-timing = <2 3>; -- cgit From ba0a1ff85376811d3ca789fb4848fef55390d095 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Mon, 4 May 2015 23:04:15 +0200 Subject: ARM: dove: Add clock-names to CuBox Si5351 clk generator Si5351 clock generator on CuBox uses XTAL as clock reference, name the clock phandle accordingly. Signed-off-by: Sebastian Hesselbarth --- arch/arm/boot/dts/dove-cubox.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/dove-cubox.dts b/arch/arm/boot/dts/dove-cubox.dts index aae7efc09b0b..e6fa251e17b9 100644 --- a/arch/arm/boot/dts/dove-cubox.dts +++ b/arch/arm/boot/dts/dove-cubox.dts @@ -87,6 +87,7 @@ /* connect xtal input to 25MHz reference */ clocks = <&ref25>; + clock-names = "xtal"; /* connect xtal input as source of pll0 and pll1 */ silabs,pll-source = <0 0>, <1 0>; -- cgit From 2004f98acf95d4f3da46c41409cdbf0bdeb7e796 Mon Sep 17 00:00:00 2001 From: Robert Schwebel Date: Thu, 7 May 2015 15:45:03 +0100 Subject: ARM: vexpress/ca9: Add unified-cache property to l2 cache node Commit d9d1f3e2d711 ("ARM: l2c: check that DT files specify the required "cache-unified" property") mandates to specify this required property. Without this property, we get this boot warning: "L2C: device tree omits to specify unified cache" This patch adds "cache-unified" property to L2 cache node in vexpress CA9 device tree. Signed-off-by: Robert Schwebel Acked-by: Sudeep Holla Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/vexpress-v2p-ca9.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index 23662b5a5e9d..a411274e8b6b 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -170,6 +170,7 @@ compatible = "arm,pl310-cache"; reg = <0x1e00a000 0x1000>; interrupts = <0 43 4>; + cache-unified; cache-level = <2>; arm,data-latency = <1 1 1>; arm,tag-latency = <1 1 1>; -- cgit From 613880a1218286eb2d6b1cf5a574241eec32e7aa Mon Sep 17 00:00:00 2001 From: Robert Schwebel Date: Thu, 7 May 2015 15:45:04 +0100 Subject: ARM: vexpress/ca9: Add interrupt-affinity to the PMU node Commit 9fd85eb502a7 ("ARM: pmu: add support for interrupt-affinity property") added an optional "interrupt-affinity" property, to specify the CPU affinity for each SPI listed in the interrupts property. Without this property, we get this boot warning: CPU PMU: Failed to parse /interrupt-affinity[0] This patch adds interrupt-affinity to the PMU node in the vexpress-v2p-ca9 device tree. Signed-off-by: Robert Schwebel Acked-by: Sudeep Holla Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/vexpress-v2p-ca9.dts | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index a411274e8b6b..d949facba376 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -33,28 +33,28 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + A9_0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; next-level-cache = <&L2>; }; - cpu@1 { + A9_1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; next-level-cache = <&L2>; }; - cpu@2 { + A9_2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; next-level-cache = <&L2>; }; - cpu@3 { + A9_3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; @@ -182,6 +182,8 @@ <0 61 4>, <0 62 4>, <0 63 4>; + interrupt-affinity = <&A9_0>, <&A9_1>, <&A9_2>, <&A9_3>; + }; dcc { -- cgit From 51ef519cbd4c9d7478c4050845ffb1cdc4e70fc1 Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Thu, 7 May 2015 15:45:05 +0100 Subject: ARM: vexpress/tc2: Add interrupt-affinity to the PMU node Commit 9fd85eb502a7 ("ARM: pmu: add support for interrupt-affinity property") added an optional "interrupt-affinity" property, to specify the CPU affinity for each SPI listed in the interrupts property. Without this property, we get this boot warning: CPU PMU: Failed to parse /interrupt-affinity[0] This patch adds interrupt-affinity to the PMU node in the vexpress-ca15_a7(a.k.a TC2) device tree. Signed-off-by: Sudeep Holla Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index 7a2aeacd62c0..107395c32d82 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -191,6 +191,7 @@ compatible = "arm,cortex-a15-pmu"; interrupts = <0 68 4>, <0 69 4>; + interrupt-affinity = <&cpu0>, <&cpu1>; }; oscclk6a: oscclk6a { -- cgit From b270687977280a2e49c7e53db14bd1b22f842295 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Tue, 7 Apr 2015 15:03:34 +0200 Subject: ARM: dts: Add keep-power-in-suspend to WiFi SDIO node for Peach Boards The Marvell mwifiex driver prevents the system to enter into a suspend state if the card power is not preserved during a suspend/resume cycle. So Suspend-to-RAM and Suspend-to-idle is failing on Exynos5800 Peach Pi and Exynos5420 Peach Pit Chromebooks. Add the keep-power-in-suspend Power Management property to the SDIO/MMC node so the mwifiex suspend handler doesn't fail and the system is able to enter into a suspend state. Signed-off-by: Javier Martinez Canillas Reviewed-by: Doug Anderson Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420-peach-pit.dts | 1 + arch/arm/boot/dts/exynos5800-peach-pi.dts | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index 0788d08fb43e..146e71118a72 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -711,6 +711,7 @@ num-slots = <1>; broken-cd; cap-sdio-irq; + keep-power-in-suspend; card-detect-delay = <200>; clock-frequency = <400000000>; samsung,dw-mshc-ciu-div = <1>; diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 412f41d62686..02eb8b15374f 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -674,6 +674,7 @@ num-slots = <1>; broken-cd; cap-sdio-irq; + keep-power-in-suspend; card-detect-delay = <200>; clock-frequency = <400000000>; samsung,dw-mshc-ciu-div = <1>; -- cgit