From 7355ad1950f41e755e6dc451834be3b94f82acd4 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 28 Mar 2023 09:33:26 +0200 Subject: ARM: dts: stm32: add CAN support on stm32f429 Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary, that share some of the required logic like clock and filters. This means that the secondary CAN can't be used without the primary CAN. Signed-off-by: Dario Binacchi Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde --- arch/arm/boot/dts/stm32f429.dtsi | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index c31ceb821231..c9e05e3540d6 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -362,6 +362,35 @@ status = "disabled"; }; + can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan>; + status = "disabled"; + }; + + gcan: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F4_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>; + st,gcan = <&gcan>; + status = "disabled"; + }; + dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>; -- cgit From 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Tue, 28 Mar 2023 09:33:27 +0200 Subject: ARM: dts: stm32: add pin map for CAN controller on stm32f4 Add pin configurations for using CAN controller on stm32f469-disco board. They are located on the Arduino compatible connector CN5 (CAN1) and on the extension connector CN12 (CAN2). Signed-off-by: Dario Binacchi Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com Signed-off-by: Marc Kleine-Budde --- arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi index 4523c63475e4..3bb812d6399e 100644 --- a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi @@ -447,6 +447,36 @@ slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = ; /* CAN1_TX */ + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = ; /* CAN2_TX */ + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-pull-up; + }; + }; }; }; }; -- cgit From 939595c79d12bb18e3784bc3faa2ddd2df41f70f Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 17 Apr 2023 17:17:34 +0200 Subject: ARM: dts: qcom: ipq8064-rb3011: Drop unevaluated properties in switch nodes IPQ8064 MikroTik RB3011UiAS-RM DT have currently unevaluted properties in the 2 switch nodes. The bindings #address-cells and #size-cells are redundant and cause warning for 'Unevaluated properties are not allowed'. Drop these bindings to mute these warning as they should not be there from the start. Cc: Jonathan McDowell Signed-off-by: Christian Marangi Reviewed-by: Jonathan McDowell Tested-by: Jonathan McDowell Signed-off-by: David S. Miller --- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index f908889c4f95..47a5d1849c72 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -38,8 +38,6 @@ switch0: switch@10 { compatible = "qca,qca8337"; - #address-cells = <1>; - #size-cells = <0>; dsa,member = <0 0>; @@ -105,8 +103,6 @@ switch1: switch@14 { compatible = "qca,qca8337"; - #address-cells = <1>; - #size-cells = <0>; dsa,member = <1 0>; -- cgit From 09930f1fb8750d5f4e668ab40733ab63cab58ed7 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Mon, 17 Apr 2023 17:17:35 +0200 Subject: ARM: dts: qcom: ipq8064-rb3011: Add Switch LED for each port Add Switch LED for each port for MikroTik RB3011UiAS-RM. MikroTik RB3011UiAS-RM is a 10 port device with 2 qca8337 switch chips connected. It was discovered that in the hardware design all 3 Switch LED trace of the related port is connected to the same LED. This was discovered by setting to 'always on' the related led in the switch regs and noticing that all 3 LED for the specific port (for example for port 1) cause the connected LED for port 1 to turn on. As an extra test we tried enabling 2 different LED for the port resulting in the LED turned off only if every led in the reg was off. Aside from this funny and strange hardware implementation, the device itself have one green LED for each port, resulting in 10 green LED one for each of the 10 supported port. Cc: Jonathan McDowell Signed-off-by: Christian Marangi Signed-off-by: David S. Miller --- arch/arm/boot/dts/qcom-ipq8064-rb3011.dts | 120 ++++++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts index 47a5d1849c72..4d509876294b 100644 --- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts +++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts @@ -65,26 +65,86 @@ port@1 { reg = <1>; label = "sw1"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@2 { reg = <2>; label = "sw2"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@3 { reg = <3>; label = "sw3"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@4 { reg = <4>; label = "sw4"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@5 { reg = <5>; label = "sw5"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; }; }; @@ -130,26 +190,86 @@ port@1 { reg = <1>; label = "sw6"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@2 { reg = <2>; label = "sw7"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@3 { reg = <3>; label = "sw8"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@4 { reg = <4>; label = "sw9"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; port@5 { reg = <5>; label = "sw10"; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; }; }; }; -- cgit From 380a8fe1b2f49f262673485d1c7f1c0da170a926 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Mon, 17 Apr 2023 17:17:37 +0200 Subject: arm: mvebu: dt: Add PHY LED support for 370-rd WAN port The WAN port of the 370-RD has a Marvell PHY, with one LED on the front panel.y List this LED in the device tree. Signed-off-by: Andrew Lunn Signed-off-by: Christian Marangi Signed-off-by: David S. Miller --- arch/arm/boot/dts/armada-370-rd.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index be005c9f42ef..2586f32a3e21 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -20,6 +20,7 @@ /dts-v1/; #include #include +#include #include #include "armada-370.dtsi" @@ -135,6 +136,17 @@ pinctrl-names = "default"; phy0: ethernet-phy@0 { reg = <0>; + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@0 { + reg = <0>; + color = ; + function = LED_FUNCTION_WAN; + default-state = "keep"; + }; + }; }; switch: switch@10 { -- cgit