From db0d4db22a78d31c59087f7057b8f1612fecc35d Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Sat, 12 Nov 2011 16:09:49 +0000 Subject: ARM: gic: allow GIC to support non-banked setups The GIC support code is heavily using the fact that hardware implementations are exposing banked registers. Unfortunately, it looks like at least one GIC implementation (EXYNOS) offers both the distributor and the CPU interfaces at different addresses, depending on the CPU. This problem is solved by allowing the distributor and CPU interface addresses to be per-cpu variables for the platforms that require it. The EXYNOS code is updated not to mess with the GIC internals while handling interrupts, and struct gic_chip_data is back to being private. The DT binding for the gic is updated to allow an optional "cpu-offset" value, which is used to compute the various base addresses. Finally, a new config option (GIC_NON_BANKED) is used to control this feature, so the overhead is only present on kernels compiled with support for EXYNOS. Tested on Origen (EXYNOS4) and Panda (OMAP4). Cc: Kukjin Kim Cc: Will Deacon Cc: Thomas Abraham Acked-by: Rob Herring Signed-off-by: Marc Zyngier --- arch/arm/common/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/common/Kconfig') diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 74df9ca2be31..a3beda1213da 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -2,6 +2,9 @@ config ARM_GIC select IRQ_DOMAIN bool +config GIC_NON_BANKED + bool + config ARM_VIC bool -- cgit