From 07dde66c29aaba3055fec074af223a26ba433af4 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Sun, 4 Jan 2015 14:31:39 +0800 Subject: ARM: sirf: drop Marco low-level debug port Marco will not be supported any more. it has been replaced by CSR Atlas7. Signed-off-by: Barry Song Acked-by: Arnd Bergmann --- arch/arm/include/debug/sirf.S | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S index dbf250cf18e6..006ec9fb20c6 100644 --- a/arch/arm/include/debug/sirf.S +++ b/arch/arm/include/debug/sirf.S @@ -8,8 +8,6 @@ #if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) #define SIRFSOC_UART1_PA_BASE 0xb0060000 -#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1) -#define SIRFSOC_UART1_PA_BASE 0xcc060000 #else #define SIRFSOC_UART1_PA_BASE 0 #endif -- cgit From 9edb4b132f1879a24ac2b4495239175fa13b27fe Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Mon, 30 Jun 2014 14:49:39 -0700 Subject: ARM: debug: msm: Support big-endian CPUs If the CPU is in big-endian mode these macros will access the hardware incorrectly. Reverse thins as necessary to fix this. Signed-off-by: Stephen Boyd Signed-off-by: Kumar Gala --- arch/arm/include/debug/msm.S | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S index 9ef57612811d..e55a9426b496 100644 --- a/arch/arm/include/debug/msm.S +++ b/arch/arm/include/debug/msm.S @@ -23,6 +23,7 @@ .endm .macro senduart, rd, rx +ARM_BE8(rev \rd, \rd ) #ifdef CONFIG_DEBUG_QCOM_UARTDM @ Write the 1 character to UARTDM_TF str \rd, [\rx, #0x70] @@ -35,24 +36,29 @@ #ifdef CONFIG_DEBUG_QCOM_UARTDM @ check for TX_EMT in UARTDM_SR ldr \rd, [\rx, #0x08] +ARM_BE8(rev \rd, \rd ) tst \rd, #0x08 bne 1002f @ wait for TXREADY in UARTDM_ISR 1001: ldr \rd, [\rx, #0x14] +ARM_BE8(rev \rd, \rd ) tst \rd, #0x80 beq 1001b 1002: @ Clear TX_READY by writing to the UARTDM_CR register mov \rd, #0x300 +ARM_BE8(rev \rd, \rd ) str \rd, [\rx, #0x10] @ Write 0x1 to NCF register mov \rd, #0x1 +ARM_BE8(rev \rd, \rd ) str \rd, [\rx, #0x40] @ UARTDM reg. Read to induce delay ldr \rd, [\rx, #0x08] #else @ wait for TX_READY 1001: ldr \rd, [\rx, #0x08] +ARM_BE8(rev \rd, \rd ) tst \rd, #0x04 beq 1001b #endif -- cgit From 01ea63d99397fcdcb9cc235c77a8e11f4e4a63e9 Mon Sep 17 00:00:00 2001 From: Guo Zeng Date: Sun, 4 Jan 2015 17:40:54 +0800 Subject: ARM: sirf: add two debug ports for CSRatlas7 SoC this patch adds UART0 and UART1 as LLUART port, as the new Atlas7 registers layout are different, it also refines some names of old hard-coded MARCOs and uses CONFIG_DEBUG_UART_PHYS/DEBUG_UART_VIRT to define different base addresses for multiple ports. Signed-off-by: Guo Zeng Signed-off-by: Zhiwu Song Signed-off-by: Barry Song Acked-by: Arnd Bergmann --- arch/arm/include/debug/sirf.S | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/sirf.S b/arch/arm/include/debug/sirf.S index 006ec9fb20c6..630f231f2f37 100644 --- a/arch/arm/include/debug/sirf.S +++ b/arch/arm/include/debug/sirf.S @@ -6,35 +6,33 @@ * Licensed under GPLv2 or later. */ -#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1) -#define SIRFSOC_UART1_PA_BASE 0xb0060000 -#else -#define SIRFSOC_UART1_PA_BASE 0 -#endif +#define SIRF_LLUART_TXFIFO_STATUS 0x0114 +#define SIRF_LLUART_TXFIFO_DATA 0x0118 -#define SIRFSOC_UART1_VA_BASE 0xFEC60000 +#define SIRF_LLUART_TXFIFO_FULL (1 << 5) -#define SIRFSOC_UART_TXFIFO_STATUS 0x0114 -#define SIRFSOC_UART_TXFIFO_DATA 0x0118 +#ifdef CONFIG_DEBUG_SIRFATLAS7_UART0 +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 8) +#else +#define SIRF_LLUART_TXFIFO_EMPTY (1 << 6) +#endif -#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5) -#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6) .macro addruart, rp, rv, tmp - ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical - ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual + ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical + ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual .endm .macro senduart,rd,rx - str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA] + str \rd, [\rx, #SIRF_LLUART_TXFIFO_DATA] .endm .macro busyuart,rd,rx .endm .macro waituart,rd,rx -1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS] - tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY +1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS] + tst \rd, #SIRF_LLUART_TXFIFO_EMPTY beq 1001b .endm -- cgit From e23814da826283ee540f2c0837bba1937cd8f6b5 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Wed, 14 Jan 2015 10:40:31 +0200 Subject: ARM: digicolor: add low level debug support Use the USART peripheral as UART for low level debug. Only the UA0 port is currently supported. Acked-by: Arnd Bergmann Signed-off-by: Baruch Siach Signed-off-by: Olof Johansson --- arch/arm/include/debug/digicolor.S | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 arch/arm/include/debug/digicolor.S (limited to 'arch/arm/include/debug') diff --git a/arch/arm/include/debug/digicolor.S b/arch/arm/include/debug/digicolor.S new file mode 100644 index 000000000000..c9517150766a --- /dev/null +++ b/arch/arm/include/debug/digicolor.S @@ -0,0 +1,35 @@ +/* + * Debugging macro include header for Conexant Digicolor USART + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#define UA0_STATUS 0x0742 +#define UA0_EMI_REC 0x0744 + +#define UA0_STATUS_TX_READY 0x40 + +#ifdef CONFIG_DEBUG_UART_PHYS + .macro addruart, rp, rv, tmp + ldr \rp, =CONFIG_DEBUG_UART_PHYS + ldr \rv, =CONFIG_DEBUG_UART_VIRT + .endm +#endif + + .macro senduart,rd,rx + strb \rd, [\rx, #UA0_EMI_REC] + .endm + + .macro waituart,rd,rx + .endm + + .macro busyuart,rd,rx +1001: ldrb \rd, [\rx, #UA0_STATUS] + tst \rd, #UA0_STATUS_TX_READY + beq 1001b + .endm -- cgit