From 48be9ac930086f7605fb4959936f568e865b2cff Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 28 Feb 2013 18:19:16 +0100 Subject: ARM: Dove: split legacy and DT setup In the beginning of DT for Dove it was reasonable to have it close to non-DT code. With improved DT support, it became more and more difficult to not break non-DT while changing DT code. This patch splits up DT board setup and introduces a DOVE_LEGACY config to allow to remove legacy code for DT-only kernels. Signed-off-by: Sebastian Hesselbarth Signed-off-by: Jason Cooper --- arch/arm/mach-dove/common.c | 85 --------------------------------------------- 1 file changed, 85 deletions(-) (limited to 'arch/arm/mach-dove/common.c') diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index ea84c535a110..c6b3b2bb50e7 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -360,88 +360,3 @@ void dove_restart(char mode, const char *cmd) while (1) ; } - -#if defined(CONFIG_MACH_DOVE_DT) -/* - * There are still devices that doesn't even know about DT, - * get clock gates here and add a clock lookup. - */ -static void __init dove_legacy_clk_init(void) -{ - struct device_node *np = of_find_compatible_node(NULL, NULL, - "marvell,dove-gating-clock"); - struct of_phandle_args clkspec; - - clkspec.np = np; - clkspec.args_count = 1; - - clkspec.args[0] = CLOCK_GATING_BIT_USB0; - orion_clkdev_add(NULL, "orion-ehci.0", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_USB1; - orion_clkdev_add(NULL, "orion-ehci.1", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_GBE; - orion_clkdev_add(NULL, "mv643xx_eth_port.0", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_PCIE0; - orion_clkdev_add("0", "pcie", - of_clk_get_from_provider(&clkspec)); - - clkspec.args[0] = CLOCK_GATING_BIT_PCIE1; - orion_clkdev_add("1", "pcie", - of_clk_get_from_provider(&clkspec)); -} - -static void __init dove_of_clk_init(void) -{ - mvebu_clocks_init(); - dove_legacy_clk_init(); -} - -static struct mv643xx_eth_platform_data dove_dt_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT, -}; - -static void __init dove_dt_init(void) -{ - pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n", - (dove_tclk + 499999) / 1000000); - -#ifdef CONFIG_CACHE_TAUROS2 - tauros2_init(0); -#endif - dove_setup_cpu_mbus(); - - /* Setup root of clk tree */ - dove_of_clk_init(); - - /* Internal devices not ported to DT yet */ - dove_rtc_init(); - - dove_ge00_init(&dove_dt_ge00_data); - dove_ehci0_init(); - dove_ehci1_init(); - dove_pcie_init(1, 1); - - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -} - -static const char * const dove_dt_board_compat[] = { - "marvell,dove", - NULL -}; - -DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)") - .map_io = dove_map_io, - .init_early = dove_init_early, - .init_irq = orion_dt_init_irq, - .init_time = dove_timer_init, - .init_machine = dove_dt_init, - .restart = dove_restart, - .dt_compat = dove_dt_board_compat, -MACHINE_END -#endif -- cgit