From 5c34a4e89c743339f78cafb2f2a826a010f0746a Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Thu, 2 Jun 2016 14:10:16 +0200 Subject: ARM: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This replaces: - "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can now be selected directly. - "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB is now selectable by everyone, so we need not declare our intent to select it. When ordering the symbols the following rationale was used: if the selects were in alphabetical order, I moved select GPIOLIB to be in alphabetical order, but if the selects were not maintained in alphabetical order, I just replaced "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB". Cc: Michael Büsch Cc: arm@kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Linus Walleij Signed-off-by: Olof Johansson --- arch/arm/mach-imx/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index dd905b9602a0..859e584f1f01 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -1,10 +1,10 @@ menuconfig ARCH_MXC bool "Freescale i.MX family" depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M - select ARCH_REQUIRE_GPIOLIB select ARCH_SUPPORTS_BIG_ENDIAN select CLKSRC_IMX_GPT select GENERIC_IRQ_CHIP + select GPIOLIB select PINCTRL select PM_OPP if PM select SOC_BUS -- cgit From 27e583abdf24dc0e408252335edfacb1b5183b47 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Wed, 1 Jun 2016 22:07:31 +0300 Subject: ARM: imx: Remove orphan header The header eukrea-baseboards.h is not used, remove it. Signed-off-by: Alexander Shiyan Signed-off-by: Shawn Guo --- arch/arm/mach-imx/eukrea-baseboards.h | 42 ----------------------------------- 1 file changed, 42 deletions(-) delete mode 100644 arch/arm/mach-imx/eukrea-baseboards.h (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/eukrea-baseboards.h b/arch/arm/mach-imx/eukrea-baseboards.h deleted file mode 100644 index bb2c90d65914..000000000000 --- a/arch/arm/mach-imx/eukrea-baseboards.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2010 Eric Benard - eric@eukrea.com - * - * Based on board-pcm038.h which is : - * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MACH_EUKREA_BASEBOARDS_H__ -#define __MACH_EUKREA_BASEBOARDS_H__ - -#ifndef __ASSEMBLY__ -/* - * This CPU module needs a baseboard to work. After basic initializing - * its own devices, it calls baseboard's init function. - * TODO: Add your own baseboard init function and call it from - * inside eukrea_cpuimx25_init() or eukrea_cpuimx35_init() - * - * This example here is for the development board. Refer - * mach-mx25/eukrea_mbimxsd-baseboard.c for cpuimx25 - * mach-mx3/eukrea_mbimxsd-baseboard.c for cpuimx35 - */ - -extern void eukrea_mbimxsd25_baseboard_init(void); -extern void eukrea_mbimxsd35_baseboard_init(void); - -#endif - -#endif /* __MACH_EUKREA_BASEBOARDS_H__ */ -- cgit From ead812669980aad571fdcfeb239d47c405dd248b Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Wed, 1 Jun 2016 22:07:32 +0300 Subject: ARM: imx: Use IRQCHIP_DECLARE for TZIC Remove boilerplate code by using IRQCHIP_DECLARE macro. Signed-off-by: Alexander Shiyan Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 - arch/arm/mach-imx/mach-imx50.c | 1 - arch/arm/mach-imx/mach-imx51.c | 1 - arch/arm/mach-imx/mach-imx53.c | 1 - arch/arm/mach-imx/tzic.c | 10 +++++----- 5 files changed, 5 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 58a38464480d..60d9ae63f76e 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -32,7 +32,6 @@ void imx27_init_early(void); void imx31_init_early(void); void imx35_init_early(void); void mxc_init_irq(void __iomem *); -void tzic_init_irq(void); void mx1_init_irq(void); void mx21_init_irq(void); void mx27_init_irq(void); diff --git a/arch/arm/mach-imx/mach-imx50.c b/arch/arm/mach-imx/mach-imx50.c index ecf58b9e974b..4cab5f61260f 100644 --- a/arch/arm/mach-imx/mach-imx50.c +++ b/arch/arm/mach-imx/mach-imx50.c @@ -22,6 +22,5 @@ static const char * const imx50_dt_board_compat[] __initconst = { }; DT_MACHINE_START(IMX50_DT, "Freescale i.MX50 (Device Tree Support)") - .init_irq = tzic_init_irq, .dt_compat = imx50_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx51.c b/arch/arm/mach-imx/mach-imx51.c index 10a82a4f1e58..7296c31849a8 100644 --- a/arch/arm/mach-imx/mach-imx51.c +++ b/arch/arm/mach-imx/mach-imx51.c @@ -69,7 +69,6 @@ static const char * const imx51_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") .init_early = imx51_init_early, - .init_irq = tzic_init_irq, .init_machine = imx51_dt_init, .init_late = imx51_init_late, .dt_compat = imx51_dt_board_compat, diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c index 18b5c5c136db..d251cecd9bd2 100644 --- a/arch/arm/mach-imx/mach-imx53.c +++ b/arch/arm/mach-imx/mach-imx53.c @@ -49,7 +49,6 @@ static const char * const imx53_dt_board_compat[] __initconst = { DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") .init_early = imx53_init_early, - .init_irq = tzic_init_irq, .init_machine = imx53_dt_init, .init_late = imx53_init_late, .dt_compat = imx53_dt_board_compat, diff --git a/arch/arm/mach-imx/tzic.c b/arch/arm/mach-imx/tzic.c index ae23d50f7861..a53fdc263a37 100644 --- a/arch/arm/mach-imx/tzic.c +++ b/arch/arm/mach-imx/tzic.c @@ -9,12 +9,11 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include -#include #include #include #include #include +#include #include #include #include @@ -153,13 +152,11 @@ static void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs) * interrupts. It registers the interrupt enable and disable functions * to the kernel for each interrupt source. */ -void __init tzic_init_irq(void) +static int __init tzic_init_dt(struct device_node *np, struct device_node *p) { - struct device_node *np; int irq_base; int i; - np = of_find_compatible_node(NULL, NULL, "fsl,tzic"); tzic_base = of_iomap(np, 0); WARN_ON(!tzic_base); @@ -199,7 +196,10 @@ void __init tzic_init_irq(void) #endif pr_info("TrustZone Interrupt Controller (TZIC) initialized\n"); + + return 0; } +IRQCHIP_DECLARE(tzic, "fsl,tzic", tzic_init_dt); /** * tzic_enable_wake() - enable wakeup interrupt -- cgit From c00e4c54d56cdce018e9b09614511e5ad17e2f8c Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Sat, 18 Jun 2016 18:09:27 -0700 Subject: ARM: i.MX: system.c: Convert goto to if statement Using goto here doesn't bring any advantages and only makes the code flow less clear. No functional changes. Acked-by: Arnd Bergmann Signed-off-by: Andrey Smirnov Signed-off-by: Shawn Guo --- arch/arm/mach-imx/system.c | 36 +++++++++++++++++------------------- 1 file changed, 17 insertions(+), 19 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 105d1ce4ed9d..d9f8b0e1d96a 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -106,26 +106,24 @@ void __init imx_init_l2cache(void) goto out; } - if (readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN) - goto skip_if_enabled; - - /* Configure the L2 PREFETCH and POWER registers */ - val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); - val |= 0x70800000; - /* - * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 - * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 - * But according to ARM PL310 errata: 752271 - * ID: 752271: Double linefill feature can cause data corruption - * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 - * Workaround: The only workaround to this erratum is to disable the - * double linefill feature. This is the default behavior. - */ - if (cpu_is_imx6q()) - val &= ~(1 << 30 | 1 << 23); - writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); + if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { + /* Configure the L2 PREFETCH and POWER registers */ + val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); + val |= 0x70800000; + /* + * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 + * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 + * But according to ARM PL310 errata: 752271 + * ID: 752271: Double linefill feature can cause data corruption + * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 + * Workaround: The only workaround to this erratum is to disable the + * double linefill feature. This is the default behavior. + */ + if (cpu_is_imx6q()) + val &= ~(1 << 30 | 1 << 23); + writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); + } -skip_if_enabled: iounmap(l2x0_base); of_node_put(np); -- cgit From cf30056384dfb2e3efc0cf0404979a24a1f5c194 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Sat, 18 Jun 2016 18:09:28 -0700 Subject: ARM: i.MX: system.c: Remove redundant errata 752271 code Applying a fix for ARM errata 752271 would already be taken care by a call to a 'fixup' hook as a part of l2x0_of_init() -> __l2c_init() call chain. Moreso the code in 'fixup' function would do that based on the PL310's revsion information, whereas removed code does so based on SoC version which does not work very well on i.MX6Q+ which identifies itself as i.MX6Q as well but is not affected by 752271. Acked-by: Arnd Bergmann Signed-off-by: Andrey Smirnov Signed-off-by: Shawn Guo --- arch/arm/mach-imx/system.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index d9f8b0e1d96a..b1533768adb0 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -110,17 +110,6 @@ void __init imx_init_l2cache(void) /* Configure the L2 PREFETCH and POWER registers */ val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); val |= 0x70800000; - /* - * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 - * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 - * But according to ARM PL310 errata: 752271 - * ID: 752271: Double linefill feature can cause data corruption - * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 - * Workaround: The only workaround to this erratum is to disable the - * double linefill feature. This is the default behavior. - */ - if (cpu_is_imx6q()) - val &= ~(1 << 30 | 1 << 23); writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); } -- cgit From b829037136766abf34456e2406bab67d689b3538 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Sat, 18 Jun 2016 18:09:29 -0700 Subject: ARM: i.MX: system.c: Replace magic numbers Replace magic numbers used to form L310 Prefetch Control Register value. Acked-by: Arnd Bergmann Signed-off-by: Andrey Smirnov Signed-off-by: Shawn Guo --- arch/arm/mach-imx/system.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index b1533768adb0..76d7ebe883d7 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -109,7 +109,10 @@ void __init imx_init_l2cache(void) if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { /* Configure the L2 PREFETCH and POWER registers */ val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); - val |= 0x70800000; + val |= L310_PREFETCH_CTRL_DBL_LINEFILL | + L310_PREFETCH_CTRL_INSTR_PREFETCH | + L310_PREFETCH_CTRL_DATA_PREFETCH | + L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); } -- cgit From 1d9e94779956b765d316924cc39af2165ad631fb Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Sat, 18 Jun 2016 18:09:30 -0700 Subject: ARM: i.MX: system.c: Tweak prefetch settings for performance Update Prefetch Control Register settings to match that of Freescale's Linux tree. As the commit e3addf1b773964eac7f797e8538c69481be4279c states (author Nitin Garg): "... set Prefetch offset to 15, since it improves memcpy performance by 35%. Don't enable Incr double Linefill enable since it adversely affects memcpy performance by about 32MB/s and reads by 90MB/s. Tested with 4K to 16MB sized src and dst aligned buffer..." Those results are also corroborated by our own testing. Acked-by: Arnd Bergmann Tested-by: Chris Healy Signed-off-by: Andrey Smirnov Signed-off-by: Shawn Guo --- arch/arm/mach-imx/system.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 76d7ebe883d7..bf7ab779d5bf 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -111,8 +111,12 @@ void __init imx_init_l2cache(void) val = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); val |= L310_PREFETCH_CTRL_DBL_LINEFILL | L310_PREFETCH_CTRL_INSTR_PREFETCH | - L310_PREFETCH_CTRL_DATA_PREFETCH | - L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; + L310_PREFETCH_CTRL_DATA_PREFETCH; + + /* Set perfetch offset to improve performance */ + val &= ~L310_PREFETCH_CTRL_OFFSET_MASK; + val |= 15; + writel_relaxed(val, l2x0_base + L310_PREFETCH_CTRL); } -- cgit From 510aca642040cfb05e392218f6540ea35af51916 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Sat, 18 Jun 2016 18:09:31 -0700 Subject: ARM: i.MX: Do not explicitly call l2x0_of_init() There's no need to explicitly call l2x0_of_init() since it will be called as a part of init_IRQ() (see arch/arm/kernel/irq.c for details). This way we can simplify imx_init_l2cache() and ditch the call to it on i.MX35 (which does not claim compatibility with "arm,pl310-cache") alltogether. Acked-by: Arnd Bergmann Suggested-by: Arnd Bergmann Signed-off-by: Andrey Smirnov Signed-off-by: Shawn Guo --- arch/arm/mach-imx/imx35-dt.c | 10 +++------- arch/arm/mach-imx/mach-imx6q.c | 2 ++ arch/arm/mach-imx/mach-imx6sl.c | 2 ++ arch/arm/mach-imx/mach-imx6sx.c | 2 ++ arch/arm/mach-imx/system.c | 12 ++++-------- 5 files changed, 13 insertions(+), 15 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx35-dt.c b/arch/arm/mach-imx/imx35-dt.c index e9396037235d..99bb63dedb87 100644 --- a/arch/arm/mach-imx/imx35-dt.c +++ b/arch/arm/mach-imx/imx35-dt.c @@ -20,20 +20,16 @@ #include "common.h" #include "mx35.h" -static void __init imx35_irq_init(void) -{ - imx_init_l2cache(); - mx35_init_irq(); -} - static const char * const imx35_dt_board_compat[] __initconst = { "fsl,imx35", NULL }; DT_MACHINE_START(IMX35_DT, "Freescale i.MX35 (Device Tree Support)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .map_io = mx35_map_io, .init_early = imx35_init_early, - .init_irq = imx35_irq_init, + .init_irq = mx35_init_irq, .dt_compat = imx35_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index cb27d566d5ab..b31890f1e4a4 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -407,6 +407,8 @@ static const char * const imx6q_dt_compat[] __initconst = { }; DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .smp = smp_ops(imx_smp_ops), .map_io = imx6q_map_io, .init_irq = imx6q_init_irq, diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index 300326373166..f9a9a362a88a 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -75,6 +75,8 @@ static const char * const imx6sl_dt_compat[] __initconst = { }; DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .init_irq = imx6sl_init_irq, .init_machine = imx6sl_init_machine, .init_late = imx6sl_init_late, diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c index 6a0b0614de29..07a3a340f151 100644 --- a/arch/arm/mach-imx/mach-imx6sx.c +++ b/arch/arm/mach-imx/mach-imx6sx.c @@ -103,6 +103,8 @@ static const char * const imx6sx_dt_compat[] __initconst = { }; DT_MACHINE_START(IMX6SX, "Freescale i.MX6 SoloX (Device Tree)") + .l2c_aux_val = 0, + .l2c_aux_mask = ~0, .init_irq = imx6sx_init_irq, .init_machine = imx6sx_init_machine, .dt_compat = imx6sx_dt_compat, diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index bf7ab779d5bf..e442ed7f7ff5 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -98,13 +98,11 @@ void __init imx_init_l2cache(void) np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache"); if (!np) - goto out; + return; l2x0_base = of_iomap(np, 0); - if (!l2x0_base) { - of_node_put(np); - goto out; - } + if (!l2x0_base) + goto put_node; if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) { /* Configure the L2 PREFETCH and POWER registers */ @@ -121,9 +119,7 @@ void __init imx_init_l2cache(void) } iounmap(l2x0_base); +put_node: of_node_put(np); - -out: - l2x0_of_init(0, ~0); } #endif -- cgit From 6f98cb22e4089c3eb63ff86fac010291a0e30241 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 24 Jun 2016 12:49:56 +0200 Subject: ARM: imx: remove cpu_is_mx1 check There is only one call site for this, and it's easily replaced by initializing the reset value at boot time. Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/mm-imx1.c | 2 +- arch/arm/mach-imx/system.c | 16 +++++++++------- 3 files changed, 11 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 60d9ae63f76e..0a1d1f175b7a 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -54,6 +54,7 @@ struct platform_device *mxc_register_gpio(char *name, int id, void mxc_set_cpu_type(unsigned int type); void mxc_restart(enum reboot_mode, const char *); void mxc_arch_reset_init(void __iomem *); +void imx1_reset_init(void __iomem *); void imx_set_aips(void __iomem *); void imx_aips_allow_unprivileged_access(const char *compat); int mxc_device_init(void); diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index e065fedb3ad4..9a42f19be81e 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -50,7 +50,7 @@ void __init mx1_init_irq(void) void __init imx1_soc_init(void) { - mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); + imx1_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); mxc_device_init(); mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256, diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index e442ed7f7ff5..c06af650e6b1 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -34,25 +34,19 @@ static void __iomem *wdog_base; static struct clk *wdog_clk; +static int wcr_enable = (1 << 2); /* * Reset the system. It is called by machine_restart(). */ void mxc_restart(enum reboot_mode mode, const char *cmd) { - unsigned int wcr_enable; - if (!wdog_base) goto reset_fallback; if (!IS_ERR(wdog_clk)) clk_enable(wdog_clk); - if (cpu_is_mx1()) - wcr_enable = (1 << 0); - else - wcr_enable = (1 << 2); - /* Assert SRS signal */ imx_writew(wcr_enable, wdog_base); /* @@ -89,6 +83,14 @@ void __init mxc_arch_reset_init(void __iomem *base) clk_prepare(wdog_clk); } +#ifdef CONFIG_SOC_IMX1 +void __init imx1_reset_init(void __iomem *base) +{ + wcr_enable = (1 << 0); + mxc_arch_reset_init(base); +} +#endif + #ifdef CONFIG_CACHE_L2X0 void __init imx_init_l2cache(void) { -- cgit From c9ee94965dce7b66964c5f0b0db892055757d608 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 24 Jun 2016 12:49:57 +0200 Subject: ARM: imx: deconstruct mxc_rnga initialization The rnga platform device is initialized for all imx31 machines from its own initcall, but is never initialized anywhere else. This moves the platform device creation into both the imx31 dt and non-dt machine init sequences, which has basically the exact same effect as before, but makes it more obvious what is going on, while reducing the amount of code and removing the last user of cpu_is_mx31(). Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 4 -- arch/arm/mach-imx/devices/Kconfig | 4 -- arch/arm/mach-imx/devices/platform-mxc_rnga.c | 53 --------------------------- arch/arm/mach-imx/imx31-dt.c | 12 ++++++ arch/arm/mach-imx/mm-imx3.c | 6 +++ 5 files changed, 18 insertions(+), 61 deletions(-) delete mode 100644 arch/arm/mach-imx/devices/platform-mxc_rnga.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index dd905b9602a0..7816321d7a99 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -44,9 +44,6 @@ config MXC_USE_EPIT uses the same clocks as the GPT. Anyway, on some systems the GPT may be in use for other purposes. -config ARCH_HAS_RNGA - bool - config HAVE_IMX_ANATOP bool @@ -90,7 +87,6 @@ config SOC_IMX27 config SOC_IMX31 bool select CPU_V6 - select IMX_HAVE_PLATFORM_MXC_RNGA select MXC_AVIC select SMP_ON_UP if SMP diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig index 3a552989248e..6ffe57267233 100644 --- a/arch/arm/mach-imx/devices/Kconfig +++ b/arch/arm/mach-imx/devices/Kconfig @@ -57,10 +57,6 @@ config IMX_HAVE_PLATFORM_MXC_MMC config IMX_HAVE_PLATFORM_MXC_NAND bool -config IMX_HAVE_PLATFORM_MXC_RNGA - bool - select ARCH_HAS_RNGA - config IMX_HAVE_PLATFORM_MXC_RTC bool diff --git a/arch/arm/mach-imx/devices/platform-mxc_rnga.c b/arch/arm/mach-imx/devices/platform-mxc_rnga.c deleted file mode 100644 index 851fbc8af7a9..000000000000 --- a/arch/arm/mach-imx/devices/platform-mxc_rnga.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2010 Pengutronix - * Uwe Kleine-Koenig - * - * This program is free software; you can redistribute it and/or modify it under - * the terms of the GNU General Public License version 2 as published by the - * Free Software Foundation. - */ -#include "../hardware.h" -#include "devices-common.h" - -struct imx_mxc_rnga_data { - resource_size_t iobase; -}; - -#define imx_mxc_rnga_data_entry_single(soc) \ - { \ - .iobase = soc ## _RNGA_BASE_ADDR, \ - } - -#ifdef CONFIG_SOC_IMX31 -static const struct imx_mxc_rnga_data imx31_mxc_rnga_data __initconst = - imx_mxc_rnga_data_entry_single(MX31); -#endif /* ifdef CONFIG_SOC_IMX31 */ - -static struct platform_device *__init imx_add_mxc_rnga( - const struct imx_mxc_rnga_data *data) -{ - struct resource res[] = { - { - .start = data->iobase, - .end = data->iobase + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - }; - return imx_add_platform_device("mxc_rnga", -1, - res, ARRAY_SIZE(res), NULL, 0); -} - -static int __init imxXX_add_mxc_rnga(void) -{ - struct platform_device *ret; - -#if defined(CONFIG_SOC_IMX31) - if (cpu_is_mx31()) - ret = imx_add_mxc_rnga(&imx31_mxc_rnga_data); - else -#endif /* if defined(CONFIG_SOC_IMX31) */ - ret = ERR_PTR(-ENODEV); - - return PTR_ERR_OR_ZERO(ret); -} -arch_initcall(imxXX_add_mxc_rnga); diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c index 32100222a017..62e6b4fb5370 100644 --- a/arch/arm/mach-imx/imx31-dt.c +++ b/arch/arm/mach-imx/imx31-dt.c @@ -28,10 +28,22 @@ static void __init imx31_dt_timer_init(void) mx31_clocks_init_dt(); } +/* FIXME: replace with DT binding */ +static const struct resource imx31_rnga_res[] __initconst = { + DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), +}; + +static void __init imx31_dt_mach_init(void) +{ + platform_device_register_simple("mxc_rnga", -1, imx31_rnga_res, + ARRAY_SIZE(imx31_rnga_res)); +} + DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)") .map_io = mx31_map_io, .init_early = imx31_init_early, .init_irq = mx31_init_irq, .init_time = imx31_dt_timer_init, + .init_machine = imx31_dt_mach_init, .dt_compat = imx31_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 0884ca90d15a..3b135cd4b043 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -167,6 +167,10 @@ static const struct resource imx31_audmux_res[] __initconst = { DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K), }; +static const struct resource imx31_rnga_res[] __initconst = { + DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), +}; + void __init imx31_soc_init(void) { int to_version = mx31_revision() >> 4; @@ -195,6 +199,8 @@ void __init imx31_soc_init(void) platform_device_register_simple("imx31-audmux", 0, imx31_audmux_res, ARRAY_SIZE(imx31_audmux_res)); + platform_device_register_simple("mxc_rnga", -1, imx31_rnga_res, + ARRAY_SIZE(imx31_rnga_res)); } #endif /* ifdef CONFIG_SOC_IMX31 */ -- cgit From c112d2adc32c90ff39ad39feba8c29dcb6008ff6 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 24 Jun 2016 12:49:58 +0200 Subject: ARM: imx: deconstruct mx3_idle The imx31 and imx35 idle functions are almost the same, but we currently have to check the cpu type every time. This can be simplified by moving the logic from mx3_cpu_lp_set() into two separate idle functions, removing the last user of cpu_is_mx35. Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Makefile | 4 ++-- arch/arm/mach-imx/mm-imx3.c | 26 ++++++++++++++++++++++---- arch/arm/mach-imx/pm-imx3.c | 38 -------------------------------------- 3 files changed, 24 insertions(+), 44 deletions(-) delete mode 100644 arch/arm/mach-imx/pm-imx3.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 9fbe624a5ef9..9f5fffd62702 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -8,8 +8,8 @@ obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o -obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o -obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o pm-imx3.o +obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o +obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o imx5-pm-$(CONFIG_PM) += pm-imx5.o obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 3b135cd4b043..7638a35b3b36 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -38,8 +39,6 @@ static void imx3_idle(void) { unsigned long reg = 0; - mx3_cpu_lp_set(MX3_WAIT); - __asm__ __volatile__( /* disable I and D cache */ "mrc p15, 0, %0, c1, c0, 0\n" @@ -135,11 +134,20 @@ void __init mx31_map_io(void) iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc)); } +static void imx31_idle(void) +{ + int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR); + reg &= ~MXC_CCM_CCMR_LPM_MASK; + imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR); + + imx3_idle(); +} + void __init imx31_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX31); arch_ioremap_caller = imx3_ioremap_caller; - arm_pm_idle = imx3_idle; + arm_pm_idle = imx31_idle; mx3_ccm_base = MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR); } @@ -218,11 +226,21 @@ void __init mx35_map_io(void) iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc)); } +static void imx35_idle(void) +{ + int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR); + reg &= ~MXC_CCM_CCMR_LPM_MASK; + reg |= MXC_CCM_CCMR_LPM_WAIT_MX35; + imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR); + + imx3_idle(); +} + void __init imx35_init_early(void) { mxc_set_cpu_type(MXC_CPU_MX35); mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); - arm_pm_idle = imx3_idle; + arm_pm_idle = imx35_idle; arch_ioremap_caller = imx3_ioremap_caller; mx3_ccm_base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR); } diff --git a/arch/arm/mach-imx/pm-imx3.c b/arch/arm/mach-imx/pm-imx3.c deleted file mode 100644 index 94c0898751d8..000000000000 --- a/arch/arm/mach-imx/pm-imx3.c +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ -#include - -#include "common.h" -#include "crmregs-imx3.h" -#include "devices/devices-common.h" -#include "hardware.h" - -/* - * Set cpu low power mode before WFI instruction. This function is called - * mx3 because it can be used for mx31 and mx35. - * Currently only WAIT_MODE is supported. - */ -void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode) -{ - int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR); - reg &= ~MXC_CCM_CCMR_LPM_MASK; - - switch (mode) { - case MX3_WAIT: - if (cpu_is_mx35()) - reg |= MXC_CCM_CCMR_LPM_WAIT_MX35; - imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR); - break; - default: - pr_err("Unknown cpu power mode: %d\n", mode); - return; - } -} -- cgit From 48e076dadd0a79047befa539487d8645ded0b7e7 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 28 Jun 2016 10:22:16 +0800 Subject: ARM: imx: rework mx27_pm_init() call mx27_pm_init() uses its own initcall, unlike all of the other functions like it. Replacing the initcall with a .init_late() callback makes imx27 more like the others and lets us remove the last caller of cpu_is_mx27(). Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/imx27-dt.c | 1 + arch/arm/mach-imx/mm-imx27.c | 2 ++ arch/arm/mach-imx/pm-imx27.c | 8 +------- 4 files changed, 5 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 0a1d1f175b7a..a8f469333027 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -67,6 +67,7 @@ void imx_gpc_set_arm_power_in_lpm(bool power_off); void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw); void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw); void imx25_pm_init(void); +void imx27_pm_init(void); enum mxc_cpu_pwr_mode { WAIT_CLOCKED, /* wfi only */ diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c index 530a728c2acc..a754b8a48f38 100644 --- a/arch/arm/mach-imx/imx27-dt.c +++ b/arch/arm/mach-imx/imx27-dt.c @@ -27,5 +27,6 @@ DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)") .map_io = mx27_map_io, .init_early = imx27_init_early, .init_irq = mx27_init_irq, + .init_late = imx27_pm_init, .dt_compat = imx27_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index 7d82a5a5b16b..862b9b7762c7 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -98,4 +98,6 @@ void __init imx27_soc_init(void) /* imx27 has the imx21 type audmux */ platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, ARRAY_SIZE(imx27_audmux_res)); + + imx27_pm_init(); } diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index 43096c8990d4..d943535566c8 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c @@ -37,13 +37,7 @@ static const struct platform_suspend_ops mx27_suspend_ops = { .valid = suspend_valid_only_mem, }; -static int __init mx27_pm_init(void) +void __init imx27_pm_init(void) { - if (!cpu_is_mx27()) - return 0; - suspend_set_ops(&mx27_suspend_ops); - return 0; } - -device_initcall(mx27_pm_init); -- cgit From 505c19f8bcb310f6e125c8c58e401a7093c82f5a Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 24 Jun 2016 12:50:00 +0200 Subject: ARM: imx: remove last call to cpu_is_mx5* The check for cpu_is_mx51/cpu_is_mx53() in mx51_revision()/mx53_revision() is just a safety precaution, but there are only two callers of this are using it only on the correct CPUs, and none of the other respective functions have this extra check. Removing these lets us kill off the cpu_is_* functions. Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/cpu-imx5.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c index 3403bac94a31..4f2d1c772f85 100644 --- a/arch/arm/mach-imx/cpu-imx5.c +++ b/arch/arm/mach-imx/cpu-imx5.c @@ -60,13 +60,9 @@ static int get_mx51_srev(void) /* * Returns: * the silicon revision of the cpu - * -EINVAL - not a mx51 */ int mx51_revision(void) { - if (!cpu_is_mx51()) - return -EINVAL; - if (mx5_cpu_rev == -1) mx5_cpu_rev = get_mx51_srev(); @@ -112,13 +108,9 @@ static int get_mx53_srev(void) /* * Returns: * the silicon revision of the cpu - * -EINVAL - not a mx53 */ int mx53_revision(void) { - if (!cpu_is_mx53()) - return -EINVAL; - if (mx5_cpu_rev == -1) mx5_cpu_rev = get_mx53_srev(); -- cgit From 44af782227b3977b98be6967533b0d23add40eb4 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 24 Jun 2016 12:50:01 +0200 Subject: ARM: imx: remove cpu_is_mx*() The mxc_cpu_type and cpu_is_mx() logic is largely unused, and the few remaining users were easy to convert into simpler code. Now that they are gone, we can remove all those macros as well. The related cpu_is_imx6*() set of function unfortunately is harder to remove, so those are staying around for now. Signed-off-by: Arnd Bergmann Signed-off-by: Shawn Guo --- arch/arm/mach-imx/cpu.c | 2 - arch/arm/mach-imx/mxc.h | 101 ------------------------------------------------ 2 files changed, 103 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 6a96b7cf468f..b3347d32349f 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -10,8 +10,6 @@ #include "common.h" unsigned int __mxc_cpu_type; -EXPORT_SYMBOL(__mxc_cpu_type); - static unsigned int imx_soc_revision; void mxc_set_cpu_type(unsigned int type) diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index d32704256781..34f2ff62583c 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -45,105 +45,7 @@ #ifndef __ASSEMBLY__ extern unsigned int __mxc_cpu_type; -#endif - -#ifdef CONFIG_SOC_IMX1 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX1 -# endif -# define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1) -#else -# define cpu_is_mx1() (0) -#endif - -#ifdef CONFIG_SOC_IMX21 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX21 -# endif -# define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21) -#else -# define cpu_is_mx21() (0) -#endif -#ifdef CONFIG_SOC_IMX25 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX25 -# endif -# define cpu_is_mx25() (mxc_cpu_type == MXC_CPU_MX25) -#else -# define cpu_is_mx25() (0) -#endif - -#ifdef CONFIG_SOC_IMX27 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX27 -# endif -# define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27) -#else -# define cpu_is_mx27() (0) -#endif - -#ifdef CONFIG_SOC_IMX31 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX31 -# endif -# define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31) -#else -# define cpu_is_mx31() (0) -#endif - -#ifdef CONFIG_SOC_IMX35 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX35 -# endif -# define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35) -#else -# define cpu_is_mx35() (0) -#endif - -#ifdef CONFIG_SOC_IMX51 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX51 -# endif -# define cpu_is_mx51() (mxc_cpu_type == MXC_CPU_MX51) -#else -# define cpu_is_mx51() (0) -#endif - -#ifdef CONFIG_SOC_IMX53 -# ifdef mxc_cpu_type -# undef mxc_cpu_type -# define mxc_cpu_type __mxc_cpu_type -# else -# define mxc_cpu_type MXC_CPU_MX53 -# endif -# define cpu_is_mx53() (mxc_cpu_type == MXC_CPU_MX53) -#else -# define cpu_is_mx53() (0) -#endif - -#ifndef __ASSEMBLY__ #ifdef CONFIG_SOC_IMX6SL static inline bool cpu_is_imx6sl(void) { @@ -190,9 +92,6 @@ int tzic_enable_wake(void); extern struct cpu_op *(*get_cpu_op)(int *op); #endif -#define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) -#define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) - #define imx_readl readl_relaxed #define imx_readw readw_relaxed #define imx_writel writel_relaxed -- cgit