From d093bc0378f5e3542bfbbae0c0533ae68e260013 Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Wed, 26 Jun 2019 23:42:19 +0200 Subject: ARM: mmp: add SMP support Used to bring up the second core on MMP3. Signed-off-by: Lubomir Rintel --- arch/arm/mach-mmp/platsmp.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/arm/mach-mmp/platsmp.c (limited to 'arch/arm/mach-mmp/platsmp.c') diff --git a/arch/arm/mach-mmp/platsmp.c b/arch/arm/mach-mmp/platsmp.c new file mode 100644 index 000000000000..c99405469bb4 --- /dev/null +++ b/arch/arm/mach-mmp/platsmp.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Lubomir Rintel + */ +#include +#include +#include +#include "addr-map.h" + +#define SW_BRANCH_VIRT_ADDR CIU_REG(0x24) + +static int mmp3_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + /* + * Apparently, the boot ROM on the second core spins on this + * register becoming non-zero and then jumps to the address written + * there. No IPIs involved. + */ + __raw_writel(__pa_symbol(secondary_startup), SW_BRANCH_VIRT_ADDR); + return 0; +} + +static void mmp3_smp_prepare_cpus(unsigned int max_cpus) +{ + scu_enable(SCU_VIRT_BASE); +} + +static const struct smp_operations mmp3_smp_ops __initconst = { + .smp_prepare_cpus = mmp3_smp_prepare_cpus, + .smp_boot_secondary = mmp3_boot_secondary, +}; +CPU_METHOD_OF_DECLARE(mmp3_smp, "marvell,mmp3-smp", &mmp3_smp_ops); -- cgit