From 38a1981ce31dc4c527cbc0137f638543261b471a Mon Sep 17 00:00:00 2001 From: Sricharan R Date: Wed, 18 Sep 2013 16:50:11 +0530 Subject: ARM: OMAP2+: DRA7: realtime_counter: Add ratio registers for 20MHZ sys-clk frequency The real time counter also called master counter, is a free-running counter. It produces the count used by the CPU local timer peripherals in the MPU cluster. The timer counts at a rate of 6.144 MHz. The ratio registers are missing for a sys-clk of 20MHZ which is used by DRA7 socs. So because of this, the counter was getting wrongly programmed for a sys-clk of 38.4Mhz(default). So adding the ratio registers for 20MHZ sys-clk. Tested-by: Nishanth Menon Acked-by: Santosh Shilimkar Signed-off-by: Sricharan R Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index fa74a0625da1..d0f80c020423 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -515,6 +515,10 @@ static void __init realtime_counter_init(void) num = 8; den = 25; break; + case 20000000: + num = 192; + den = 625; + break; case 2600000: num = 384; den = 1625; -- cgit From 5523e4092ee4f2ef58d00c78365c8bddf730c900 Mon Sep 17 00:00:00 2001 From: R Sricharan Date: Thu, 10 Oct 2013 13:13:48 +0530 Subject: ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register The realtime counter called master counter, produces the count used by the private timer peripherals in the MPU_CLUSTER. The CNTFRQ per cpu register is used to denote the frequency of the counter. Currently the frequency value is passed from the DT file, but this is not scalable when we have other non-DT guest OS. This register must be set to the right value by the secure rom code. Setting this register helps in propagating the right frequency value across OSes. More discussions and the reason for adding this in a non-DT way can be seen from below. http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html So configuring this secure register for all the cpus here. Cc: Nishanth Menon Cc: Rajendra Nayak Cc: Marc Zyngier Cc: Mark Rutland Tested-by: Nishanth Menon Acked-by: Santosh Shilimkar Signed-off-by: Sricharan R Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index d0f80c020423..87259dc82aa2 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -55,6 +55,7 @@ #include "soc.h" #include "common.h" #include "powerdomain.h" +#include "omap-secure.h" #define REALTIME_COUNTER_BASE 0x48243200 #define INCREMENTER_NUMERATOR_OFFSET 0x10 @@ -65,6 +66,12 @@ static struct omap_dm_timer clkev; static struct clock_event_device clockevent_gpt; +static unsigned long arch_timer_freq; + +void set_cntfreq(void) +{ + omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq); +} static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { @@ -546,6 +553,9 @@ static void __init realtime_counter_init(void) reg |= den; __raw_writel(reg, base + INCREMENTER_DENUMERATOR_RELOAD_OFFSET); + arch_timer_freq = (rate / den) * num; + set_cntfreq(); + iounmap(base); } #else -- cgit From d5da94b88efebc375bfcbab6bb0e59a6e8a6571e Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Fri, 11 Oct 2013 17:28:04 -0700 Subject: ARM: OMAP2+: Fix build error for realtime counter init if not enabled Otherwise we can get an error with some configs: arch/arm/mach-omap2/timer.c:73: undefined reference to `omap_smc1' Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/timer.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-omap2/timer.c') diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 87259dc82aa2..d59b51f07cf2 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -66,12 +66,15 @@ static struct omap_dm_timer clkev; static struct clock_event_device clockevent_gpt; + +#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER static unsigned long arch_timer_freq; void set_cntfreq(void) { omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq); } +#endif static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { -- cgit