From d85d5247885ef2e8192287b895c2e381fa931b0b Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Sun, 29 Mar 2020 22:33:14 +0200 Subject: ARM: OMAP2+: drop unnecessary adrl The adrl instruction has been introduced with commit dd31394779aa ("ARM: omap3: Thumb-2 compatibility for sleep34xx.S"), back when this assembly file was considerably longer. Today adr seems to have enough reach, even when inserting about 60 instructions between the use site and the label. Replace adrl with conventional adr instruction. This allows to build this file using Clang's integrated assembler (which does not support the adrl pseudo instruction). Link: https://github.com/ClangBuiltLinux/linux/issues/430 Signed-off-by: Stefan Agner Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/sleep34xx.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/sleep34xx.S b/arch/arm/mach-omap2/sleep34xx.S index ac1324c6453b..c4e97d35c310 100644 --- a/arch/arm/mach-omap2/sleep34xx.S +++ b/arch/arm/mach-omap2/sleep34xx.S @@ -72,7 +72,7 @@ ENTRY(enable_omap3630_toggle_l2_on_restore) stmfd sp!, {lr} @ save registers on stack /* Setup so that we will disable and enable l2 */ mov r1, #0x1 - adrl r3, l2dis_3630_offset @ may be too distant for plain adr + adr r3, l2dis_3630_offset ldr r2, [r3] @ value for offset str r1, [r2, r3] @ write to l2dis_3630 ldmfd sp!, {pc} @ restore regs and return -- cgit From f18e314a6bf1b7bdbc6f5af1d6dbda11bc2dd35b Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 29 Apr 2020 17:30:01 +0300 Subject: ARM: OMAP4: Make L4SEC clock domain SWSUP only Commit c2ce5fb3f3f5 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only') made DRA7 SoC L4SEC clock domain SWSUP only because of power state transition issues detected with HWSUP mode. Based on experimentation similar issue exists on OMAP4, so do the same change for OMAP4 also. Signed-off-by: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index 6005c4ed3bc6..8285be7c1eab 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -214,7 +214,7 @@ static struct clockdomain l4_secure_44xx_clkdm = { .dep_bit = OMAP4430_L4SEC_STATDEP_SHIFT, .wkdep_srcs = l4_secure_wkup_sleep_deps, .sleepdep_srcs = l4_secure_wkup_sleep_deps, - .flags = CLKDM_CAN_HWSUP_SWSUP, + .flags = CLKDM_CAN_SWSUP, }; static struct clockdomain l4_per_44xx_clkdm = { -- cgit From e88ba436e5615f5bb94deecbbb924227b15bbebb Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 29 Apr 2020 17:30:02 +0300 Subject: ARM: OMAP5: Make L4SEC clock domain SWSUP only Commit c2ce5fb3f3f5 ('ARM: OMAP: DRA7xx: Make L4SEC clock domain SWSUP only') made DRA7 SoC L4SEC clock domain SWSUP only because of power state transition issues detected with HWSUP mode. Based on experimentation similar issue exists on OMAP5, so do the same change for OMAP5 also. Signed-off-by: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clockdomains54xx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clockdomains54xx_data.c b/arch/arm/mach-omap2/clockdomains54xx_data.c index 3ab41fc89dd3..5611e08018a2 100644 --- a/arch/arm/mach-omap2/clockdomains54xx_data.c +++ b/arch/arm/mach-omap2/clockdomains54xx_data.c @@ -170,7 +170,7 @@ static struct clockdomain l4sec_54xx_clkdm = { .dep_bit = OMAP54XX_L4SEC_STATDEP_SHIFT, .wkdep_srcs = l4sec_wkup_sleep_deps, .sleepdep_srcs = l4sec_wkup_sleep_deps, - .flags = CLKDM_CAN_HWSUP_SWSUP, + .flags = CLKDM_CAN_SWSUP, }; static struct clockdomain iva_54xx_clkdm = { -- cgit From 4f0f02cc4b5406a3dc0079722aaa01b31c5783f7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 5 May 2020 17:07:19 +0200 Subject: ARM: omap2plus: Drop unneeded select of MIGHT_HAVE_CACHE_L2X0 Support for TI AM43x SoCs depends on ARCH_MULTI_V7, which selects ARCH_MULTI_V6_V7. As the latter selects MIGHT_HAVE_CACHE_L2X0, there is no need for SOC_AM43XX to select MIGHT_HAVE_CACHE_L2X0. Signed-off-by: Geert Uytterhoeven Cc: Tony Lindgren Cc: linux-omap@vger.kernel.org Acked-by: Arnd Bergmann Acked-by: Tony Lindgren Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index dca7d06c0b93..ea23205bf70f 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -66,7 +66,6 @@ config SOC_AM43XX select ARCH_OMAP2PLUS select ARM_GIC select MACH_OMAP_GENERIC - select MIGHT_HAVE_CACHE_L2X0 select HAVE_ARM_SCU select GENERIC_CLOCKEVENTS_BROADCAST select HAVE_ARM_TWD -- cgit From 90d0ce39f8b088a3f227acd79d79b5ccf5a091b3 Mon Sep 17 00:00:00 2001 From: Ma Feng Date: Mon, 11 May 2020 20:21:44 +0800 Subject: ARM: omap2: make omap5_erratum_workaround_801819 static Fix sparse warning: arch/arm/mach-omap2/omap-smp.c:75:6: warning: symbol 'omap5_erratum_workaround_801819' was not declared. Should it be static? Reported-by: Hulk Robot Signed-off-by: Ma Feng Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap-smp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 6a82fce3f822..570a987e6d1a 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -72,7 +72,7 @@ void __iomem *omap4_get_scu_base(void) } #ifdef CONFIG_OMAP5_ERRATA_801819 -void omap5_erratum_workaround_801819(void) +static void omap5_erratum_workaround_801819(void) { u32 acr, revidr; u32 acr_mask; -- cgit From d33e3d542b6c09a5cb4fa51d82109b2ca92e89c2 Mon Sep 17 00:00:00 2001 From: Samuel Zou Date: Tue, 12 May 2020 10:41:11 +0800 Subject: ARM: OMAP2+: pm33xx-core: Make am43xx_get_rtc_base_addr static Fix the following sparse warning: arch/arm/mach-omap2/pm33xx-core.c:270:14: warning: symbol 'am43xx_get_rtc_base_addr' was not declared. The am43xx_get_rtc_base_addr has only call site within pm33xx-core.c It should be static Fixes: 8c5a916f4c88 ("ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support") Reported-by: Hulk Robot Signed-off-by: Samuel Zou Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm33xx-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c index 5455fc98c60e..58236c7dc83e 100644 --- a/arch/arm/mach-omap2/pm33xx-core.c +++ b/arch/arm/mach-omap2/pm33xx-core.c @@ -267,7 +267,7 @@ static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void) return NULL; } -void __iomem *am43xx_get_rtc_base_addr(void) +static void __iomem *am43xx_get_rtc_base_addr(void) { rtc_oh = omap_hwmod_lookup("rtc"); -- cgit From e69b4e1a7577c169e9f52edf977401734a6a29eb Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: OMAP2+: Add omap_init_time_of() This allows us to move the SoCs to probe system timers one SoC at at time. As arch/arm/mach-omap2/timer.c will be eventually gone, let's just add omap_init_time_of() to board-generic.c directly. Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index ff992f8895ee..c6f7dcf13a15 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include @@ -31,6 +32,13 @@ static void __init __maybe_unused omap_generic_init(void) omap_soc_device_init(); } +/* Clocks are needed early, see drivers/clocksource for the rest */ +void __init __maybe_unused omap_init_time_of(void) +{ + omap_clk_init(); + timer_probe(); +} + #ifdef CONFIG_SOC_OMAP2420 static const char *const omap242x_boards_compat[] __initconst = { "ti,omap2420", -- cgit From e20ef23dd6937c38df2cfddf15270668153c8177 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for am335x We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 2 +- arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 2 -- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 10 ---------- 3 files changed, 1 insertion(+), 13 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index c6f7dcf13a15..cce9523eaa77 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -236,7 +236,7 @@ DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)") .init_early = am33xx_init_early, .init_machine = omap_generic_init, .init_late = am33xx_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = am33xx_boards_compat, .restart = am33xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index dca5a3a7b97c..99c633338488 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -367,12 +367,10 @@ struct omap_hwmod am33xx_timer2_hwmod = { static void omap_hwmod_am33xx_clkctrl(void) { - CLKCTRL(am33xx_timer2_hwmod, AM33XX_CM_PER_TIMER2_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex0_hwmod, AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex1_hwmod, AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET); - CLKCTRL(am33xx_timer1_hwmod, AM33XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET); CLKCTRL(am33xx_rtc_hwmod, AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET); PRCM_FLAGS(am33xx_rtc_hwmod, HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET); CLKCTRL(am33xx_gpmc_hwmod, AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET); diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index c64b735c8acc..3cf9c4c90b18 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -265,14 +265,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__control = { .user = OCP_USER_MPU, }; -/* l4 wkup -> timer1 */ -static struct omap_hwmod_ocp_if am33xx_l4_wkup__timer1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_timer1_hwmod, - .clk = "dpll_core_m4_div2_ck", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__emif, &am33xx_mpu__l3_main, @@ -291,9 +283,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l4_wkup__control, &am33xx_l4_wkup__smartreflex0, &am33xx_l4_wkup__smartreflex1, - &am33xx_l4_wkup__timer1, &am33xx_l4_wkup__rtc, - &am33xx_l4_ls__timer2, &am33xx_l3_s__gpmc, &am33xx_l3_main__ocmc, NULL, -- cgit From 545a95582e80a2c66527dbf7f0ae495902fc083a Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for am437x We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 2 +- .../mach-omap2/omap_hwmod_33xx_43xx_common_data.h | 2 - .../omap_hwmod_33xx_43xx_interconnect_data.c | 8 --- .../mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 60 ---------------------- arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 45 ---------------- 5 files changed, 1 insertion(+), 116 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index cce9523eaa77..fa299e09730d 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -308,7 +308,7 @@ DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)") .init_late = am43xx_init_late, .init_irq = omap_gic_of_init, .init_machine = omap_generic_init, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = am43_boards_compat, .restart = omap44xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h index fa2ff41f84b9..5f4ab24dd60d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h @@ -44,8 +44,6 @@ extern struct omap_hwmod am33xx_smartreflex0_hwmod; extern struct omap_hwmod am33xx_smartreflex1_hwmod; extern struct omap_hwmod am33xx_gpmc_hwmod; extern struct omap_hwmod am33xx_rtc_hwmod; -extern struct omap_hwmod am33xx_timer1_hwmod; -extern struct omap_hwmod am33xx_timer2_hwmod; extern struct omap_hwmod_class am33xx_emif_hwmod_class; extern struct omap_hwmod_class am33xx_l4_hwmod_class; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c index 0ebbfbb4fb1c..b389d6589c32 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c @@ -106,14 +106,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = { .user = OCP_USER_MPU, }; -/* l4 per -> timer2 */ -struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = { - .master = &am33xx_l4_ls_hwmod, - .slave = &am33xx_timer2_hwmod, - .clk = "l4ls_gclk", - .user = OCP_USER_MPU, -}; - /* l3 main -> ocmc */ struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = { .master = &am33xx_l3_main_hwmod, diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index 99c633338488..4b3cd590fb52 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -307,64 +307,6 @@ struct omap_hwmod am33xx_rtc_hwmod = { }, }; -/* 'timer 2-7' class */ -static struct omap_hwmod_class_sysconfig am33xx_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_RESET_STATUS, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -struct omap_hwmod_class am33xx_timer_hwmod_class = { - .name = "timer", - .sysc = &am33xx_timer_sysc, -}; - -/* timer1 1ms */ -static struct omap_hwmod_class_sysconfig am33xx_timer1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am33xx_timer1ms_hwmod_class = { - .name = "timer", - .sysc = &am33xx_timer1ms_sysc, -}; - -struct omap_hwmod am33xx_timer1_hwmod = { - .name = "timer1", - .class = &am33xx_timer1ms_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .main_clk = "timer1_fck", - .prcm = { - .omap4 = { - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -struct omap_hwmod am33xx_timer2_hwmod = { - .name = "timer2", - .class = &am33xx_timer_hwmod_class, - .clkdm_name = "l4ls_clkdm", - .main_clk = "timer2_fck", - .prcm = { - .omap4 = { - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - static void omap_hwmod_am33xx_clkctrl(void) { CLKCTRL(am33xx_smartreflex0_hwmod, @@ -397,12 +339,10 @@ void omap_hwmod_am33xx_reg(void) static void omap_hwmod_am43xx_clkctrl(void) { - CLKCTRL(am33xx_timer2_hwmod, AM43XX_CM_PER_TIMER2_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex0_hwmod, AM43XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex1_hwmod, AM43XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET); - CLKCTRL(am33xx_timer1_hwmod, AM43XX_CM_WKUP_TIMER1_CLKCTRL_OFFSET); CLKCTRL(am33xx_rtc_hwmod, AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET); CLKCTRL(am33xx_gpmc_hwmod, AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_ls_hwmod, AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET); diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index d2203f44af88..3f338732ee6c 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -85,34 +85,6 @@ static struct omap_hwmod am43xx_control_hwmod = { }, }; -static struct omap_hwmod_class_sysconfig am43xx_synctimer_sysc = { - .rev_offs = 0x0, - .sysc_offs = 0x4, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class am43xx_synctimer_hwmod_class = { - .name = "synctimer", - .sysc = &am43xx_synctimer_sysc, -}; - -static struct omap_hwmod am43xx_synctimer_hwmod = { - .name = "counter_32k", - .class = &am43xx_synctimer_hwmod_class, - .clkdm_name = "l4_wkup_aon_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "synctimer_32kclk", - .prcm = { - .omap4 = { - .clkctrl_offs = AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - - static struct omap_hwmod_class_sysconfig am43xx_usb_otg_ss_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, @@ -206,20 +178,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_wkup__control = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_ocp_if am43xx_l4_wkup__timer1 = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_timer1_hwmod, - .clk = "sys_clkin_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod_ocp_if am33xx_l4_wkup__synctimer = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am43xx_synctimer_hwmod, - .clk = "sys_clkin_ck", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss0 = { .master = &am33xx_l3_s_hwmod, .slave = &am43xx_usb_otg_ss0_hwmod, @@ -235,7 +193,6 @@ static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss1 = { }; static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { - &am33xx_l4_wkup__synctimer, &am33xx_mpu__l3_main, &am33xx_mpu__prcm, &am33xx_l3_s__l4_ls, @@ -252,8 +209,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l4_wkup__control, &am43xx_l4_wkup__smartreflex0, &am43xx_l4_wkup__smartreflex1, - &am43xx_l4_wkup__timer1, - &am33xx_l4_ls__timer2, &am33xx_l3_s__gpmc, &am33xx_l3_main__ocmc, &am43xx_l3_s__usbotgss0, -- cgit From 14b1925a721992d781f5e9d28db26b85174e3927 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap4 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 2 +- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 90 ------------------------------ 2 files changed, 1 insertion(+), 91 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index fa299e09730d..4818fd429f98 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -261,7 +261,7 @@ DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)") .init_irq = omap_gic_of_init, .init_machine = omap_generic_init, .init_late = omap4430_init_late, - .init_time = omap4_local_timer_init, + .init_time = omap_init_time_of, .dt_compat = omap4_boards_compat, .restart = omap44xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 33f6596c03f7..de13c46b984f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -231,39 +231,6 @@ static struct omap_hwmod omap44xx_ocp_wp_noc_hwmod = { * usim */ -/* - * 'counter' class - * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock - */ - -static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0004, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap44xx_counter_hwmod_class = { - .name = "counter", - .sysc = &omap44xx_counter_sysc, -}; - -/* counter_32k */ -static struct omap_hwmod omap44xx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap44xx_counter_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "sys_32k_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, - }, - }, -}; - /* * 'ctrl_module' class * attila core control module + core pad control module + wkup pad control @@ -672,45 +639,6 @@ static struct omap_hwmod omap44xx_sl2if_hwmod = { }, }; -/* - * 'timer' class - * general purpose timer module with accurate 1ms tick - * This class contains several variants: ['timer_1ms', 'timer'] - */ - -static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_EMUFREE | SYSC_HAS_ENAWAKEUP | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap44xx_timer_1ms_hwmod_class = { - .name = "timer", - .sysc = &omap44xx_timer_1ms_sysc, -}; - -/* timer1 */ -static struct omap_hwmod omap44xx_timer1_hwmod = { - .name = "timer1", - .class = &omap44xx_timer_1ms_hwmod_class, - .clkdm_name = "l4_wkup_clkdm", - .flags = HWMOD_SET_DEFAULT_CLOCKACT, - .main_clk = "dmt1_clk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - /* * 'usb_host_fs' class * full-speed usb host controller @@ -1063,14 +991,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> counter_32k */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_counter_32k_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_cfg -> ctrl_module_core */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ctrl_module_core = { .master = &omap44xx_l4_cfg_hwmod, @@ -1199,14 +1119,6 @@ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l3_main_2__sl2if = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { - .master = &omap44xx_l4_wkup_hwmod, - .slave = &omap44xx_timer1_hwmod, - .clk = "l4_wkup_clk_mux_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_cfg -> usb_host_fs */ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = { .master = &omap44xx_l4_cfg_hwmod, @@ -1273,7 +1185,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_cfg__l4_wkup, &omap44xx_mpu__mpu_private, &omap44xx_l4_cfg__ocp_wp_noc, - &omap44xx_l4_wkup__counter_32k, &omap44xx_l4_cfg__ctrl_module_core, &omap44xx_l4_cfg__ctrl_module_pad_core, &omap44xx_l4_wkup__ctrl_module_wkup, @@ -1290,7 +1201,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l4_wkup__prm, &omap44xx_l4_wkup__scrm, /* &omap44xx_l3_main_2__sl2if, */ - &omap44xx_l4_wkup__timer1, /* &omap44xx_l4_cfg__usb_host_fs, */ &omap44xx_l4_cfg__usb_host_hs, &omap44xx_l4_cfg__usb_tll_hs, -- cgit From 036a3d42bb8f28ae3cdd7c9570135c243724fbd6 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap5 and dra7 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that similar to omap_init_time_of(), we now need to call omap_clk_init() also from omap5_realtime_timer_init(). Cc: devicetree@vger.kernel.org Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 89 --------------- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 176 ----------------------------- arch/arm/mach-omap2/timer.c | 17 +-- 3 files changed, 1 insertion(+), 281 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 08f34f4732fd..4cb194ac7a7e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -193,39 +193,6 @@ static struct omap_hwmod omap54xx_mpu_private_hwmod = { }, }; -/* - * 'counter' class - * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock - */ - -static struct omap_hwmod_class_sysconfig omap54xx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap54xx_counter_hwmod_class = { - .name = "counter", - .sysc = &omap54xx_counter_sysc, -}; - -/* counter_32k */ -static struct omap_hwmod omap54xx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap54xx_counter_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "wkupaon_iclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP54XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET, - .context_offs = OMAP54XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET, - }, - }, -}; - /* * 'emif' class * external memory interface no1 (wrapper) @@ -299,44 +266,6 @@ static struct omap_hwmod omap54xx_mpu_hwmod = { }, }; - -/* - * 'timer' class - * general purpose timer module with accurate 1ms tick - * This class contains several variants: ['timer_1ms', 'timer'] - */ - -static struct omap_hwmod_class_sysconfig omap54xx_timer_1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class omap54xx_timer_1ms_hwmod_class = { - .name = "timer", - .sysc = &omap54xx_timer_1ms_sysc, -}; - -/* timer1 */ -static struct omap_hwmod omap54xx_timer1_hwmod = { - .name = "timer1", - .class = &omap54xx_timer_1ms_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .main_clk = "timer1_gfclk_mux", - .flags = HWMOD_SET_DEFAULT_CLOCKACT, - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP54XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET, - .context_offs = OMAP54XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - /* * 'usb_host_hs' class * high-speed multi-port usb host controller @@ -666,14 +595,6 @@ static struct omap_hwmod_ocp_if omap54xx_mpu__mpu_private = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> counter_32k */ -static struct omap_hwmod_ocp_if omap54xx_l4_wkup__counter_32k = { - .master = &omap54xx_l4_wkup_hwmod, - .slave = &omap54xx_counter_32k_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* mpu -> emif1 */ static struct omap_hwmod_ocp_if omap54xx_mpu__emif1 = { .master = &omap54xx_mpu_hwmod, @@ -698,14 +619,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = { - .master = &omap54xx_l4_wkup_hwmod, - .slave = &omap54xx_timer1_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_cfg -> usb_host_hs */ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__usb_host_hs = { .master = &omap54xx_l4_cfg_hwmod, @@ -747,11 +660,9 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l3_main_2__l4_per, &omap54xx_l3_main_1__l4_wkup, &omap54xx_mpu__mpu_private, - &omap54xx_l4_wkup__counter_32k, &omap54xx_mpu__emif1, &omap54xx_mpu__emif2, &omap54xx_l4_cfg__mpu, - &omap54xx_l4_wkup__timer1, &omap54xx_l4_cfg__usb_host_hs, &omap54xx_l4_cfg__usb_tll_hs, &omap54xx_l4_cfg__usb_otg_ss, diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index e95668bdbc3f..07b7458deae4 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -221,40 +221,6 @@ static struct omap_hwmod dra7xx_bb2d_hwmod = { }, }; -/* - * 'counter' class - * - */ - -static struct omap_hwmod_class_sysconfig dra7xx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class dra7xx_counter_hwmod_class = { - .name = "counter", - .sysc = &dra7xx_counter_sysc, -}; - -/* counter_32k */ -static struct omap_hwmod dra7xx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &dra7xx_counter_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "wkupaon_iclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_WKUPAON_COUNTER_32K_CONTEXT_OFFSET, - }, - }, -}; - /* * 'ctrl_module' class * @@ -525,103 +491,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = { }, }; -/* - * 'timer' class - * - * This class contains several variants: ['timer_1ms', 'timer_secure', - * 'timer'] - */ - -static struct omap_hwmod_class_sysconfig dra7xx_timer_1ms_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class dra7xx_timer_1ms_hwmod_class = { - .name = "timer", - .sysc = &dra7xx_timer_1ms_sysc, -}; - -static struct omap_hwmod_class_sysconfig dra7xx_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS | - SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type2, -}; - -static struct omap_hwmod_class dra7xx_timer_hwmod_class = { - .name = "timer", - .sysc = &dra7xx_timer_sysc, -}; - -/* timer1 */ -static struct omap_hwmod dra7xx_timer1_hwmod = { - .name = "timer1", - .class = &dra7xx_timer_1ms_hwmod_class, - .clkdm_name = "wkupaon_clkdm", - .main_clk = "timer1_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_WKUPAON_TIMER1_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_WKUPAON_TIMER1_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* timer2 */ -static struct omap_hwmod dra7xx_timer2_hwmod = { - .name = "timer2", - .class = &dra7xx_timer_1ms_hwmod_class, - .clkdm_name = "l4per_clkdm", - .main_clk = "timer2_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L4PER_TIMER2_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_L4PER_TIMER2_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* timer3 */ -static struct omap_hwmod dra7xx_timer3_hwmod = { - .name = "timer3", - .class = &dra7xx_timer_hwmod_class, - .clkdm_name = "l4per_clkdm", - .main_clk = "timer3_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L4PER_TIMER3_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_L4PER_TIMER3_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* timer4 */ -static struct omap_hwmod dra7xx_timer4_hwmod = { - .name = "timer4", - .class = &dra7xx_timer_hwmod_class, - .clkdm_name = "l4per_clkdm", - .main_clk = "timer4_gfclk_mux", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_L4PER_TIMER4_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_L4PER_TIMER4_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - /* * 'usb_otg_ss' class * @@ -864,14 +733,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__bb2d = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> counter_32k */ -static struct omap_hwmod_ocp_if dra7xx_l4_wkup__counter_32k = { - .master = &dra7xx_l4_wkup_hwmod, - .slave = &dra7xx_counter_32k_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> ctrl_module_wkup */ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__ctrl_module_wkup = { .master = &dra7xx_l4_wkup_hwmod, @@ -952,38 +813,6 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__sata = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if dra7xx_l4_wkup__timer1 = { - .master = &dra7xx_l4_wkup_hwmod, - .slave = &dra7xx_timer1_hwmod, - .clk = "wkupaon_iclk_mux", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_per1 -> timer2 */ -static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer2 = { - .master = &dra7xx_l4_per1_hwmod, - .slave = &dra7xx_timer2_hwmod, - .clk = "l3_iclk_div", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_per1 -> timer3 */ -static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer3 = { - .master = &dra7xx_l4_per1_hwmod, - .slave = &dra7xx_timer3_hwmod, - .clk = "l3_iclk_div", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4_per1 -> timer4 */ -static struct omap_hwmod_ocp_if dra7xx_l4_per1__timer4 = { - .master = &dra7xx_l4_per1_hwmod, - .slave = &dra7xx_timer4_hwmod, - .clk = "l3_iclk_div", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_per3 -> usb_otg_ss1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per3__usb_otg_ss1 = { .master = &dra7xx_l4_per3_hwmod, @@ -1062,7 +891,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l3_main_1__l4_wkup, &dra7xx_l4_per2__atl, &dra7xx_l3_main_1__bb2d, - &dra7xx_l4_wkup__counter_32k, &dra7xx_l4_wkup__ctrl_module_wkup, &dra7xx_l3_main_1__gpmc, &dra7xx_l4_cfg__mpu, @@ -1072,10 +900,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_cfg__pciess2, &dra7xx_l3_main_1__qspi, &dra7xx_l4_cfg__sata, - &dra7xx_l4_wkup__timer1, - &dra7xx_l4_per1__timer2, - &dra7xx_l4_per1__timer3, - &dra7xx_l4_per1__timer4, &dra7xx_l4_per3__usb_otg_ss1, &dra7xx_l4_per3__usb_otg_ss2, &dra7xx_l4_per3__usb_otg_ss3, diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 8b09cdacc30d..662a31004b91 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -576,21 +576,6 @@ void __init omap3_gptimer_timer_init(void) } #endif -#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ - defined(CONFIG_SOC_DRA7XX) -static void __init omap4_sync32k_timer_init(void) -{ - __omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon", - 0, NULL, NULL, false); -} - -void __init omap4_local_timer_init(void) -{ - omap4_sync32k_timer_init(); - timer_probe(); -} -#endif - #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) /* @@ -708,7 +693,7 @@ sysclk1_based: void __init omap5_realtime_timer_init(void) { - omap4_sync32k_timer_init(); + omap_clk_init(); realtime_counter_init(); timer_probe(); -- cgit From e428e250fde683ad3a658f8476f0914714e7eb6f Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap3 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Adam Ford Cc: Andreas Kemnade Cc: Grygorii Strashko Cc: "H. Nikolaus Schaller" Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 10 +- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 146 +---------------------------- 2 files changed, 6 insertions(+), 150 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 4818fd429f98..a10a74e95385 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -114,7 +114,7 @@ DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board") .init_early = omap3430_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = n900_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -132,7 +132,7 @@ DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)") .init_early = omap3430_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap3_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -149,7 +149,7 @@ DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)") .init_early = omap3630_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap36xx_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -166,7 +166,7 @@ DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)") .init_early = omap3430_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap3_secure_sync32k_timer_init, + .init_time = omap_init_time_of, .dt_compat = omap3_gp_boards_compat, .restart = omap3xxx_restart, MACHINE_END @@ -182,7 +182,7 @@ DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)") .init_early = am35xx_init_early, .init_machine = omap_generic_init, .init_late = omap3_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = am3517_boards_compat, .restart = omap3xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 3c8d2b6e887a..ca02f91237e3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -147,36 +147,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { .sysc = &omap3xxx_timer_sysc, }; -/* timer1 */ -static struct omap_hwmod omap3xxx_timer1_hwmod = { - .name = "timer1", - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - -/* timer2 */ -static struct omap_hwmod omap3xxx_timer2_hwmod = { - .name = "timer2", - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { - .module_offs = OMAP3430_PER_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* timer3 */ static struct omap_hwmod omap3xxx_timer3_hwmod = { .name = "timer3", @@ -312,21 +282,6 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { .flags = HWMOD_SET_DEFAULT_CLOCKACT, }; -/* timer12 */ -static struct omap_hwmod omap3xxx_timer12_hwmod = { - .name = "timer12", - .main_clk = "gpt12_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT, - }, - }, - .class = &omap3xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on @@ -1524,38 +1479,6 @@ static struct omap_hwmod omap3xxx_sad2d_hwmod = { .class = &omap3xxx_sad2d_class, }; -/* - * '32K sync counter' class - * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock - */ -static struct omap_hwmod_class_sysconfig omap3xxx_counter_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0004, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap3xxx_counter_hwmod_class = { - .name = "counter", - .sysc = &omap3xxx_counter_sysc, -}; - -static struct omap_hwmod omap3xxx_counter_32k_hwmod = { - .name = "counter_32k", - .class = &omap3xxx_counter_hwmod_class, - .clkdm_name = "wkup_clkdm", - .flags = HWMOD_SWSUP_SIDLE, - .main_clk = "wkup_32k_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP3430_ST_32KSYNC_SHIFT, - }, - }, -}; - /* * 'gpmc' class * general purpose memory controller @@ -1868,25 +1791,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l3__iva = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; - -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_timer1_hwmod, - .clk = "gpt1_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - - -/* l4_per -> timer2 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { - .master = &omap3xxx_l4_per_hwmod, - .slave = &omap3xxx_timer2_hwmod, - .clk = "gpt2_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - - /* l4_per -> timer3 */ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { .master = &omap3xxx_l4_per_hwmod, @@ -1965,15 +1869,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; - -/* l4_core -> timer12 */ -static struct omap_hwmod_ocp_if omap3xxx_l4_sec__timer12 = { - .master = &omap3xxx_l4_sec_hwmod, - .slave = &omap3xxx_timer12_hwmod, - .clk = "gpt12_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { @@ -2325,16 +2220,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__hdq1w = { .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; -/* l4_wkup -> 32ksync_counter */ - - -static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__counter_32k = { - .master = &omap3xxx_l4_wkup_hwmod, - .slave = &omap3xxx_counter_32k_hwmod, - .clk = "omap_32ksync_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* am35xx has Davinci MDIO & EMAC */ static struct omap_hwmod_class am35xx_mdio_class = { .name = "davinci_mdio", @@ -2551,8 +2436,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap3_l4_core__i2c2, &omap3_l4_core__i2c3, &omap3xxx_l4_wkup__l4_sec, - &omap3xxx_l4_wkup__timer1, - &omap3xxx_l4_per__timer2, &omap3xxx_l4_per__timer3, &omap3xxx_l4_per__timer4, &omap3xxx_l4_per__timer5, @@ -2580,27 +2463,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { &omap34xx_l4_core__mcspi2, &omap34xx_l4_core__mcspi3, &omap34xx_l4_core__mcspi4, - &omap3xxx_l4_wkup__counter_32k, &omap3xxx_l3_main__gpmc, NULL, }; -/* GP-only hwmod links */ -static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - -static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - -static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = { - &omap3xxx_l4_sec__timer12, - NULL, -}; - /* crypto hwmod links */ static struct omap_hwmod_ocp_if *omap34xx_sham_hwmod_ocp_ifs[] __initdata = { &omap3xxx_l4_core__sham, @@ -2774,7 +2640,7 @@ static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus, int __init omap3xxx_hwmod_init(void) { int r; - struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL, **h_sham = NULL; + struct omap_hwmod_ocp_if **h = NULL, **h_sham = NULL; struct omap_hwmod_ocp_if **h_aes = NULL; struct device_node *bus; unsigned int rev; @@ -2797,18 +2663,15 @@ int __init omap3xxx_hwmod_init(void) rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) { h = omap34xx_hwmod_ocp_ifs; - h_gp = omap34xx_gp_hwmod_ocp_ifs; h_sham = omap34xx_sham_hwmod_ocp_ifs; h_aes = omap34xx_aes_hwmod_ocp_ifs; } else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) { h = am35xx_hwmod_ocp_ifs; - h_gp = am35xx_gp_hwmod_ocp_ifs; h_sham = am35xx_sham_hwmod_ocp_ifs; h_aes = am35xx_aes_hwmod_ocp_ifs; } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2) { h = omap36xx_hwmod_ocp_ifs; - h_gp = omap36xx_gp_hwmod_ocp_ifs; h_sham = omap36xx_sham_hwmod_ocp_ifs; h_aes = omap36xx_aes_hwmod_ocp_ifs; } else { @@ -2820,13 +2683,6 @@ int __init omap3xxx_hwmod_init(void) if (r < 0) return r; - /* Register GP-only hwmod links. */ - if (h_gp && omap_type() == OMAP2_DEVICE_TYPE_GP) { - r = omap_hwmod_register_links(h_gp); - if (r < 0) - return r; - } - /* * Register crypto hwmod links only if they are not disabled in DT. * If DT information is missing, enable them only for GP devices. -- cgit From 83bd18b46600a37d977e811dca1334e09a6e03eb Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for ti81xx We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Note that for ti81xx, also timer1 is of type 2 unlike on am335x where timer1 is type1 while the rest of the timers are type 2. Cc: devicetree@vger.kernel.org Cc: Brian Hutchinson Cc: Graeme Smecher Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 4 +- arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 74 ------------------------------ 2 files changed, 2 insertions(+), 76 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index a10a74e95385..eeb3f97af520 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -201,7 +201,7 @@ DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)") .init_early = ti814x_init_early, .init_machine = omap_generic_init, .init_late = ti81xx_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = ti814x_boards_compat, .restart = ti81xx_restart, MACHINE_END @@ -218,7 +218,7 @@ DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)") .init_early = ti816x_init_early, .init_machine = omap_generic_init, .init_late = ti81xx_init_late, - .init_time = omap3_gptimer_timer_init, + .init_time = omap_init_time_of, .dt_compat = ti816x_boards_compat, .restart = ti81xx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index 6a9f1ad9d413..50fb699b163f 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -690,76 +690,6 @@ static struct omap_hwmod_class dm816x_timer_hwmod_class = { .sysc = &dm816x_timer_sysc, }; -static struct omap_hwmod dm814x_timer1_hwmod = { - .name = "timer1", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer1_fck", - .class = &dm816x_timer_hwmod_class, - .flags = HWMOD_NO_IDLEST, -}; - -static struct omap_hwmod_ocp_if dm814x_l4_ls__timer1 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm814x_timer1_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod dm816x_timer1_hwmod = { - .name = "timer1", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer1_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = DM816X_CM_ALWON_TIMER_1_CLKCTRL, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .class = &dm816x_timer_hwmod_class, -}; - -static struct omap_hwmod_ocp_if dm816x_l4_ls__timer1 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm816x_timer1_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod dm814x_timer2_hwmod = { - .name = "timer2", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer2_fck", - .class = &dm816x_timer_hwmod_class, - .flags = HWMOD_NO_IDLEST, -}; - -static struct omap_hwmod_ocp_if dm814x_l4_ls__timer2 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm814x_timer2_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - -static struct omap_hwmod dm816x_timer2_hwmod = { - .name = "timer2", - .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer2_fck", - .prcm = { - .omap4 = { - .clkctrl_offs = DM816X_CM_ALWON_TIMER_2_CLKCTRL, - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .class = &dm816x_timer_hwmod_class, -}; - -static struct omap_hwmod_ocp_if dm816x_l4_ls__timer2 = { - .master = &dm81xx_l4_ls_hwmod, - .slave = &dm816x_timer2_hwmod, - .clk = "sysclk6_ck", - .user = OCP_USER_MPU, -}; - static struct omap_hwmod dm816x_timer3_hwmod = { .name = "timer3", .clkdm_name = "alwon_l3s_clkdm", @@ -1288,8 +1218,6 @@ static struct omap_hwmod_ocp_if *dm814x_hwmod_ocp_ifs[] __initdata = { &dm814x_l4_ls__mmc1, &dm814x_l4_ls__mmc2, &ti81xx_l4_ls__rtc, - &dm814x_l4_ls__timer1, - &dm814x_l4_ls__timer2, &dm81xx_alwon_l3_slow__gpmc, &dm814x_default_l3_slow__usbss, &dm814x_alwon_l3_med__mmc3, @@ -1318,8 +1246,6 @@ static struct omap_hwmod_ocp_if *dm816x_hwmod_ocp_ifs[] __initdata = { &dm81xx_l4_ls__elm, &ti81xx_l4_ls__rtc, &dm816x_l4_ls__mmc1, - &dm816x_l4_ls__timer1, - &dm816x_l4_ls__timer2, &dm816x_l4_ls__timer3, &dm816x_l4_ls__timer4, &dm816x_l4_ls__timer5, -- cgit From 64dbc3d55d60fd115e058e9f1689542daa37356c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: dts: Configure system timers for omap2 We can now init system timers using the dmtimer and 32k counter based on only devicetree data and drivers/clocksource timers. Let's configure the clocksource and clockevent, and drop the old unused platform data. As we're just dropping platform data, and the early platform data init is based on the custom ti,hwmods property, we want to drop both the platform data and ti,hwmods property in a single patch. Since the dmtimer can use both 32k clock and system clock as the source, let's also configure the SoC specific default values. The board specific dts files can reconfigure these with assigned-clocks and assigned-clock-parents as needed. Let's also update the dts file to use #include while at it. Cc: devicetree@vger.kernel.org Cc: Aaro Koskinen Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-generic.c | 4 +- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 --------- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 19 --------- .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 8 ---- arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 47 ---------------------- arch/arm/mach-omap2/omap_hwmod_common_data.h | 3 -- 6 files changed, 2 insertions(+), 99 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index eeb3f97af520..cafeb822bab7 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -50,7 +50,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)") .map_io = omap242x_map_io, .init_early = omap2420_init_early, .init_machine = omap_generic_init, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap242x_boards_compat, .restart = omap2xxx_restart, MACHINE_END @@ -67,7 +67,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)") .map_io = omap243x_map_io, .init_early = omap2430_init_early, .init_machine = omap_generic_init, - .init_time = omap_init_time, + .init_time = omap_init_time_of, .dt_compat = omap243x_boards_compat, .restart = omap2xxx_restart, MACHINE_END diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index b14442cf6179..558fae4375ba 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -264,14 +264,6 @@ static struct omap_hwmod_ocp_if omap2420_l3__dsp = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_timer1_hwmod, - .clk = "gpt1_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .master = &omap2xxx_l4_wkup_hwmod, @@ -352,15 +344,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = { .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; - -/* l4_wkup -> 32ksync_counter */ -static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_counter_32k_hwmod, - .clk = "sync_32k_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - static struct omap_hwmod_ocp_if omap2420_l3__gpmc = { .master = &omap2xxx_l3_main_hwmod, .slave = &omap2xxx_gpmc_hwmod, @@ -382,8 +365,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { &omap2420_l4_core__i2c2, &omap2420_l3__iva, &omap2420_l3__dsp, - &omap2420_l4_wkup__timer1, - &omap2xxx_l4_core__timer2, &omap2xxx_l4_core__timer3, &omap2xxx_l4_core__timer4, &omap2xxx_l4_core__timer5, @@ -411,7 +392,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { &omap2xxx_l4_core__sham, &omap2xxx_l4_core__aes, &omap2420_l4_core__hdq1w, - &omap2420_l4_wkup__counter_32k, &omap2420_l3__gpmc, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 41a37c74f9a6..c93200801b34 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -436,14 +436,6 @@ static struct omap_hwmod_ocp_if omap2430_l3__iva = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_wkup -> timer1 */ -static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_timer1_hwmod, - .clk = "gpt1_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .master = &omap2xxx_l4_wkup_hwmod, @@ -548,14 +540,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = { .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, }; -/* l4_wkup -> 32ksync_counter */ -static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = { - .master = &omap2xxx_l4_wkup_hwmod, - .slave = &omap2xxx_counter_32k_hwmod, - .clk = "sync_32k_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - static struct omap_hwmod_ocp_if omap2430_l3__gpmc = { .master = &omap2xxx_l3_main_hwmod, .slave = &omap2xxx_gpmc_hwmod, @@ -581,8 +565,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { &omap2xxx_l4_core__mcspi2, &omap2430_l4_core__mcspi3, &omap2430_l3__iva, - &omap2430_l4_wkup__timer1, - &omap2xxx_l4_core__timer2, &omap2xxx_l4_core__timer3, &omap2xxx_l4_core__timer4, &omap2xxx_l4_core__timer5, @@ -613,7 +595,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { &omap2xxx_l4_core__rng, &omap2xxx_l4_core__sham, &omap2xxx_l4_core__aes, - &omap2430_l4_wkup__counter_32k, &omap2430_l3__gpmc, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c index eef96adea411..518e877bb2a1 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c @@ -95,14 +95,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_core -> timer2 */ -struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = { - .master = &omap2xxx_l4_core_hwmod, - .slave = &omap2xxx_timer2_hwmod, - .clk = "gpt2_ick", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_core -> timer3 */ struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = { .master = &omap2xxx_l4_core_hwmod, diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c index a445704d43d9..9156f2bfbc8d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c @@ -195,36 +195,6 @@ struct omap_hwmod omap2xxx_iva_hwmod = { .class = &iva_hwmod_class, }; -/* timer1 */ -struct omap_hwmod omap2xxx_timer1_hwmod = { - .name = "timer1", - .main_clk = "gpt1_fck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, - }, - }, - .class = &omap2xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - -/* timer2 */ -struct omap_hwmod omap2xxx_timer2_hwmod = { - .name = "timer2", - .main_clk = "gpt2_fck", - .prcm = { - .omap2 = { - .module_offs = CORE_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, - }, - }, - .class = &omap2xxx_timer_hwmod_class, - .flags = HWMOD_SET_DEFAULT_CLOCKACT, -}; - /* timer3 */ struct omap_hwmod omap2xxx_timer3_hwmod = { .name = "timer3", @@ -595,23 +565,6 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = { .class = &omap2xxx_mcspi_class, }; -static struct omap_hwmod_class omap2xxx_counter_hwmod_class = { - .name = "counter", -}; - -struct omap_hwmod omap2xxx_counter_32k_hwmod = { - .name = "counter_32k", - .main_clk = "func_32k_ck", - .prcm = { - .omap2 = { - .module_offs = WKUP_MOD, - .idlest_reg_id = 1, - .idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT, - }, - }, - .class = &omap2xxx_counter_hwmod_class, -}; - /* gpmc */ struct omap_hwmod omap2xxx_gpmc_hwmod = { .name = "gpmc", diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index c85cb8b5831c..0045e6680a63 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -21,8 +21,6 @@ extern struct omap_hwmod omap2xxx_l4_core_hwmod; extern struct omap_hwmod omap2xxx_l4_wkup_hwmod; extern struct omap_hwmod omap2xxx_mpu_hwmod; extern struct omap_hwmod omap2xxx_iva_hwmod; -extern struct omap_hwmod omap2xxx_timer1_hwmod; -extern struct omap_hwmod omap2xxx_timer2_hwmod; extern struct omap_hwmod omap2xxx_timer3_hwmod; extern struct omap_hwmod omap2xxx_timer4_hwmod; extern struct omap_hwmod omap2xxx_timer5_hwmod; @@ -47,7 +45,6 @@ extern struct omap_hwmod omap2xxx_gpio3_hwmod; extern struct omap_hwmod omap2xxx_gpio4_hwmod; extern struct omap_hwmod omap2xxx_mcspi1_hwmod; extern struct omap_hwmod omap2xxx_mcspi2_hwmod; -extern struct omap_hwmod omap2xxx_counter_32k_hwmod; extern struct omap_hwmod omap2xxx_gpmc_hwmod; extern struct omap_hwmod omap2xxx_rng_hwmod; extern struct omap_hwmod omap2xxx_sham_hwmod; -- cgit From 2ee04b88547ab4c46aa2a258efd0f91fc705b6d6 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 May 2020 09:59:31 -0700 Subject: ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter With dmtimer and 32k counter being initialized based on devicetree data, we can just drop the old timer code. This still leaves the omap5 and dra7 realtime_counter_init() that depend on the smc calls and control module platform code for the dra7 quirk init. Cc: Grygorii Strashko Cc: Keerthy Cc: Lokesh Vutla Cc: Rob Herring Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Makefile | 4 +- arch/arm/mach-omap2/common.h | 7 + arch/arm/mach-omap2/timer.c | 551 ------------------------------------------- 3 files changed, 10 insertions(+), 552 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 5017a3be0ff0..07616d346557 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -7,7 +7,7 @@ ccflags-y := -I$(srctree)/$(src)/include \ -I$(srctree)/arch/arm/plat-omap/include # Common support -obj-y := id.o io.o control.o devices.o fb.o timer.o pm.o \ +obj-y := id.o io.o control.o devices.o fb.o pm.o \ common.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \ omap_device.o omap-headsmp.o sram.o @@ -16,6 +16,8 @@ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ clock-common = clock.o secure-common = omap-smc.o omap-secure.o +obj-$(CONFIG_SOC_HAS_REALTIME_COUNTER) += timer.o + obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common) diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 75d729943958..49926eced5f1 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -111,7 +111,14 @@ static inline int omap_l2_cache_init(void) #define OMAP_L2C_AUX_CTRL 0 #define omap4_l2c310_write_sec NULL #endif + +#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER extern void omap5_realtime_timer_init(void); +#else +static inline void omap5_realtime_timer_init(void) +{ +} +#endif void omap2420_init_early(void); void omap2430_init_early(void); diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 662a31004b91..2d4ea386fc38 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -26,34 +26,12 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ -#include -#include -#include -#include #include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "omap_hwmod.h" -#include "omap_device.h" -#include -#include #include "soc.h" #include "common.h" #include "control.h" -#include "powerdomain.h" #include "omap-secure.h" #define REALTIME_COUNTER_BASE 0x48243200 @@ -61,294 +39,12 @@ #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 #define NUMERATOR_DENUMERATOR_MASK 0xfffff000 -/* Clockevent code */ - -static struct omap_dm_timer clkev; -static struct clock_event_device clockevent_gpt; - -/* Clockevent hwmod for am335x and am437x suspend */ -static struct omap_hwmod *clockevent_gpt_hwmod; - -/* Clockesource hwmod for am437x suspend */ -static struct omap_hwmod *clocksource_gpt_hwmod; - -#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER static unsigned long arch_timer_freq; void set_cntfreq(void) { omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq); } -#endif - -static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = &clockevent_gpt; - - __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW); - - evt->event_handler(evt); - return IRQ_HANDLED; -} - -static int omap2_gp_timer_set_next_event(unsigned long cycles, - struct clock_event_device *evt) -{ - __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST, - 0xffffffff - cycles, OMAP_TIMER_POSTED); - - return 0; -} - -static int omap2_gp_timer_shutdown(struct clock_event_device *evt) -{ - __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate); - return 0; -} - -static int omap2_gp_timer_set_periodic(struct clock_event_device *evt) -{ - u32 period; - - __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate); - - period = clkev.rate / HZ; - period -= 1; - /* Looks like we need to first set the load value separately */ - __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG, 0xffffffff - period, - OMAP_TIMER_POSTED); - __omap_dm_timer_load_start(&clkev, - OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, - 0xffffffff - period, OMAP_TIMER_POSTED); - return 0; -} - -static void omap_clkevt_idle(struct clock_event_device *unused) -{ - if (!clockevent_gpt_hwmod) - return; - - omap_hwmod_idle(clockevent_gpt_hwmod); -} - -static void omap_clkevt_unidle(struct clock_event_device *unused) -{ - if (!clockevent_gpt_hwmod) - return; - - omap_hwmod_enable(clockevent_gpt_hwmod); - __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); -} - -static struct clock_event_device clockevent_gpt = { - .features = CLOCK_EVT_FEAT_PERIODIC | - CLOCK_EVT_FEAT_ONESHOT, - .rating = 300, - .set_next_event = omap2_gp_timer_set_next_event, - .set_state_shutdown = omap2_gp_timer_shutdown, - .set_state_periodic = omap2_gp_timer_set_periodic, - .set_state_oneshot = omap2_gp_timer_shutdown, - .tick_resume = omap2_gp_timer_shutdown, -}; - -static const struct of_device_id omap_timer_match[] __initconst = { - { .compatible = "ti,omap2420-timer", }, - { .compatible = "ti,omap3430-timer", }, - { .compatible = "ti,omap4430-timer", }, - { .compatible = "ti,omap5430-timer", }, - { .compatible = "ti,dm814-timer", }, - { .compatible = "ti,dm816-timer", }, - { .compatible = "ti,am335x-timer", }, - { .compatible = "ti,am335x-timer-1ms", }, - { } -}; - -static int omap_timer_add_disabled_property(struct device_node *np) -{ - struct property *prop; - - prop = kzalloc(sizeof(*prop), GFP_KERNEL); - if (!prop) - return -ENOMEM; - - prop->name = "status"; - prop->value = "disabled"; - prop->length = strlen(prop->value); - - return of_add_property(np, prop); -} - -static int omap_timer_update_dt(struct device_node *np) -{ - int error = 0; - - if (!of_device_is_compatible(np, "ti,omap-counter32k")) { - error = omap_timer_add_disabled_property(np); - if (error) - return error; - } - - /* No parent interconnect target module configured? */ - if (of_get_property(np, "ti,hwmods", NULL)) - return error; - - /* Tag parent interconnect target module disabled */ - error = omap_timer_add_disabled_property(np->parent); - if (error) - return error; - - return 0; -} - -/** - * omap_get_timer_dt - get a timer using device-tree - * @match - device-tree match structure for matching a device type - * @property - optional timer property to match - * - * Helper function to get a timer during early boot using device-tree for use - * as kernel system timer. Optionally, the property argument can be used to - * select a timer with a specific property. Once a timer is found then mark - * the timer node in device-tree as disabled, to prevent the kernel from - * registering this timer as a platform device and so no one else can use it. - */ -static struct device_node * __init omap_get_timer_dt(const struct of_device_id *match, - const char *property) -{ - struct device_node *np; - int error; - - for_each_matching_node(np, match) { - if (!of_device_is_available(np)) - continue; - - if (property && !of_get_property(np, property, NULL)) - continue; - - if (!property && (of_get_property(np, "ti,timer-alwon", NULL) || - of_get_property(np, "ti,timer-dsp", NULL) || - of_get_property(np, "ti,timer-pwm", NULL) || - of_get_property(np, "ti,timer-secure", NULL))) - continue; - - error = omap_timer_update_dt(np); - WARN(error, "%s: Could not update dt: %i\n", __func__, error); - - return np; - } - - return NULL; -} - -/** - * omap_dmtimer_init - initialisation function when device tree is used - * - * For secure OMAP3/DRA7xx devices, timers with device type "timer-secure" - * cannot be used by the kernel as they are reserved. Therefore, to prevent the - * kernel registering these devices remove them dynamically from the device - * tree on boot. - */ -static void __init omap_dmtimer_init(void) -{ - struct device_node *np; - - if (!cpu_is_omap34xx() && !soc_is_dra7xx()) - return; - - /* If we are a secure device, remove any secure timer nodes */ - if ((omap_type() != OMAP2_DEVICE_TYPE_GP)) { - np = omap_get_timer_dt(omap_timer_match, "ti,timer-secure"); - of_node_put(np); - } -} - -/** - * omap_dm_timer_get_errata - get errata flags for a timer - * - * Get the timer errata flags that are specific to the OMAP device being used. - */ -static u32 __init omap_dm_timer_get_errata(void) -{ - if (cpu_is_omap24xx()) - return 0; - - return OMAP_TIMER_ERRATA_I103_I767; -} - -static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, - const char *fck_source, - const char *property, - const char **timer_name, - int posted) -{ - const char *oh_name = NULL; - struct device_node *np; - struct omap_hwmod *oh; - struct clk *src; - int r = 0; - - np = omap_get_timer_dt(omap_timer_match, property); - if (!np) - return -ENODEV; - - of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); - if (!oh_name) { - of_property_read_string_index(np->parent, "ti,hwmods", 0, - &oh_name); - if (!oh_name) - return -ENODEV; - } - - timer->irq = irq_of_parse_and_map(np, 0); - if (!timer->irq) - return -ENXIO; - - timer->io_base = of_iomap(np, 0); - - timer->fclk = of_clk_get_by_name(np, "fck"); - - of_node_put(np); - - oh = omap_hwmod_lookup(oh_name); - if (!oh) - return -ENODEV; - - *timer_name = oh->name; - - if (!timer->io_base) - return -ENXIO; - - omap_hwmod_setup_one(oh_name); - - /* After the dmtimer is using hwmod these clocks won't be needed */ - if (IS_ERR_OR_NULL(timer->fclk)) - timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); - if (IS_ERR(timer->fclk)) - return PTR_ERR(timer->fclk); - - src = clk_get(NULL, fck_source); - if (IS_ERR(src)) - return PTR_ERR(src); - - WARN(clk_set_parent(timer->fclk, src) < 0, - "Cannot set timer parent clock, no PLL clock driver?"); - - clk_put(src); - - omap_hwmod_enable(oh); - __omap_dm_timer_init_regs(timer); - - if (posted) - __omap_dm_timer_enable_posted(timer); - - /* Check that the intended posted configuration matches the actual */ - if (posted != timer->posted) - return -EINVAL; - - timer->rate = clk_get_rate(timer->fclk); - timer->reserved = 1; - - return r; -} #if !defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) void tick_broadcast(const struct cpumask *mask) @@ -356,226 +52,6 @@ void tick_broadcast(const struct cpumask *mask) } #endif -static void __init omap2_gp_clockevent_init(int gptimer_id, - const char *fck_source, - const char *property) -{ - int res; - - clkev.id = gptimer_id; - clkev.errata = omap_dm_timer_get_errata(); - - /* - * For clock-event timers we never read the timer counter and - * so we are not impacted by errata i103 and i767. Therefore, - * we can safely ignore this errata for clock-event timers. - */ - __omap_dm_timer_override_errata(&clkev, OMAP_TIMER_ERRATA_I103_I767); - - res = omap_dm_timer_init_one(&clkev, fck_source, property, - &clockevent_gpt.name, OMAP_TIMER_POSTED); - BUG_ON(res); - - if (request_irq(clkev.irq, omap2_gp_timer_interrupt, - IRQF_TIMER | IRQF_IRQPOLL, "gp_timer", &clkev)) - pr_err("Failed to request irq %d (gp_timer)\n", clkev.irq); - - __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW); - - clockevent_gpt.cpumask = cpu_possible_mask; - clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev); - clockevents_config_and_register(&clockevent_gpt, clkev.rate, - 3, /* Timer internal resynch latency */ - 0xffffffff); - - if (soc_is_am33xx() || soc_is_am43xx()) { - clockevent_gpt.suspend = omap_clkevt_idle; - clockevent_gpt.resume = omap_clkevt_unidle; - - clockevent_gpt_hwmod = - omap_hwmod_lookup(clockevent_gpt.name); - } - - pr_info("OMAP clockevent source: %s at %lu Hz\n", clockevent_gpt.name, - clkev.rate); -} - -/* Clocksource code */ -static struct omap_dm_timer clksrc; -static bool use_gptimer_clksrc __initdata; - -/* - * clocksource - */ -static u64 clocksource_read_cycles(struct clocksource *cs) -{ - return (u64)__omap_dm_timer_read_counter(&clksrc, - OMAP_TIMER_NONPOSTED); -} - -static struct clocksource clocksource_gpt = { - .rating = 300, - .read = clocksource_read_cycles, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -static u64 notrace dmtimer_read_sched_clock(void) -{ - if (clksrc.reserved) - return __omap_dm_timer_read_counter(&clksrc, - OMAP_TIMER_NONPOSTED); - - return 0; -} - -static const struct of_device_id omap_counter_match[] __initconst = { - { .compatible = "ti,omap-counter32k", }, - { } -}; - -/* Setup free-running counter for clocksource */ -static int __init __maybe_unused omap2_sync32k_clocksource_init(void) -{ - int ret; - struct device_node *np = NULL; - struct omap_hwmod *oh; - const char *oh_name = "counter_32k"; - - /* - * See if the 32kHz counter is supported. - */ - np = omap_get_timer_dt(omap_counter_match, NULL); - if (!np) - return -ENODEV; - - of_property_read_string_index(np->parent, "ti,hwmods", 0, &oh_name); - if (!oh_name) { - of_property_read_string_index(np, "ti,hwmods", 0, &oh_name); - if (!oh_name) - return -ENODEV; - } - - /* - * First check hwmod data is available for sync32k counter - */ - oh = omap_hwmod_lookup(oh_name); - if (!oh || oh->slaves_cnt == 0) - return -ENODEV; - - omap_hwmod_setup_one(oh_name); - - ret = omap_hwmod_enable(oh); - if (ret) { - pr_warn("%s: failed to enable counter_32k module (%d)\n", - __func__, ret); - return ret; - } - - return ret; -} - -static unsigned int omap2_gptimer_clksrc_load; - -static void omap2_gptimer_clksrc_suspend(struct clocksource *unused) -{ - omap2_gptimer_clksrc_load = - __omap_dm_timer_read_counter(&clksrc, OMAP_TIMER_NONPOSTED); - - omap_hwmod_idle(clocksource_gpt_hwmod); -} - -static void omap2_gptimer_clksrc_resume(struct clocksource *unused) -{ - omap_hwmod_enable(clocksource_gpt_hwmod); - - __omap_dm_timer_load_start(&clksrc, - OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, - omap2_gptimer_clksrc_load, - OMAP_TIMER_NONPOSTED); -} - -static void __init omap2_gptimer_clocksource_init(int gptimer_id, - const char *fck_source, - const char *property) -{ - int res; - - clksrc.id = gptimer_id; - clksrc.errata = omap_dm_timer_get_errata(); - - res = omap_dm_timer_init_one(&clksrc, fck_source, property, - &clocksource_gpt.name, - OMAP_TIMER_NONPOSTED); - - if (soc_is_am43xx()) { - clocksource_gpt.suspend = omap2_gptimer_clksrc_suspend; - clocksource_gpt.resume = omap2_gptimer_clksrc_resume; - - clocksource_gpt_hwmod = - omap_hwmod_lookup(clocksource_gpt.name); - } - - BUG_ON(res); - - __omap_dm_timer_load_start(&clksrc, - OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, - OMAP_TIMER_NONPOSTED); - sched_clock_register(dmtimer_read_sched_clock, 32, clksrc.rate); - - if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) - pr_err("Could not register clocksource %s\n", - clocksource_gpt.name); - else - pr_info("OMAP clocksource: %s at %lu Hz\n", - clocksource_gpt.name, clksrc.rate); -} - -static void __init __omap_sync32k_timer_init(int clkev_nr, const char *clkev_src, - const char *clkev_prop, int clksrc_nr, const char *clksrc_src, - const char *clksrc_prop, bool gptimer) -{ - omap_clk_init(); - omap_dmtimer_init(); - omap2_gp_clockevent_init(clkev_nr, clkev_src, clkev_prop); - - /* Enable the use of clocksource="gp_timer" kernel parameter */ - if (clksrc_nr && (use_gptimer_clksrc || gptimer)) - omap2_gptimer_clocksource_init(clksrc_nr, clksrc_src, - clksrc_prop); - else - omap2_sync32k_clocksource_init(); -} - -void __init omap_init_time(void) -{ - __omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon", - 2, "timer_sys_ck", NULL, false); - - timer_probe(); -} - -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX) -void __init omap3_secure_sync32k_timer_init(void) -{ - __omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure", - 2, "timer_sys_ck", NULL, false); - - timer_probe(); -} -#endif /* CONFIG_ARCH_OMAP3 */ - -#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM33XX) || \ - defined(CONFIG_SOC_AM43XX) -void __init omap3_gptimer_timer_init(void) -{ - __omap_sync32k_timer_init(2, "timer_sys_ck", NULL, - 1, "timer_sys_ck", "ti,timer-alwon", true); - if (of_have_populated_dt()) - timer_probe(); -} -#endif - #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) /* @@ -589,7 +65,6 @@ void __init omap3_gptimer_timer_init(void) */ static void __init realtime_counter_init(void) { -#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER void __iomem *base; static struct clk *sys_clk; unsigned long rate; @@ -688,7 +163,6 @@ sysclk1_based: set_cntfreq(); iounmap(base); -#endif } void __init omap5_realtime_timer_init(void) @@ -699,28 +173,3 @@ void __init omap5_realtime_timer_init(void) timer_probe(); } #endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */ - -/** - * omap2_override_clocksource - clocksource override with user configuration - * - * Allows user to override default clocksource, using kernel parameter - * clocksource="gp_timer" (For all OMAP2PLUS architectures) - * - * Note that, here we are using same standard kernel parameter "clocksource=", - * and not introducing any OMAP specific interface. - */ -static int __init omap2_override_clocksource(char *str) -{ - if (!str) - return 0; - /* - * For OMAP architecture, we only have two options - * - sync_32k (default) - * - gp_timer (sys_clk based) - */ - if (!strcmp(str, "gp_timer")) - use_gptimer_clksrc = true; - - return 0; -} -early_param("clocksource", omap2_override_clocksource); -- cgit From d86ad463d6706d35167418660ae3293207ee9d1c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 28 May 2020 08:54:53 -0700 Subject: ARM: OMAP2+: Fix regression for using local timer on non-SMP SoCs On am437x we use also an ARM timer in addition to the dmtimer. As am437x is not an SMP SoC, we need tick_broadcast() implemented. With the recent dmtimer changes, Arnd started to see link failures for non-SMP am437x configuration: kernel/time/tick-broadcast.o: in function `tick_device_uses_broadcast': tick-broadcast.c:(.text+0x130): undefined reference to `tick_broadcast' Let's fix the issue by reverting dmtimer related changes that started building timer.c only for CONFIG_SOC_HAS_REALTIME_COUNTER. We still always need timer.c built-in for omap5 and dra7 for timer_probe(). And let's also move am437x tick_broadcast() to board-generic.c as that's where we now call timer_probe() for am437x. This way we avoid adding back more ifdefs to timer.c. Fixes: 2ee04b88547a ("ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter") Reported-by: Arnd Bergmann Signed-off-by: Tony Lindgren Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap2/Makefile | 6 ++++-- arch/arm/mach-omap2/board-generic.c | 7 +++++++ arch/arm/mach-omap2/timer.c | 19 ++++++++++--------- 3 files changed, 21 insertions(+), 11 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 07616d346557..40898b1fd7da 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -16,8 +16,6 @@ hwmod-common = omap_hwmod.o omap_hwmod_reset.o \ clock-common = clock.o secure-common = omap-smc.o omap-secure.o -obj-$(CONFIG_SOC_HAS_REALTIME_COUNTER) += timer.o - obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common) obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) obj-$(CONFIG_ARCH_OMAP4) += $(hwmod-common) $(secure-common) @@ -48,6 +46,10 @@ obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) sleep44xx.o obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common) obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y) sleep44xx.o +omap5-dra7-common = timer.o +obj-$(CONFIG_SOC_OMAP5) += $(omap5-dra7-common) +obj-$(CONFIG_SOC_DRA7XX) += $(omap5-dra7-common) + # Functions loaded to SRAM obj-$(CONFIG_SOC_OMAP2420) += sram242x.o obj-$(CONFIG_SOC_OMAP2430) += sram243x.o diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index cafeb822bab7..334923d7652d 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -39,6 +39,13 @@ void __init __maybe_unused omap_init_time_of(void) timer_probe(); } +/* Used by am437x for ARM timer in non-SMP configurations */ +#if !defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) +void tick_broadcast(const struct cpumask *mask) +{ +} +#endif + #ifdef CONFIG_SOC_OMAP2420 static const char *const omap242x_boards_compat[] __initconst = { "ti,omap2420", diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index 2d4ea386fc38..c1737e737a94 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -39,6 +39,8 @@ #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 #define NUMERATOR_DENUMERATOR_MASK 0xfffff000 +#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER + static unsigned long arch_timer_freq; void set_cntfreq(void) @@ -46,14 +48,6 @@ void set_cntfreq(void) omap_smc1(OMAP5_DRA7_MON_SET_CNTFRQ_INDEX, arch_timer_freq); } -#if !defined(CONFIG_SMP) && defined(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) -void tick_broadcast(const struct cpumask *mask) -{ -} -#endif - -#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) - /* * The realtime counter also called master counter, is a free-running * counter, which is related to real time. It produces the count used @@ -165,6 +159,14 @@ sysclk1_based: iounmap(base); } +#else + +static inline void realtime_counter_init(void) +{ +} + +#endif /* CONFIG_SOC_HAS_REALTIME_COUNTER */ + void __init omap5_realtime_timer_init(void) { omap_clk_init(); @@ -172,4 +174,3 @@ void __init omap5_realtime_timer_init(void) timer_probe(); } -#endif /* CONFIG_SOC_OMAP5 || CONFIG_SOC_DRA7XX */ -- cgit From d2353bad2c1eef7a1228645fbb21e7887c633d12 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 29 May 2020 22:16:45 +0200 Subject: ARM: omap2: fix omap5_realtime_timer_init definition There is one more regression introduced by the last build fix: arch/arm/mach-omap2/timer.c:170:6: error: attribute declaration must precede definition [-Werror,-Wignored-attributes] void __init omap5_realtime_timer_init(void) ^ arch/arm/mach-omap2/common.h:118:20: note: previous definition is here static inline void omap5_realtime_timer_init(void) ^ arch/arm/mach-omap2/timer.c:170:13: error: redefinition of 'omap5_realtime_timer_init' void __init omap5_realtime_timer_init(void) ^ arch/arm/mach-omap2/common.h:118:20: note: previous definition is here static inline void omap5_realtime_timer_init(void) Address this by removing the now obsolete #ifdefs in that file and just building the entire file based on the flag that controls the omap5_realtime_timer_init function declaration. Link: https://lore.kernel.org/r/20200529201701.521933-1-arnd@arndb.de Fixes: d86ad463d670 ("ARM: OMAP2+: Fix regression for using local timer on non-SMP SoCs") Acked-by: Tony Lindgren Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap2/Makefile | 6 +++--- arch/arm/mach-omap2/timer.c | 10 ---------- 2 files changed, 3 insertions(+), 13 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 40898b1fd7da..732e614c56b2 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -46,9 +46,9 @@ obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) sleep44xx.o obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common) obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y) sleep44xx.o -omap5-dra7-common = timer.o -obj-$(CONFIG_SOC_OMAP5) += $(omap5-dra7-common) -obj-$(CONFIG_SOC_DRA7XX) += $(omap5-dra7-common) +omap5-dra7-common-$(CONFIG_SOC_HAS_REALTIME_COUNTER) = timer.o +obj-$(CONFIG_SOC_OMAP5) += $(omap5-dra7-common-y) +obj-$(CONFIG_SOC_DRA7XX) += $(omap5-dra7-common-y) # Functions loaded to SRAM obj-$(CONFIG_SOC_OMAP2420) += sram242x.o diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index c1737e737a94..620ba69c8f11 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -39,8 +39,6 @@ #define INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x14 #define NUMERATOR_DENUMERATOR_MASK 0xfffff000 -#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER - static unsigned long arch_timer_freq; void set_cntfreq(void) @@ -159,14 +157,6 @@ sysclk1_based: iounmap(base); } -#else - -static inline void realtime_counter_init(void) -{ -} - -#endif /* CONFIG_SOC_HAS_REALTIME_COUNTER */ - void __init omap5_realtime_timer_init(void) { omap_clk_init(); -- cgit