From cf14dd05fa1189af7ce6e7d5f46f89814786f277 Mon Sep 17 00:00:00 2001 From: Vishal Mahaveer Date: Wed, 30 Aug 2017 21:40:29 -0500 Subject: ARM: DRA722: Add support for DRA71x Silicon Rev 2.1 DRA71x processors are reduced pin and software compatible derivative of DRA72 processors. Silicon Rev 2.1 is a minor variant of DRA71x Rev 2.0 with various fixes including the following: - NAND boot fixes - ROM update for secure boot crypto enhancement Signed-off-by: Vishal Mahaveer Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/id.c | 5 ++++- arch/arm/mach-omap2/soc.h | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 16cb1c195fd8..df2c29edbbcd 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -693,9 +693,12 @@ void __init dra7xxx_check_revision(void) omap_revision = DRA722_REV_ES1_0; break; case 1: - default: omap_revision = DRA722_REV_ES2_0; break; + case 2: + default: + omap_revision = DRA722_REV_ES2_1; + break; } break; diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 19cbbed4a283..28fa1f8d8363 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h @@ -396,6 +396,7 @@ IS_OMAP_TYPE(3430, 0x3430) #define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8)) #define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8)) #define DRA722_REV_ES2_0 (DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8)) +#define DRA722_REV_ES2_1 (DRA7XX_CLASS | (0x22 << 16) | (0x21 << 8)) void omap2xxx_check_revision(void); void omap3xxx_check_revision(void); -- cgit