From af76e806b5b72da66b7c37d792ec422bafa14c22 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Fri, 9 Sep 2016 12:23:11 +0200 Subject: ARM: oxnas: Add OX820 SMP support The Oxford Semiconductor OX820 is a ARM11MPcore based SoC sharing some features with the OX810 earlier SoC. This patch adds the core to wake up the second core. Clarifications about Copyrights dates : - hotplug.c was taken from an old versatile code by Ma Haijun and left verbatim - headsmp.S was taken from an old versatile code and adapted by Ma Haijun - platsmp.c is a mix from versatile code, Ma Haijun code and my code for DT Hence the 2002/2003 ARM Coryrights and 2013 Ma Haijun Copyrights. Reviewed-by: Arnd Bergmann Signed-off-by: Neil Armstrong --- arch/arm/mach-oxnas/headsmp.S | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 arch/arm/mach-oxnas/headsmp.S (limited to 'arch/arm/mach-oxnas/headsmp.S') diff --git a/arch/arm/mach-oxnas/headsmp.S b/arch/arm/mach-oxnas/headsmp.S new file mode 100644 index 000000000000..25fd4f82ab3a --- /dev/null +++ b/arch/arm/mach-oxnas/headsmp.S @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2013 Ma Haijun + * Copyright (c) 2003 ARM Limited + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + + __INIT + +/* + * OX820 specific entry point for secondary CPUs. + */ +ENTRY(ox820_secondary_startup) + mov r4, #0 + /* invalidate both caches and branch target cache */ + mcr p15, 0, r4, c7, c7, 0 + /* + * we've been released from the holding pen: secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup -- cgit