From 89e162afd37caa6acab4e05b6e9e9fad6235381e Mon Sep 17 00:00:00 2001
From: Rongjun Ying <rongjun.ying@csr.com>
Date: Fri, 8 Jul 2011 02:40:14 -0700
Subject: ARM: CSR: initializing L2 cache

Signed-off-by: Rongjun Ying <rongjun.ying@csr.com>
Signed-off-by: Barry Song <baohua.song@csr.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
---
 arch/arm/mach-prima2/Makefile | 1 +
 1 file changed, 1 insertion(+)

(limited to 'arch/arm/mach-prima2/Makefile')

diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile
index f2fba666c109..7af7fc05d565 100644
--- a/arch/arm/mach-prima2/Makefile
+++ b/arch/arm/mach-prima2/Makefile
@@ -4,3 +4,4 @@ obj-y += clock.o
 obj-y += rstc.o
 obj-y += prima2.o
 obj-$(CONFIG_DEBUG_LL) += lluart.o
+obj-$(CONFIG_CACHE_L2X0) += l2x0.o
-- 
cgit