From fa79b8d6a2f38bf2c612acf38787a7fcf60c5db7 Mon Sep 17 00:00:00 2001
From: Chao Xie <xiechao.mail@gmail.com>
Date: Tue, 31 Jul 2012 14:13:11 +0800
Subject: ARM: cache: add cputype.h for tauros2

Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
---
 arch/arm/mm/cache-tauros2.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

(limited to 'arch/arm/mm/cache-tauros2.c')

diff --git a/arch/arm/mm/cache-tauros2.c b/arch/arm/mm/cache-tauros2.c
index 97e2ac81399f..4b787bba2b58 100644
--- a/arch/arm/mm/cache-tauros2.c
+++ b/arch/arm/mm/cache-tauros2.c
@@ -17,6 +17,7 @@
 #include <linux/init.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
+#include <asm/cputype.h>
 #include <asm/hardware/cache-tauros2.h>
 
 
@@ -161,8 +162,6 @@ static void __init disable_l2_prefetch(void)
 
 static inline int __init cpuid_scheme(void)
 {
-	extern int processor_id;
-
 	return !!((processor_id & 0x000f0000) == 0x000f0000);
 }
 
@@ -191,7 +190,6 @@ static inline void __init write_actlr(u32 actlr)
 
 void __init tauros2_init(void)
 {
-	extern int processor_id;
 	char *mode = NULL;
 
 	disable_l2_prefetch();
-- 
cgit