From 36582c60de2789feb91b63ff4ed8ec9381fa4d1e Mon Sep 17 00:00:00 2001 From: Sudeep Holla Date: Mon, 11 Jan 2016 17:16:08 +0000 Subject: arm64: dts: move juno pcie-controller to base file The PCIe controller is found on all Juno SoC version. However it's not functional on R0 due to some hardware bug. In preparation to add Juno R2 support, this patch moves the pcie-controller defination to base DTS file. It's marked as disabled by default and is enabled for Juno R1 explicitly. Acked-by: Liviu Dudau Signed-off-by: Sudeep Holla --- arch/arm64/boot/dts/arm/juno-base.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'arch/arm64/boot/dts/arm/juno-base.dtsi') diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index dd5158eb5872..b501721baf77 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -75,6 +75,28 @@ }; }; + pcie_ctlr: pcie-controller@40000000 { + compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; + device_type = "pci"; + reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ + bus-range = <0 255>; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + dma-coherent; + ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>, + <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>, + <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>, + <0 0 0 2 &gic 0 0 0 137 4>, + <0 0 0 3 &gic 0 0 0 138 4>, + <0 0 0 4 &gic 0 0 0 139 4>; + msi-parent = <&v2m_0>; + status = "disabled"; + }; + scpi { compatible = "arm,scpi"; mboxes = <&mailbox 1>; -- cgit From 9fd9288ed0899f9e318a97d73e777d6d3357265e Mon Sep 17 00:00:00 2001 From: Liviu Dudau Date: Thu, 2 Apr 2015 19:50:29 +0100 Subject: arm64: dts: Add HDLCD support on Juno platforms ARM's Juno platforms have two HDLCD controllers, each linked to an NXP TDA19988 HDMI transmitter that provides output encoding. Add them to the device tree. Acked-by: Sudeep Holla Signed-off-by: Liviu Dudau --- arch/arm64/boot/dts/arm/juno-base.dtsi | 46 +++++++++++++++++++++++++++++++--- 1 file changed, 42 insertions(+), 4 deletions(-) (limited to 'arch/arm64/boot/dts/arm/juno-base.dtsi') diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index b501721baf77..31d5d44db233 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -114,8 +114,8 @@ scpi_clk: scpi_clocks@3 { compatible = "arm,scpi-variable-clocks"; #clock-cells = <1>; - clock-indices = <3>, <4>; - clock-output-names = "pxlclk0", "pxlclk1"; + clock-indices = <3>; + clock-output-names = "pxlclk"; }; }; @@ -145,6 +145,34 @@ clock-names = "apb_pclk"; }; + hdlcd@7ff50000 { + compatible = "arm,hdlcd"; + reg = <0 0x7ff50000 0 0x1000>; + interrupts = ; + clocks = <&scpi_clk 3>; + clock-names = "pxlclk"; + + port { + hdlcd1_output: endpoint@0 { + remote-endpoint = <&tda998x_1_input>; + }; + }; + }; + + hdlcd@7ff60000 { + compatible = "arm,hdlcd"; + reg = <0 0x7ff60000 0 0x1000>; + interrupts = ; + clocks = <&scpi_clk 3>; + clock-names = "pxlclk"; + + port { + hdlcd0_output: endpoint@0 { + remote-endpoint = <&tda998x_0_input>; + }; + }; + }; + soc_uart0: uart@7ff80000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x7ff80000 0x0 0x1000>; @@ -163,14 +191,24 @@ i2c-sda-hold-time-ns = <500>; clocks = <&soc_smc50mhz>; - dvi0: dvi-transmitter@70 { + hdmi-transmitter@70 { compatible = "nxp,tda998x"; reg = <0x70>; + port { + tda998x_0_input: endpoint@0 { + remote-endpoint = <&hdlcd0_output>; + }; + }; }; - dvi1: dvi-transmitter@71 { + hdmi-transmitter@71 { compatible = "nxp,tda998x"; reg = <0x71>; + port { + tda998x_1_input: endpoint@0 { + remote-endpoint = <&hdlcd1_output>; + }; + }; }; }; -- cgit