From 346f5976cc3200896d5fb873412a4fe9c0fc611e Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Fri, 25 May 2018 11:10:02 +0530 Subject: arm64: dts: freescale: Add missing cooling device properties for CPUs The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi') diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 8f7ad1db525f..b9f5d2ff4ff2 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -43,8 +43,8 @@ reg = <0x0>; clocks = <&clockgen 1 0>; next-level-cache = <&l2>; - #cooling-cells = <2>; cpu-idle-states = <&CPU_PH20>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -54,6 +54,7 @@ clocks = <&clockgen 1 0>; next-level-cache = <&l2>; cpu-idle-states = <&CPU_PH20>; + #cooling-cells = <2>; }; cpu2: cpu@2 { @@ -63,6 +64,7 @@ clocks = <&clockgen 1 0>; next-level-cache = <&l2>; cpu-idle-states = <&CPU_PH20>; + #cooling-cells = <2>; }; cpu3: cpu@3 { @@ -72,6 +74,7 @@ clocks = <&clockgen 1 0>; next-level-cache = <&l2>; cpu-idle-states = <&CPU_PH20>; + #cooling-cells = <2>; }; l2: l2-cache { -- cgit