From 867b8557899e43b982af10c7c2c5407402431b1a Mon Sep 17 00:00:00 2001 From: Yashwanth Varakala Date: Fri, 16 Jun 2023 11:50:06 +0200 Subject: arm64: dts: freescale: imx8mm-phyboard-polis: Add TPM node Add TPM node for phyBOARD-Polis i.MX 8M Mini which has the Infineon-SLB 9670 TPM2.0 module populated. Signed-off-by: Yashwanth Varakala Signed-off-by: Yannic Moog Signed-off-by: Cem Tenruh Signed-off-by: Shawn Guo --- .../dts/freescale/imx8mm-phyboard-polis-rdk.dts | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts index 03e7679217b2..cfb811091b77 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts @@ -140,6 +140,27 @@ }; }; +/* TPM */ +&ecspi2 { + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + fsl,spi-num-chipselects = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + tpm: tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tpm>; + reg = <0>; + spi-max-frequency = <43000000>; + }; +}; + &gpio1 { gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT", "X_RTC_INT", "", "", "", "RESET_ETHPHY", @@ -333,6 +354,15 @@ >; }; + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x80 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x80 + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x80 + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x00 + >; + }; + pinctrl_fan: fan0grp { fsl,pins = < MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x16 @@ -368,6 +398,12 @@ >; }; + pinctrl_tpm: tpmgrp { + fsl,pins = < + MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x140 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x00 -- cgit From c933945fad116d062725b55c0de49867c431e1c0 Mon Sep 17 00:00:00 2001 From: Yannic Moog Date: Fri, 16 Jun 2023 11:50:10 +0200 Subject: arm64: dts: imx8mm-phyboard-polis: Set debug uart muxing to 0x140 Set Pull Resistors Enable bit to put signal into a defined state. Signed-off-by: Yannic Moog Signed-off-by: Cem Tenruh Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts index cfb811091b77..e6cc87cfe7a1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts @@ -424,8 +424,8 @@ pinctrl_uart3: uart3grp { fsl,pins = < - MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x40 - MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x40 + MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 + MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 >; }; -- cgit From cd3b83270a9b08cffd3bcca47b08783c8be778a3 Mon Sep 17 00:00:00 2001 From: Cem Tenruh Date: Fri, 16 Jun 2023 11:50:11 +0200 Subject: arm64: dts: imx8mm-phyboard-polis: Add i2c4 sda-/scl-gpios Add i2c4 sda-/scl-gpios with the corresponding pinmux entries. Signed-off-by: Cem Tenruh Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts index e6cc87cfe7a1..14e3172843bc 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts @@ -191,8 +191,11 @@ &i2c4 { clock-frequency = <400000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; }; /* PCIe */ @@ -376,6 +379,13 @@ >; }; + pinctrl_i2c4_gpio: i2c4gpiogrp { + fsl,pins = < + MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x1e2 + MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x1e2 + >; + }; + pinctrl_leds: leds1grp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16 -- cgit From aca26870217b14f6ccc5a4b5c9d16879756a5ed0 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 26 Jul 2023 09:50:25 -0300 Subject: arm64: dts: imx8mm-phyboard-polis-rdk: Remove 'fsl,spi-num-chipselects' The 'fsl,spi-num-chipselects' property is not a valid one, so remove it. Signed-off-by: Fabio Estevam Reviewed-by: Yannic Moog Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts') diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts index 14e3172843bc..7d28abb841ed 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts @@ -143,7 +143,6 @@ /* TPM */ &ecspi2 { cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; - fsl,spi-num-chipselects = <1>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; #address-cells = <1>; -- cgit