From 48d74376fb681b15cdb9db598aad2dff596a0d9e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 20 Oct 2022 18:31:58 +0800 Subject: arm64: dts: imx8mp: update ecspi compatible and clk i.MX8MP ECSPI is derived from i.MX6UL, so update compatible Add assigned-clocks settings Signed-off-by: Clark Wang Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 9f1b043c2f3f..7be02cd100cf 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -705,12 +705,15 @@ ecspi1: spi@30820000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx8mp-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx8mp-ecspi", "fsl,imx6ul-ecspi"; reg = <0x30820000 0x10000>; interrupts = ; clocks = <&clk IMX8MP_CLK_ECSPI1_ROOT>, <&clk IMX8MP_CLK_ECSPI1_ROOT>; clock-names = "ipg", "per"; + assigned-clock-rates = <80000000>; + assigned-clocks = <&clk IMX8MP_CLK_ECSPI1>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; dma-names = "rx", "tx"; status = "disabled"; @@ -719,12 +722,15 @@ ecspi2: spi@30830000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx8mp-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx8mp-ecspi", "fsl,imx6ul-ecspi"; reg = <0x30830000 0x10000>; interrupts = ; clocks = <&clk IMX8MP_CLK_ECSPI2_ROOT>, <&clk IMX8MP_CLK_ECSPI2_ROOT>; clock-names = "ipg", "per"; + assigned-clock-rates = <80000000>; + assigned-clocks = <&clk IMX8MP_CLK_ECSPI2>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; dma-names = "rx", "tx"; status = "disabled"; @@ -733,12 +739,15 @@ ecspi3: spi@30840000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx8mp-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx8mp-ecspi", "fsl,imx6ul-ecspi"; reg = <0x30840000 0x10000>; interrupts = ; clocks = <&clk IMX8MP_CLK_ECSPI3_ROOT>, <&clk IMX8MP_CLK_ECSPI3_ROOT>; clock-names = "ipg", "per"; + assigned-clock-rates = <80000000>; + assigned-clocks = <&clk IMX8MP_CLK_ECSPI3>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>; dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; dma-names = "rx", "tx"; status = "disabled"; -- cgit