From 3e8188b4b6c76bfa5c5389384bea2719a1271327 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 7 May 2023 19:45:15 +0200 Subject: arm64: dts: qcom: msm8996: correct MMCC clocks order Re-order the clocks for MMCC clock controller node to match the bindings (Linux driver takes by name): msm8996-mtp.dtb: clock-controller@8c0000: clock-names:1: 'gpll0' was expected msm8996-mtp.dtb: clock-controller@8c0000: clock-names:2: 'gcc_mmss_noc_cfg_ahb_clk' was expected Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230507174516.264936-2-krzysztof.kozlowski@linaro.org --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi') diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 751911fea396..a3f49f21ec37 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -887,16 +887,16 @@ #power-domain-cells = <1>; reg = <0x008c0000 0x40000>; clocks = <&xo_board>, - <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>, <&gcc GPLL0>, + <&gcc GCC_MMSS_NOC_CFG_AHB_CLK>, <&dsi0_phy 1>, <&dsi0_phy 0>, <&dsi1_phy 1>, <&dsi1_phy 0>, <&hdmi_phy>; clock-names = "xo", - "gcc_mmss_noc_cfg_ahb_clk", "gpll0", + "gcc_mmss_noc_cfg_ahb_clk", "dsi0pll", "dsi0pllbyte", "dsi1pll", -- cgit