From 9e35f49cf7037c3fe3fe4d51aec6d492741cddbe Mon Sep 17 00:00:00 2001 From: Biju Das Date: Wed, 12 Jun 2019 15:20:55 +0100 Subject: arm64: dts: renesas: r8a774a1: Add dynamic power coefficient Describe the dynamic power coefficient of A57 and A53 CPUs. Based on work by Gaku Inami and others. Signed-off-by: Biju Das Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/boot/dts/renesas/r8a774a1.dtsi') diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index 7d5e19c8cbd5..b437edc04712 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -135,6 +135,7 @@ power-domains = <&sysc R8A774A1_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -162,6 +163,7 @@ next-level-cache = <&L2_CA53>; enable-method = "psci"; #cooling-cells = <2>; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <560>; -- cgit