From f2802c62cca923ff394766c2fec23b00563f33c3 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Tue, 22 Aug 2023 05:57:55 +0000 Subject: arm64: dts: renesas: Handle ADG bit for sound clk_i Renesas Sound has been using CPG_AUDIO_CLK_I on CPG_CORE for clock, but this was wrong. Instead, it needs to use CPG_MOD, so clk_i can handle the "ADG" bit in SMSTPCR9. Signed-off-by: Kuninori Morimoto Tested-by: Vincenzo De Michele [r8a77965] Tested-by: Patrick Keil [r8a77965] Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/87y1i3sjoc.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87wmxnsjo7.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87v8d7sjo2.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87ttsrsjnx.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87sf8bsjns.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87r0nvsjnn.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87pm3fsjni.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87o7izsjnd.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87msyjsjn9.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87lee3sjn4.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87jztnsjmy.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87il97sjmu.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87h6orsjmp.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87fs4bsjml.wl-kuninori.morimoto.gx@renesas.com Link: https://lore.kernel.org/r/87edjvsjmg.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm64/boot/dts/renesas/r8a774b1.dtsi') diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 75776decd218..786660fcdea4 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -10,8 +10,6 @@ #include #include -#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4 - / { compatible = "renesas,r8a774b1"; #address-cells = <2>; @@ -1597,7 +1595,7 @@ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE R8A774B1_CLK_S0D4>; + <&cpg CPG_MOD 922>; clock-names = "ssi-all", "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4", "ssi.3", "ssi.2", -- cgit