From 271b66414df0b172c936b3cfd1894b7939f84165 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 10 May 2021 11:06:07 +0200 Subject: arm64: dts: rockchip: Add support for two PWM fans on helios64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On the helios64 board the two connectors P6 and P7 are supposed to power two fans. Add the corresponding pwm-fan devices. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20210510090607.970145-1-uwe@kleine-koenig.org Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3399-kobol-helios64.dts | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts') diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts index 19485b552bc4..9d4a0885fd12 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts @@ -40,6 +40,20 @@ #clock-cells = <0>; }; + fan1 { + /* fan connected to P7 */ + compatible = "pwm-fan"; + pwms = <&pwm0 0 40000 0>; + cooling-levels = <0 80 170 255>; + }; + + fan2 { + /* fan connected to P6 */ + compatible = "pwm-fan"; + pwms = <&pwm1 0 40000 0>; + cooling-levels = <0 80 170 255>; + }; + leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -352,6 +366,16 @@ status = "okay"; }; +&pwm0 { + /* pwm-fan on P7 */ + status = "okay"; +}; + +&pwm1 { + /* pwm-fan on P6 */ + status = "okay"; +}; + &sdhci { bus-width = <8>; mmc-hs200-1_8v; -- cgit From 5a65adfa2ad1542f856fc7de3999d51f3a35d2e2 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 10 May 2021 11:09:32 +0200 Subject: arm64: dts: rockchip: Add support for PCIe on helios64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is enough to make the SATA controller visible: # lspci 00:00.0 PCI bridge: Fuzhou Rockchip Electronics Co., Ltd RK3399 PCI Express Root Port 01:00.0 SATA controller: JMicron Technology Corp. JMB58x AHCI SATA controller Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20210510090932.970447-1-uwe@kleine-koenig.org Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3399-kobol-helios64.dts | 53 ++++++++++++++++++++++ 1 file changed, 53 insertions(+) (limited to 'arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts') diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts index 9d4a0885fd12..037dc5cdc3f3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts @@ -23,6 +23,16 @@ mmc1 = &sdhci; }; + avdd_0v9_s0: avdd-0v9-s0 { + compatible = "regulator-fixed"; + regulator-name = "avdd_0v9_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc1v8_sys_s3>; + }; + avdd_1v8_s0: avdd-1v8-s0 { compatible = "regulator-fixed"; regulator-name = "avdd_1v8_s0"; @@ -72,6 +82,18 @@ }; }; + pcie_power: pcie-power { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie_pwr>; + pinctrl-names = "default"; + regulator-boot-on; + regulator-name = "pcie_power"; + startup-delay-us = <10000>; + vin-supply = <&vcc5v0_perdev>; + }; + vcc1v8_sys_s0: vcc1v8-sys-s0 { compatible = "regulator-fixed"; regulator-name = "vcc1v8_sys_s0"; @@ -109,6 +131,16 @@ }; }; + vcc5v0_perdev: vcc5v0-perdev { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_perdev"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc12v_dcin_bkup>; + }; + vcc5v0_sys: vcc5v0-sys { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -331,6 +363,20 @@ status = "okay"; }; +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + num-lanes = <2>; + status = "okay"; + + vpcie12v-supply = <&vcc12v_dcin>; + vpcie3v3-supply = <&pcie_power>; + vpcie1v8-supply = <&avdd_1v8_s0>; + vpcie0v9-supply = <&avdd_0v9_s0>; +}; + &pinctrl { gmac { gphy_reset: gphy-reset { @@ -348,6 +394,13 @@ }; }; + pcie { + pcie_pwr: pcie-pwr { + rockchip,pins = + <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + pmic { pmic_int_l: pmic-int-l { rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; -- cgit From 51094deb330623a172b80f7f1cb43f2d6e165c4f Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Fri, 11 Jun 2021 10:14:14 +0200 Subject: arm64: dts: rockchip: Add support for USB on helios64 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This enables the USB hardware needed to access devices on the sockets J1 and J13. Signed-off-by: Uwe Kleine-König Link: https://lore.kernel.org/r/20210611081414.1448786-1-uwe@kleine-koenig.org Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3399-kobol-helios64.dts | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts') diff --git a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts index 037dc5cdc3f3..738cfd21df3e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts @@ -155,6 +155,20 @@ }; }; + vcc5v0_usb: vcc5v0-usb { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_en>; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_perdev>; + }; + vcc12v_dcin: vcc12v-dcin { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; @@ -407,6 +421,12 @@ }; }; + power { + vcc5v0_usb_en: vcc5v0-usb-en { + rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + vcc3v0-sd { sdmmc0_pwr_h: sdmmc0-pwr-h { rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; @@ -449,6 +469,30 @@ status = "okay"; }; +&tcphy1 { + /* phy for &usbdrd_dwc3_1 */ + status = "okay"; +}; + +&u2phy1 { + status = "okay"; + + otg-port { + /* phy for &usbdrd_dwc3_1 */ + phy-supply = <&vcc5v0_usb>; + status = "okay"; + }; +}; + &uart2 { status = "okay"; }; + +&usbdrd3_1 { + status = "okay"; + + usb@fe900000 { + dr_mode = "host"; + status = "okay"; + }; +}; -- cgit