From c349ae38171bff28e0cbdbb8f8ea9d2513a6ff5e Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 10 Feb 2021 12:10:20 +0100 Subject: arm64: dts: rockchip: add isp1 node on rk3399 ISP1 is supplied by the tx1rx1 dphy, that is controlled from inside the dsi1 controller, so include the necessary phy-link for it. Signed-off-by: Heiko Stuebner Tested-by: Sebastian Fricke Acked-by: Helen Koike Link: https://lore.kernel.org/r/20210210111020.2476369-7-heiko@sntech.de Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm64/boot/dts/rockchip/rk3399.dtsi') diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 493042bc20c0..9db9484ca38f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1762,6 +1762,32 @@ rockchip,disable-mmu-reset; }; + isp1: isp1@ff920000 { + compatible = "rockchip,rk3399-cif-isp"; + reg = <0x0 0xff920000 0x0 0x4000>; + interrupts = ; + clocks = <&cru SCLK_ISP1>, + <&cru ACLK_ISP1_WRAPPER>, + <&cru HCLK_ISP1_WRAPPER>; + clock-names = "isp", "aclk", "hclk"; + iommus = <&isp1_mmu>; + phys = <&mipi_dsi1>; + phy-names = "dphy"; + power-domains = <&power RK3399_PD_ISP1>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; + isp1_mmu: iommu@ff924000 { compatible = "rockchip,iommu"; reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>; -- cgit