From 6fbd1310f99fc95d063b64d42addf701309663d6 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Wed, 9 Aug 2023 19:38:02 -0500 Subject: arm64: dts: ti: k3-j721e: Enable SDHCI nodes at the board level SDHCI nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis Reviewed-by: Dhruva Gole Link: https://lore.kernel.org/r/20230810003814.85450-2-afd@ti.com Signed-off-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm64/boot/dts/ti/k3-j721e-main.dtsi') diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 68a8abf59d24..3c53ddd6a67a 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -1479,6 +1479,7 @@ ti,itap-del-sel-ddr52 = <0x3>; ti,trm-icp = <0x8>; dma-coherent; + status = "disabled"; }; main_sdhci1: mmc@4fb0000 { @@ -1506,6 +1507,7 @@ ti,clkbuf-sel = <0x7>; dma-coherent; sdhci-caps-mask = <0x2 0x0>; + status = "disabled"; }; main_sdhci2: mmc@4f98000 { @@ -1533,6 +1535,7 @@ ti,clkbuf-sel = <0x7>; dma-coherent; sdhci-caps-mask = <0x2 0x0>; + status = "disabled"; }; usbss0: cdns-usb@4104000 { -- cgit