From e4f88d833bec29b8e6fadc1b2488f0c6370935e1 Mon Sep 17 00:00:00 2001 From: Jungseok Lee Date: Tue, 2 Dec 2014 17:49:24 +0000 Subject: arm64: Implement support for read-mostly sections As putting data which is read mostly together, we can avoid unnecessary cache line bouncing. Other architectures, such as ARM and x86, adopted the same idea. Acked-by: Catalin Marinas Signed-off-by: Jungseok Lee Signed-off-by: Will Deacon --- arch/arm64/include/asm/cache.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/include/asm/cache.h') diff --git a/arch/arm64/include/asm/cache.h b/arch/arm64/include/asm/cache.h index 88cc05b5f3ac..bde449936e2f 100644 --- a/arch/arm64/include/asm/cache.h +++ b/arch/arm64/include/asm/cache.h @@ -32,6 +32,8 @@ #ifndef __ASSEMBLY__ +#define __read_mostly __attribute__((__section__(".data..read_mostly"))) + static inline int cache_line_size(void) { u32 cwg = cache_type_cwg(); -- cgit