From e01e1737e348acdfc43a620060410559072f29c1 Mon Sep 17 00:00:00 2001 From: Anshuman Khandual Date: Wed, 14 Jun 2023 12:29:37 +0530 Subject: arm64/sysreg: Rename TRBPTR_EL1 fields per auto-gen tools format This renames TRBPTR_EL1 register fields per auto-gen tools format without causing any functional change in the TRBE driver. Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual Reviewed-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20230614065949.146187-3-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas --- arch/arm64/include/asm/sysreg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm64/include/asm/sysreg.h') diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index d930400ea94f..31005f72353e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -246,8 +246,8 @@ #define TRBLIMITR_EL1_FM_MASK GENMASK(2, 1) #define TRBLIMITR_EL1_FM_SHIFT 1 #define TRBLIMITR_EL1_E BIT(0) -#define TRBPTR_PTR_MASK GENMASK_ULL(63, 0) -#define TRBPTR_PTR_SHIFT 0 +#define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0) +#define TRBPTR_EL1_PTR_SHIFT 0 #define TRBBASER_BASE_MASK GENMASK_ULL(51, 0) #define TRBBASER_BASE_SHIFT 12 #define TRBSR_EC_MASK GENMASK(5, 0) -- cgit