From eee64165a54e8e045fffa41950b60af51856266c Mon Sep 17 00:00:00 2001 From: Anshuman Khandual Date: Wed, 14 Jun 2023 12:29:43 +0530 Subject: arm64/sysreg: Convert TRBLIMITR_EL1 register to automatic generation This converts TRBLIMITR_EL1 register to automatic generation without causing any functional change. Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Mark Brown Signed-off-by: Anshuman Khandual Reviewed-by: Suzuki K Poulose Link: https://lore.kernel.org/r/20230614065949.146187-9-anshuman.khandual@arm.com Signed-off-by: Catalin Marinas --- arch/arm64/include/asm/sysreg.h | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'arch/arm64/include/asm/sysreg.h') diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index d699747a0363..f97d08d8d8da 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -227,10 +227,6 @@ /*** End of Statistical Profiling Extension ***/ -/* - * TRBE Registers - */ -#define SYS_TRBLIMITR_EL1 sys_reg(3, 0, 9, 11, 0) #define SYS_TRBPTR_EL1 sys_reg(3, 0, 9, 11, 1) #define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2) #define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3) @@ -238,14 +234,6 @@ #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBLIMITR_EL1_LIMIT_MASK GENMASK_ULL(63, 12) -#define TRBLIMITR_EL1_LIMIT_SHIFT 12 -#define TRBLIMITR_EL1_nVM BIT(5) -#define TRBLIMITR_EL1_TM_MASK GENMASK(4, 3) -#define TRBLIMITR_EL1_TM_SHIFT 3 -#define TRBLIMITR_EL1_FM_MASK GENMASK(2, 1) -#define TRBLIMITR_EL1_FM_SHIFT 1 -#define TRBLIMITR_EL1_E BIT(0) #define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0) #define TRBPTR_EL1_PTR_SHIFT 0 #define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) -- cgit