From bccf90d6e063d278b9ddc78dd266d0adef29886c Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Fri, 23 Jun 2017 18:50:42 -0700 Subject: PCI: Add a generic weak pcibios_fixup_bus() Multiple architectures define this as an empty function, and I'm adding another one as part of the RISC-V port. Add a __weak version of pcibios_fixup_bus() and delete the now-obselete ones in a handful of ports. The only functional change should be that microblaze used to export pcibios_fixup_bus(). None of the other architectures exports this, so I just dropped it. Signed-off-by: Palmer Dabbelt Signed-off-by: Bjorn Helgaas --- arch/arm64/kernel/pci.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index e2b7e4f9cc31..d91051259bb2 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -22,14 +22,6 @@ #include #include -/* - * Called after each bus is probed, but before its children are examined - */ -void pcibios_fixup_bus(struct pci_bus *bus) -{ - /* nothing to do, expected to be removed in the future */ -} - /* * We don't have to worry about legacy ISA devices, so nothing to do here */ -- cgit From ecf677c8dcaa7bf13eee31b4d9e4639d559984ad Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Wed, 2 Aug 2017 14:44:50 -0500 Subject: PCI: Add a generic weak pcibios_align_resource() Multiple architectures define this as a trivial function, and I'm adding another one as part of the RISC-V port. Add a __weak version of pcibios_align_resource() and delete the now-obselete ones in a handful of ports. The only functional change should be that a handful of ports used to export pcibios_fixup_bus(). Only some architectures export this, so I just dropped it. Signed-off-by: Palmer Dabbelt Signed-off-by: Bjorn Helgaas --- arch/arm64/kernel/pci.c | 9 --------- 1 file changed, 9 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index d91051259bb2..0e2ea1c78542 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -22,15 +22,6 @@ #include #include -/* - * We don't have to worry about legacy ISA devices, so nothing to do here - */ -resource_size_t pcibios_align_resource(void *data, const struct resource *res, - resource_size_t size, resource_size_t align) -{ - return res->start; -} - #ifdef CONFIG_ACPI /* * Try to assign the IRQ number when probing a new device -- cgit From e9a60cac89ab75fad51c12912b489043087beb90 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Wed, 19 Jul 2017 17:57:56 +0800 Subject: arm64: dts: rockchip: convert PCIe to use per-lane PHYs for rk3339 Convert all RK3399 platforms to use per-lane PHY model in order to save more power by idling unused lane(s). Tested-by: Jeffy Chen Signed-off-by: Shawn Lin Signed-off-by: Bjorn Helgaas Reviewed-by: Brian Norris --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 69c56f7316c4..5b78ce16a87e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -238,8 +238,10 @@ linux,pci-domain = <0>; max-link-speed = <1>; msi-map = <0x0 &its 0x0 0x1000>; - phys = <&pcie_phy>; - phy-names = "pcie-phy"; + phys = <&pcie_phy 0>, <&pcie_phy 1>, + <&pcie_phy 2>, <&pcie_phy 3>; + phy-names = "pcie-phy-0", "pcie-phy-1", + "pcie-phy-2", "pcie-phy-3"; ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000 0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>; resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, @@ -1295,7 +1297,7 @@ compatible = "rockchip,rk3399-pcie-phy"; clocks = <&cru SCLK_PCIEPHY_REF>; clock-names = "refclk"; - #phy-cells = <0>; + #phy-cells = <1>; resets = <&cru SRST_PCIEPHY>; reset-names = "phy"; status = "disabled"; -- cgit