From 2933bf3528007f834fb7f5eab033f9c5b0683f91 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Sat, 22 Aug 2020 14:27:55 +0800 Subject: arm64: dts: allwinner: h5: remove Mali GPU PMU module H5's Mali GPU PMU is not present or working corretly although H5 datasheet record its interrupt vector. Adding this module will miss lead lima driver try to shutdown it and get waiting timeout. This problem is not exposed before lima runtime PM support is added. Fixes: bb39ed07e55b ("arm64: dts: allwinner: h5: Add device node for Mali-450 GPU") Signed-off-by: Qiang Yu Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20200822062755.534761-1-yuq825@gmail.com --- arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index 6735e316a39c..6c6053a18413 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -139,8 +139,7 @@ , , , - , - ; + ; interrupt-names = "gp", "gpmmu", "pp", @@ -151,8 +150,7 @@ "pp2", "ppmmu2", "pp3", - "ppmmu3", - "pmu"; + "ppmmu3"; clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; clock-names = "bus", "core"; resets = <&ccu RST_BUS_GPU>; -- cgit From e0b760a5f6c9e54db8bd22b1d6b19223e6b92264 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Wed, 12 Aug 2020 15:52:10 +0530 Subject: arm64: dts: sdm845: Fixup OPP table for all qup devices This OPP table was based on the clock VDD-FMAX tables seen in downstream code, however it turns out the downstream clock driver does update these tables based on later/production rev of the chip and whats seen in the tables belongs to an early engineering rev of the SoC. Fix up the OPP tables such that it now matches with the production rev of sdm845 SoC. Tested-by: Amit Pundir Tested-by: John Stultz Tested-by: Steev Klimaszewski Fixes: 13cadb34e593 ("arm64: dts: sdm845: Add OPP table for all qup devices") Reported-by: John Stultz Signed-off-by: Rajendra Nayak Link: https://lore.kernel.org/r/1597227730-16477-1-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 2884577dcb77..eca81cffd2c1 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1093,8 +1093,8 @@ qup_opp_table: qup-opp-table { compatible = "operating-points-v2"; - opp-19200000 { - opp-hz = /bits/ 64 <19200000>; + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; required-opps = <&rpmhpd_opp_min_svs>; }; @@ -1107,6 +1107,11 @@ opp-hz = /bits/ 64 <100000000>; required-opps = <&rpmhpd_opp_svs>; }; + + opp-128000000 { + opp-hz = /bits/ 64 <128000000>; + required-opps = <&rpmhpd_opp_nom>; + }; }; qupv3_id_0: geniqup@8c0000 { -- cgit From 326407d2c576995464fda64e92b5e37f3589e5ee Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Tue, 30 Jun 2020 00:26:10 +0200 Subject: arm64: dts: sdm630: Temporarily disable SMMUs by default There happens to be an issue between how kernel handles qcom-smmuv2 and how the hypervisor would like it to be handled. That results in the platform hanging completely after the SMMUs are probed. Hence, disable the SMMU nodes temporarily, until the issue is rectified. This has been overlooked by me in the initial porting stage, as my defconfig has SMMU disabled. Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20200629222610.168511-1-konradybcio@gmail.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sdm630.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index 88efe8200c80..deb928d303c2 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -518,6 +518,8 @@ , , ; + + status = "disabled"; }; tcsr_mutex_regs: syscon@1f40000 { @@ -749,6 +751,8 @@ , , ; + + status = "disabled"; }; lpass_smmu: iommu@5100000 { @@ -778,6 +782,8 @@ , , ; + + status = "disabled"; }; spmi_bus: spmi@800f000 { @@ -1074,6 +1080,8 @@ , , ; + + status = "disabled"; }; apcs_glb: mailbox@17911000 { -- cgit From e884fb6cc89dce1debeae33704edd7735a3d6d9c Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Fri, 14 Aug 2020 17:47:49 +0200 Subject: arm64: dts: qcom: kitakami: Temporarily disable SDHCI1 There is an issue with Kitakami eMMCs dying when a quirk isn't addressed. Until that happens, disable it. Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20200814154749.257837-1-konradybcio@gmail.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi index 4032b7478f04..791f254ac3f8 100644 --- a/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami.dtsi @@ -221,7 +221,12 @@ }; &sdhc1 { - status = "okay"; + /* There is an issue with the eMMC causing permanent + * damage to the card if a quirk isn't addressed. + * Until it's fixed, disable the MMC so as not to brick + * devices. + */ + status = "disabled"; /* Downstream pushes 2.95V to the sdhci device, * but upstream driver REALLY wants to make vmmc 1.8v -- cgit From 22f5adc75a8d60080e489b0f90f0a55104488464 Mon Sep 17 00:00:00 2001 From: Łukasz Patron Date: Sat, 25 Jul 2020 10:24:17 +0200 Subject: arm64: dts: qcom: pm660: Fix missing pound sign in interrupt-cells MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also add a space after '=' while at it. Tested-by: Konrad Dybcio Signed-off-by: Łukasz Patron Link: https://lore.kernel.org/r/20200725082417.8507-1-priv.luk@gmail.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/pm660.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/qcom/pm660.dtsi b/arch/arm64/boot/dts/qcom/pm660.dtsi index ea0e9558d0f2..2e6a6f6c3b66 100644 --- a/arch/arm64/boot/dts/qcom/pm660.dtsi +++ b/arch/arm64/boot/dts/qcom/pm660.dtsi @@ -44,7 +44,7 @@ gpio-ranges = <&pm660_gpios 0 0 13>; #gpio-cells = <2>; interrupt-controller; - interrupt-cells =<2>; + #interrupt-cells = <2>; }; }; }; -- cgit From c65176fd49f45bd5a5ffaa1790109745d1fa462c Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 18 Sep 2020 19:59:30 +0300 Subject: arm64: dts: ti: k3-j721e: Rename mux header and update macro names We intend to use one header file for SERDES MUX for all TI SoCs so rename the header file. The exsting macros are too generic. Prefix them with SoC name. While at that, add the missing configurations for completeness. Fixes: b766e3b0d5f6 ("arm64: dts: ti: k3-j721e-main: Add system controller node and SERDES lane mux") Reported-by: Peter Rosin Signed-off-by: Roger Quadros Signed-off-by: Nishanth Menon Acked-by: Peter Rosin Link: https://lore.kernel.org/r/20200918165930.2031-1-rogerq@ti.com --- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 11 ++++++----- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 13 +++++++------ 2 files changed, 13 insertions(+), 11 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index e8fc01d97ada..6f7490efc438 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -404,11 +404,12 @@ }; &serdes_ln_ctrl { - idle-states = , , - , , - , , - , , - , , , ; + idle-states = , , + , , + , , + , , + , , + , ; }; &serdes_wiz3 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 12ceea9b3c9a..63d221aee9bc 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -6,7 +6,7 @@ */ #include #include -#include +#include &cbass_main { msmc_ram: sram@70000000 { @@ -38,11 +38,12 @@ <0x40b0 0x3>, <0x40b4 0x3>, /* SERDES3 lane0/1 select */ <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>; /* SERDES4 lane0/1/2/3 select */ - idle-states = , , - , , - , , - , , - , , , ; + idle-states = , , + , , + , , + , , + , , + , ; }; usb_serdes_mux: mux-controller@4000 { -- cgit