From c282ea743bb617b9419398254308edfa70c3c64f Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 29 Jun 2018 13:51:00 +1000 Subject: ARM: dts: aspeed: Add G4 USB pinmux Set the default pinmux for EHCI so boards don't have to do it, and document why it is not set for UHCI. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 75df1573380e..1d7ffa9fdb11 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -113,6 +113,8 @@ reg = <0x1e6a1000 0x100>; interrupts = <5>; clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2h_default>; status = "disabled"; }; @@ -123,6 +125,10 @@ #ports = <3>; clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; status = "disabled"; + /* + * No default pinmux, it will follow EHCI, use an explicit pinmux + * override if you don't enable EHCI + */ }; apb { -- cgit From 112c5a640cfb03b532bea0179991895bbff25aa4 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 29 Jun 2018 13:51:01 +1000 Subject: ARM: dts: aspeed: Add G5 USB host pinmux Set the default pinmux for EHCIs so boards don't have to do it an document why it is not set for UHCI. Remove the properties from the AST2500 EVB board which are now redundant Signed-off-by: Benjamin Herrenschmidt Reviewed-by: Andrew Jeffery Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-ast2500-evb.dts | 6 ------ arch/arm/boot/dts/aspeed-g5.dtsi | 8 ++++++++ 2 files changed, 8 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts index ede11c597673..2bff1b253842 100644 --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts @@ -82,18 +82,12 @@ &ehci0 { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2ah_default>; }; &ehci1 { status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb2bh_default>; }; &uhci { status = "okay"; - - /* No pinctrl, this follows the above EHCI settings */ }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 17f2714d18a7..dfdc239b86f6 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -148,6 +148,8 @@ reg = <0x1e6a1000 0x100>; interrupts = <5>; clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2ah_default>; status = "disabled"; }; @@ -156,6 +158,8 @@ reg = <0x1e6a3000 0x100>; interrupts = <13>; clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2bh_default>; status = "disabled"; }; @@ -166,6 +170,10 @@ #ports = <2>; clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; status = "disabled"; + /* + * No default pinmux, it will follow EHCI, use an explicit pinmux + * override if you don't enable EHCI + */ }; apb { -- cgit From 608d05c61cdcd42d0ecdf7ad2d865b54569f79d5 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 29 Jun 2018 13:51:02 +1000 Subject: ARM: dts: aspeed: Add G4 USB Virtual Hub This adds the (disabled by default) device node for the Aspeed virtual hub,a long with clocks and pinmux. Signed-off-by: Benjamin Herrenschmidt Acked-by: Andrew Jeffery Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 1d7ffa9fdb11..54524564037c 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -131,6 +131,16 @@ */ }; + vhub: usb-vhub@1e6a0000 { + compatible = "aspeed,ast2400-usb-vhub"; + reg = <0x1e6a0000 0x300>; + interrupts = <5>; + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2d_default>; + status = "disabled"; + }; + apb { compatible = "simple-bus"; #address-cells = <1>; -- cgit From 35578a85d981ffb434b7eb8cd2156388788dcaa0 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 29 Jun 2018 13:51:03 +1000 Subject: ARM: dts: aspeed: Add G5 USB Virtual Hub This adds the (disabled by default) device node for the Aspeed virtual hub,a long with clocks and pinmux. This also adds the missing pinmux definition for it (the kernel driver already knows about it). Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g5.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index dfdc239b86f6..6274d3eaf374 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -176,6 +176,16 @@ */ }; + vhub: usb-vhub@1e6a0000 { + compatible = "aspeed,ast2500-usb-vhub"; + reg = <0x1e6a0000 0x300>; + interrupts = <5>; + clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2ad_default>; + status = "disabled"; + }; + apb { compatible = "simple-bus"; #address-cells = <1>; @@ -1425,6 +1435,11 @@ groups = "USB2AH"; }; + pinctrl_usb2ad_default: usb2ad_default { + function = "USB2AD"; + groups = "USB2AD"; + }; + pinctrl_usb11bhid_default: usb11bhid_default { function = "USB11BHID"; groups = "USB11BHID"; -- cgit From b35bbd3d71872d35df17c40b4e4423855d8c5e6f Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 29 Jun 2018 13:51:06 +1000 Subject: ARM: dts: aspeed: Enable vhub on port A of AST2500 EVB This is an eval board, it makes sense to enable many functions by default. This changes the device-tree to set port A to be a USB device and leave port B as a host, along with a little comment explaining how to change it. (the vhub device can only exist on port A on this SoC) Signed-off-by: Benjamin Herrenschmidt Acked-by: Andrew Jeffery Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-ast2500-evb.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-ast2500-evb.dts b/arch/arm/boot/dts/aspeed-ast2500-evb.dts index 2bff1b253842..2375449c02d0 100644 --- a/arch/arm/boot/dts/aspeed-ast2500-evb.dts +++ b/arch/arm/boot/dts/aspeed-ast2500-evb.dts @@ -80,7 +80,13 @@ }; }; -&ehci0 { +/* + * Enable port A as device (via the virtual hub) and port B as + * host by default on the eval board. This can be easily changed + * by replacing the override below with &ehci0 { ... } to enable + * host on both ports. + */ +&vhub { status = "okay"; }; -- cgit From 0f33bde8859b7746ecdd8af1d1e5dde0e9b899f9 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Mon, 18 Jun 2018 14:58:59 +1000 Subject: ARM: dts: aspeed: Fix Romulus VGA frame buffer The reserved memory for the VGA frame buffer is at the wrong address for this system. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts index 389f5f83bef9..9176b3cda812 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts @@ -21,9 +21,9 @@ #size-cells = <1>; ranges; - vga_memory: framebuffer@bf000000 { + vga_memory: framebuffer@9f000000 { no-map; - reg = <0xbf000000 0x01000000>; /* 16M */ + reg = <0x9f000000 0x01000000>; /* 16M */ }; flash_memory: region@98000000 { -- cgit From a2df75ab0aba98daf7fa4828cf8a669c636c6382 Mon Sep 17 00:00:00 2001 From: Lei YU Date: Wed, 9 May 2018 17:35:59 +0800 Subject: ARM: dts: aspeed: Use 24MHz fixed clock for pwm The aspeed pwm driver always sets the clock source to 24MHz, specify the fixed clock in device tree to make sure the driver is using the correct clock frequency to calculate the fan speed. Signed-off-by: Lei YU Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 2 +- arch/arm/boot/dts/aspeed-g5.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 54524564037c..680336ac06f8 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -240,7 +240,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x1e786000 0x1000>; - clocks = <&syscon ASPEED_CLK_APB>; + clocks = <&syscon ASPEED_CLK_24M>; resets = <&syscon ASPEED_RESET_PWM>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 6274d3eaf374..02e70ad3ab70 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -299,7 +299,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x1e786000 0x1000>; - clocks = <&syscon ASPEED_CLK_APB>; + clocks = <&syscon ASPEED_CLK_24M>; resets = <&syscon ASPEED_RESET_PWM>; status = "disabled"; }; -- cgit From 2450ceaf21798183f51bfdbd7d314635dbb62f4c Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Tue, 24 Jul 2018 14:24:02 +1000 Subject: ARM: dts: aspeed: Add coprocessor interrupt controller Add a node for the CVIC (the coprocessor interrupt controller) and add a label to the SRAM node so it can be referenced from the board device-tree file. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 8 +++++++- arch/arm/boot/dts/aspeed-g5.dtsi | 9 ++++++++- 2 files changed, 15 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 680336ac06f8..b23a983f95a5 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -92,6 +92,12 @@ reg = <0x1e6c0080 0x80>; }; + cvic: copro-interrupt-controller@1e6c2000 { + compatible = "aspeed,ast2400-cvic", "aspeed-cvic"; + valid-sources = <0x7fffffff>; + reg = <0x1e6c2000 0x80>; + }; + mac0: ethernet@1e660000 { compatible = "aspeed,ast2400-mac", "faraday,ftgmac100"; reg = <0x1e660000 0x180>; @@ -177,7 +183,7 @@ status = "disabled"; }; - sram@1e720000 { + sram: sram@1e720000 { compatible = "mmio-sram"; reg = <0x1e720000 0x8000>; // 32K }; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 02e70ad3ab70..87fdc146ff52 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -127,6 +127,13 @@ reg = <0x1e6c0080 0x80>; }; + cvic: copro-interrupt-controller@1e6c2000 { + compatible = "aspeed,ast2500-cvic", "aspeed-cvic"; + valid-sources = <0xffffffff>; + copro-sw-interrupts = <1>; + reg = <0x1e6c2000 0x80>; + }; + mac0: ethernet@1e660000 { compatible = "aspeed,ast2500-mac", "faraday,ftgmac100"; reg = <0x1e660000 0x180>; @@ -229,7 +236,7 @@ status = "disabled"; }; - sram@1e720000 { + sram: sram@1e720000 { compatible = "mmio-sram"; reg = <0x1e720000 0x9000>; // 36K }; -- cgit