From 81a0a21b6159c6a9ed1e39c23e755cd05a102ce3 Mon Sep 17 00:00:00 2001 From: Rayyan Ansari Date: Wed, 24 Apr 2024 18:42:06 +0100 Subject: ARM: dts: qcom: msm8226-microsoft-common: Enable smbb explicitly Enable the smbb node explicitly for MSM8x26 Lumia devices. These devices rely on the smbb driver in order to detect USB state. It seems that this was accidentally missed in the commit that this fixes. Fixes: c9c8179d0ccd ("ARM: dts: qcom: Disable pm8941 & pm8226 smbb charger by default") Signed-off-by: Rayyan Ansari Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240424174206.4220-1-rayyan@ansari.sh Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi index 525d8c608b06..8839b23fc693 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8226-microsoft-common.dtsi @@ -287,6 +287,10 @@ status = "okay"; }; +&smbb { + status = "okay"; +}; + &usb { extcon = <&smbb>; dr_mode = "peripheral"; -- cgit From 49b9981a0ecae2bbb298d8b0c2b8058220038691 Mon Sep 17 00:00:00 2001 From: Bryant Mairs Date: Mon, 19 Feb 2024 22:43:17 +0100 Subject: ARM: dts: qcom: Add support for Samsung Galaxy Tab 4 8.0 Wi-Fi Add support for this tablet based on the MSM8226 SoC, codenamed "milletwifi". Acked-by: Linus Walleij Reviewed-by: Luca Weiss Signed-off-by: Bryant Mairs Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240219214643.197116-3-bryant@mai.rs Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/Makefile | 1 + .../dts/qcom/qcom-apq8026-samsung-milletwifi.dts | 573 +++++++++++++++++++++ 2 files changed, 574 insertions(+) create mode 100644 arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index e2e922bdc9e9..1149a310ad43 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -6,6 +6,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8026-huawei-sturgeon.dtb \ qcom-apq8026-lg-lenok.dtb \ qcom-apq8026-samsung-matisse-wifi.dtb \ + qcom-apq8026-samsung-milletwifi.dtb \ qcom-apq8060-dragonboard.dtb \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ diff --git a/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts b/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts new file mode 100644 index 000000000000..7d519156d91d --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-apq8026-samsung-milletwifi.dts @@ -0,0 +1,573 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Matti Lehtimäki + * Copyright (c) 2023, Bryant Mairs + */ + +/dts-v1/; + +#include +#include +#include "qcom-msm8226.dtsi" +#include "pm8226.dtsi" + +/delete-node/ &adsp_region; +/delete-node/ &smem_region; + +/ { + model = "Samsung Galaxy Tab 4 8.0 Wi-Fi"; + compatible = "samsung,milletwifi", "qcom,apq8026"; + chassis-type = "tablet"; + + aliases { + display0 = &framebuffer0; + mmc0 = &sdhc_1; /* SDC1 eMMC slot */ + mmc1 = &sdhc_2; /* SDC2 SD card slot */ + }; + + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + stdout-path = "display0"; + + framebuffer0: framebuffer@3200000 { + compatible = "simple-framebuffer"; + reg = <0x03200000 0x800000>; + width = <800>; + height = <1280>; + stride = <(800 * 3)>; + format = "r8g8b8"; + }; + }; + + gpio-hall-sensor { + compatible = "gpio-keys"; + + event-hall-sensor { + label = "Cover"; + gpios = <&tlmm 37 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + debounce-interval = <15>; + linux,can-disable; + wakeup-source; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + autorepeat; + + key-home { + label = "Home"; + gpios = <&tlmm 108 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&tlmm 107 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&tlmm 106 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + i2c-backlight { + compatible = "i2c-gpio"; + sda-gpios = <&tlmm 20 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + scl-gpios = <&tlmm 21 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + + pinctrl-0 = <&backlight_i2c_default_state>; + pinctrl-names = "default"; + + i2c-gpio,delay-us = <4>; + + #address-cells = <1>; + #size-cells = <0>; + + backlight@2c { + compatible = "ti,lp8556"; + reg = <0x2c>; + enable-supply = <®_backlight_vddio>; + + dev-ctrl = /bits/ 8 <0x80>; + init-brt = /bits/ 8 <0x3f>; + + /* + * Change transition duration: 200ms, Change + * transition strength: heavy, PWM hysteresis: + * 1-bit w/ 8-bit resolution + */ + rom-a3h { + rom-addr = /bits/ 8 <0xa3>; + rom-val = /bits/ 8 <0x5e>; + }; + + /* + * PWM phase configuration: 3-phase/3 drivers + * (0, 120deg, 240deg, -, -, -), + * PWM frequency: 9616Hz (10-bit) + */ + rom-a5h { + rom-addr = /bits/ 8 <0xa5>; + rom-val = /bits/ 8 <0x34>; + }; + + /* + * Enable LED drivers 2 & 3, Boot inductor + * current limit: 1.5A/2.6A + */ + rom-a7h { + rom-addr = /bits/ 8 <0xa7>; + rom-val = /bits/ 8 <0xfa>; + }; + }; + }; + + reg_backlight_vddio: regulator-backlight-vddio { + compatible = "regulator-fixed"; + regulator-name = "backlight_vddio"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 74 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&backlight_vddio_default_state>; + pinctrl-names = "default"; + }; + + reg_tsp_1p8v: regulator-tsp-1p8v { + compatible = "regulator-fixed"; + regulator-name = "tsp_1p8v"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + gpio = <&tlmm 114 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&tsp_en1_default_state>; + pinctrl-names = "default"; + }; + + reg_tsp_3p3v: regulator-tsp-3p3v { + compatible = "regulator-fixed"; + regulator-name = "tsp_3p3v"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&tsp_en_default_state>; + pinctrl-names = "default"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer@3200000 { + reg = <0x03200000 0x800000>; + no-map; + }; + + mpss_region: mpss@8400000 { + reg = <0x08400000 0x1f00000>; + no-map; + }; + + mba_region: mba@a300000 { + reg = <0x0a300000 0x100000>; + no-map; + }; + + reserved@cb00000 { + reg = <0x0cb00000 0x700000>; + no-map; + }; + + wcnss_region: wcnss@d200000 { + reg = <0x0d200000 0x700000>; + no-map; + }; + + adsp_region: adsp@d900000 { + reg = <0x0d900000 0x1800000>; + no-map; + }; + + venus@f100000 { + reg = <0x0f100000 0x500000>; + no-map; + }; + + smem_region: smem@fa00000 { + reg = <0x0fa00000 0x100000>; + no-map; + }; + + reserved@fb00000 { + reg = <0x0fb00000 0x260000>; + no-map; + }; + + rfsa@fd60000 { + reg = <0x0fd60000 0x20000>; + no-map; + }; + + rmtfs@fd80000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0fd80000 0x180000>; + no-map; + + qcom,client-id = <1>; + }; + }; +}; + +&blsp1_i2c2 { + status = "okay"; + + accelerometer@1d { + compatible = "st,lis2hh12"; + reg = <0x1d>; + + interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>; + + pinctrl-0 = <&accel_int_default_state>; + pinctrl-names = "default"; + + vdd-supply = <&pm8226_l19>; + vddio-supply = <&pm8226_lvs1>; + + mount-matrix = "0", "1", "0", + "-1", "0", "0", + "0", "0", "1"; + + st,drdy-int-pin = <1>; + }; +}; + +&blsp1_i2c3 { + status = "okay"; + + charger@6a { + compatible = "summit,smb358"; + reg = <0x6a>; + + interrupts-extended = <&tlmm 115 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 = <&charger_int_default_state>; + pinctrl-names = "default"; + + summit,enable-usb-charging; + summit,enable-charge-control = ; + summit,fast-voltage-threshold-microvolt = <3000000>; + summit,chip-temperature-threshold-celsius = <130>; + summit,usb-current-limit-microamp = <1500000>; + }; +}; + +&blsp1_i2c4 { + status = "okay"; + + muic: usb-switch@25 { + compatible = "siliconmitus,sm5502-muic"; + reg = <0x25>; + + interrupts-extended = <&tlmm 67 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 = <&muic_int_default_state>; + pinctrl-names = "default"; + }; +}; + +&blsp1_i2c5 { + status = "okay"; + + touchscreen@48 { + compatible = "melfas,mms252", "melfas,mms114"; + reg = <0x48>; + interrupts-extended = <&tlmm 17 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <800>; + touchscreen-size-y = <1280>; + avdd-supply = <®_tsp_3p3v>; + vdd-supply = <®_tsp_1p8v>; + linux,keycodes = ; + + pinctrl-0 = <&tsp_int_rst_default_state>; + pinctrl-names = "default"; + }; +}; + +&rpm_requests { + regulators { + compatible = "qcom,rpm-pm8226-regulators"; + + pm8226_s3: s3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_s5: s5 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + }; + + pm8226_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8226_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l3: l3 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1337500>; + regulator-always-on; + }; + + pm8226_l4: l4 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l5: l5 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + pm8226_l7: l7 { + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1850000>; + }; + + pm8226_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + pm8226_l9: l9 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l14: l14 { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <2750000>; + }; + + pm8226_l15: l15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + pm8226_l16: l16 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3350000>; + }; + + pm8226_l17: l17 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + regulator-system-load = <200000>; + regulator-allow-set-load; + regulator-always-on; + }; + + pm8226_l18: l18 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l19: l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3000000>; + }; + + pm8226_l20: l20 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + + pm8226_l21: l21 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l22: l22 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3000000>; + }; + + pm8226_l23: l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + pm8226_l24: l24 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1350000>; + }; + + pm8226_l25: l25 { + regulator-min-microvolt = <1775000>; + regulator-max-microvolt = <2125000>; + }; + + pm8226_l26: l26 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_l27: l27 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l28: l28 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_lvs1: lvs1 {}; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8226_l17>; + vqmmc-supply = <&pm8226_l6>; + + bus-width = <8>; + non-removable; + + status = "okay"; +}; + +&sdhc_2 { + vmmc-supply = <&pm8226_l18>; + vqmmc-supply = <&pm8226_l21>; + + bus-width = <4>; + cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&sdhc2_default_state>, <&sdc2_cd_default_state>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&tlmm { + accel_int_default_state: accel-int-default-state { + pins = "gpio54"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + backlight_i2c_default_state: backlight-i2c-default-state { + pins = "gpio20", "gpio21"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + backlight_vddio_default_state: backlight-vddio-default-state { + pins = "gpio74"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + charger_int_default_state: charger-int-default-state { + pins = "gpio115"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + muic_int_default_state: muic-int-default-state { + pins = "gpio67"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + sdc2_cd_default_state: sdc2-cd-default-state { + pins = "gpio38"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_en_default_state: tsp-en-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_en1_default_state: tsp-en1-default-state { + pins = "gpio114"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_int_rst_default_state: tsp-int-rst-default-state { + pins = "gpio17"; + function = "gpio"; + drive-strength = <10>; + bias-pull-up; + }; +}; + +&usb { + extcon = <&muic>, <&muic>; + status = "okay"; +}; + +&usb_hs_phy { + extcon = <&muic>; + v1p8-supply = <&pm8226_l10>; + v3p3-supply = <&pm8226_l20>; +}; -- cgit From e23dfb4ee30a120a947abb94a718ccc1eb5f87ff Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Tue, 20 Feb 2024 00:11:22 +0100 Subject: ARM: dts: qcom: msm8974-hammerhead: Hook up backlight Connect the panel with the backlight nodes so that the backlight can be turned off when the display is blanked. Signed-off-by: Luca Weiss Reviewed-by: Daniel Thompson Link: https://lore.kernel.org/r/20240220-lm3630a-fixups-v1-4-9ca62f7e4a33@z3ntu.xyz Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts index 4aaae8537a3f..8eaa5b162815 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -182,7 +182,7 @@ status = "okay"; clock-frequency = <355000>; - led-controller@38 { + backlight: led-controller@38 { compatible = "ti,lm3630a"; status = "okay"; reg = <0x38>; @@ -272,6 +272,8 @@ reg = <0>; compatible = "lg,acx467akm-7"; + backlight = <&backlight>; + pinctrl-names = "default"; pinctrl-0 = <&panel_pin>; -- cgit From b4f6c63bf34d8da1b769483bb1f4a603c53896ce Mon Sep 17 00:00:00 2001 From: Adam Honse Date: Thu, 14 Mar 2024 20:00:15 +0100 Subject: ARM: dts: qcom: msm8974: Add Samsung Galaxy Note 3 Add the devicetree for this "phablet" using the Snapdragon 800 SoC. Signed-off-by: Adam Honse [luca@z3ntu.xyz: clean up, prepare for upstream] Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240314-samsung-hlte-v2-2-84094b41c033@z3ntu.xyz Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/qcom-msm8974-samsung-hlte.dts | 401 +++++++++++++++++++++ 2 files changed, 402 insertions(+) create mode 100644 arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index 1149a310ad43..e6114a95428b 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8960-cdp.dtb \ qcom-msm8960-samsung-expressatt.dtb \ qcom-msm8974-lge-nexus5-hammerhead.dtb \ + qcom-msm8974-samsung-hlte.dtb \ qcom-msm8974-sony-xperia-rhine-amami.dtb \ qcom-msm8974-sony-xperia-rhine-honami.dtb \ qcom-msm8974pro-fairphone-fp2.dtb \ diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts new file mode 100644 index 000000000000..903bb4d12513 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts @@ -0,0 +1,401 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-msm8974.dtsi" +#include "pm8841.dtsi" +#include "pm8941.dtsi" +#include +#include +#include + +/ { + model = "Samsung Galaxy Note 3"; + compatible = "samsung,hlte", "qcom,msm8974"; + chassis-type = "handset"; + + aliases { + mmc0 = &sdhc_1; /* SDC1 eMMC slot */ + mmc1 = &sdhc_3; /* SDC3 SD card slot */ + serial0 = &blsp1_uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&gpio_keys_pin_a>; + pinctrl-names = "default"; + + key-home { + label = "Home Key"; + gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; + linux,code = ; + wakeup-source; + debounce-interval = <15>; + }; + + key-volume-down { + label = "Volume Down"; + gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + + key-volume-up { + label = "Volume Up"; + gpios = <&pm8941_gpios 5 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + touch_ldo: regulator-touch { + compatible = "regulator-fixed"; + regulator-name = "touch-ldo"; + + gpio = <&pm8941_gpios 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + + pinctrl-0 = <&touch_ldo_pin>; + pinctrl-names = "default"; + }; +}; + +&blsp1_i2c2 { + status = "okay"; + + touchscreen@20 { + compatible = "syna,rmi4-i2c"; + reg = <0x20>; + + interrupt-parent = <&pm8941_gpios>; + interrupts = <30 IRQ_TYPE_EDGE_FALLING>; + + vdd-supply = <&pm8941_l10>; + vio-supply = <&touch_ldo>; + + pinctrl-0 = <&touch_pin>; + pinctrl-names = "default"; + + syna,startup-delay-ms = <100>; + + #address-cells = <1>; + #size-cells = <0>; + + rmi4-f01@1 { + reg = <0x1>; + syna,nosleep-mode = <1>; + }; + + rmi4-f12@12 { + reg = <0x12>; + syna,sensor-type = <1>; + }; + }; +}; + +&blsp2_i2c6 { + status = "okay"; + + fuelgauge@36 { + compatible = "maxim,max17048"; + reg = <0x36>; + + maxim,double-soc; + maxim,rcomp = /bits/ 8 <0x56>; + + interrupt-parent = <&pm8941_gpios>; + interrupts = <26 IRQ_TYPE_EDGE_FALLING>; + + pinctrl-0 = <&fuelgauge_pin>; + pinctrl-names = "default"; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + +&pm8941_gpios { + gpio_keys_pin_a: gpio-keys-active-state { + pins = "gpio2", "gpio3", "gpio5"; + function = "normal"; + bias-pull-up; + power-source = ; + }; + + fuelgauge_pin: fuelgauge-int-state { + pins = "gpio26"; + function = "normal"; + bias-disable; + input-enable; + power-source = ; + }; + + touch_pin: touchscreen-int-state { + pins = "gpio30"; + function = "normal"; + bias-disable; + input-enable; + power-source = ; + }; + + touch_ldo_pin: touchscreen-ldo-state { + pins = "gpio9"; + function = "normal"; + output-high; + power-source = ; + qcom,drive-strength = ; + }; +}; + +&remoteproc_adsp { + cx-supply = <&pm8841_s2>; + status = "okay"; +}; + +&remoteproc_mss { + cx-supply = <&pm8841_s2>; + mss-supply = <&pm8841_s3>; + mx-supply = <&pm8841_s1>; + pll-supply = <&pm8941_l12>; + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm8841-regulators"; + + pm8841_s1: s1 { + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s2: s2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s3: s3 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s4: s4 { + regulator-min-microvolt = <815000>; + regulator-max-microvolt = <900000>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm8941-regulators"; + + pm8941_s1: s1 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + }; + + pm8941_s2: s2 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + }; + + pm8941_s3: s3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l1: l1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8941_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8941_l3: l3 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1225000>; + }; + + pm8941_l4: l4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8941_l5: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l7: l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l9: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8941_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l11: l11 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1350000>; + }; + + pm8941_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + pm8941_l13: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + pm8941_l14: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l15: l15 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8941_l16: l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + pm8941_l17: l17 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3000000>; + }; + + pm8941_l18: l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8941_l19: l19 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3350000>; + }; + + pm8941_l20: l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-system-load = <200000>; + regulator-allow-set-load; + }; + + pm8941_l21: l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-system-load = <200000>; + regulator-allow-set-load; + }; + + pm8941_l22: l22 { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3000000>; + }; + + pm8941_l23: l23 { + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <3300000>; + }; + + pm8941_l24: l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8941_l20>; + vqmmc-supply = <&pm8941_s3>; + + pinctrl-0 = <&sdhc1_pin_a>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&sdhc_3 { + max-frequency = <100000000>; + + vmmc-supply = <&pm8941_l21>; + vqmmc-supply = <&pm8941_l21>; + + pinctrl-0 = <&sdhc3_pin_a>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&tlmm { + sdhc1_pin_a: sdhc1-pin-active-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <4>; + bias-disable; + }; + + cmd-data-pins { + pins = "sdc1_cmd", "sdc1_data"; + drive-strength = <4>; + bias-pull-up; + }; + }; + + sdhc3_pin_a: sdhc3-pin-active-state { + pins = "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; + function = "sdc3"; + drive-strength = <8>; + bias-disable; + }; +}; + +&usb { + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + + hnp-disable; + srp-disable; + adp-disable; + + status = "okay"; +}; + +&usb_hs1_phy { + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + + qcom,init-seq = /bits/ 8 <0x1 0x64>; + + status = "okay"; +}; -- cgit From f50e5ddc3ff66434d011b031af3cdbac3d80bd82 Mon Sep 17 00:00:00 2001 From: Clément Léger Date: Mon, 13 May 2024 09:25:18 +0200 Subject: ARM: dts: renesas: r9a06g032: Describe GMAC1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The r9a06g032 SoC of the RZ/N1 family features two GMAC devices named GMAC1/2, that are based on Synopsys cores. GMAC1 is connected to a RGMII/RMII converter that is already described in this device tree. Signed-off-by: Clément Léger [rgantois: commit log] Reviewed-by: Geert Uytterhoeven Signed-off-by: Romain Gantois Link: https://lore.kernel.org/r/20240513-rzn1-gmac1-v7-7-6acf58b5440d@bootlin.com Signed-off-by: Geert Uytterhoeven --- arch/arm/boot/dts/renesas/r9a06g032.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi index 45f60eeeaaa1..466077a8f0ac 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -316,6 +316,24 @@ data-width = <8>; }; + gmac1: ethernet@44000000 { + compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac"; + reg = <0x44000000 0x2000>; + interrupts = , + , + ; + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; + clocks = <&sysctrl R9A06G032_HCLK_GMAC0>; + clock-names = "stmmaceth"; + power-domains = <&sysctrl>; + snps,multicast-filter-bins = <256>; + snps,perfect-filter-entries = <128>; + tx-fifo-depth = <2048>; + rx-fifo-depth = <4096>; + pcs-handle = <&mii_conv1>; + status = "disabled"; + }; + gmac2: ethernet@44002000 { compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac"; reg = <0x44002000 0x2000>; -- cgit From 92b9ce5b11d7ba281f5bf0029185d5c891b29344 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Tue, 9 Apr 2024 20:36:37 +0200 Subject: ARM: dts: qcom: msm8974-hammerhead: Update gpio hog node name Follow the gpio-hog bindings and use otg-hog as node name. Signed-off-by: Luca Weiss Reviewed-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240409-qcom-pmic-gpio-hog-v2-2-5ff812d2baed@z3ntu.xyz Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts index 8eaa5b162815..fdb6e22986cf 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts @@ -330,7 +330,7 @@ power-source = ; }; - otg { + otg-hog { gpio-hog; gpios = <35 GPIO_ACTIVE_HIGH>; output-high; -- cgit From c133cfc12cd717b72ce534477415446e1c33de47 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Mon, 8 Apr 2024 21:32:04 +0200 Subject: ARM: dts: qcom: msm8974: Use proper compatible for APCS syscon Use the apcs-kpss-global compatible for the APCS global mailbox block found on this SoC. This also resolves a dt-binding checker warning: arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dtb: syscon@f9011000: compatible: 'anyOf' conditional failed, one must be fixed: ['syscon'] is too short 'syscon' is not one of ['allwinner,sun8i-a83t-system-controller', 'allwinner,sun8i-h3-system-controller', 'allwinner,sun8i-v3s-system-controller', 'allwinner,sun50i-a64-system-controller', 'amd,pensando-elba-syscon', 'brcm,cru-clkset', 'freecom,fsg-cs2-system-controller', 'fsl,imx93-aonmix-ns-syscfg', 'fsl,imx93-wakeupmix-syscfg', 'hisilicon,dsa-subctrl', 'hisilicon,hi6220-sramctrl', 'hisilicon,pcie-sas-subctrl', 'hisilicon,peri-subctrl', 'hpe,gxp-sysreg', 'intel,lgm-syscon', 'loongson,ls1b-syscon', 'loongson,ls1c-syscon', 'marvell,armada-3700-usb2-host-misc', 'mediatek,mt8135-pctl-a-syscfg', 'mediatek,mt8135-pctl-b-syscfg', 'mediatek,mt8365-syscfg', 'microchip,lan966x-cpu-syscon', 'microchip,sparx5-cpu-syscon', 'mstar,msc313-pmsleep', 'nuvoton,ma35d1-sys', 'nuvoton,wpcm450-shm', 'rockchip,px30-qos', 'rockchip,rk3036-qos', 'rockchip,rk3066-qos', 'rockchip,rk3128-qos', 'rockchip,rk3228-qos', 'rockchip,rk3288-qos', 'rockchip,rk3368-qos', 'rockchip,rk3399-qos', 'rockchip,rk356 8-qos', 'rockchip,rk3588-qos', 'rockchip,rv1126-qos', 'starfive,jh7100-sysmain', 'ti,am62-usb-phy-ctrl', 'ti,am654-dss-oldi-io-ctrl', 'ti,am654-serdes-ctrl', 'ti,j784s4-pcie-ctrl'] from schema $id: http://devicetree.org/schemas/mfd/syscon.yaml# Signed-off-by: Luca Weiss Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240408-msm8974-apcs-v1-2-90cb7368836e@z3ntu.xyz Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index 5651bb31bd54..944098b5ad2b 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -343,9 +343,11 @@ <0xf9002000 0x1000>; }; - apcs: syscon@f9011000 { - compatible = "syscon"; + apcs: mailbox@f9011000 { + compatible = "qcom,msm8974-apcs-kpss-global", + "qcom,msm8994-apcs-kpss-global", "syscon"; reg = <0xf9011000 0x1000>; + #mbox-cells = <1>; }; saw_l2: power-manager@f9012000 { -- cgit From 79abbcb13a9818bbc1701a1d2475a265a8275296 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:02 +0300 Subject: ARM: dts: qcom: apq8064: drop #power-domain-cells property of GCC On APQ8064 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-4-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index 11e60b74c3c9..178a3b424670 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -684,7 +684,6 @@ compatible = "qcom,gcc-apq8064", "syscon"; reg = <0x00900000 0x4000>; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; clocks = <&cxo_board>, <&pxo_board>, -- cgit From 69eca4bd4c110eb748f68dc511b4dddec9fcd777 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:03 +0300 Subject: ARM: dts: qcom: msm8660: drop #power-domain-cells property of GCC On MSM8660 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-5-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8660.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi index 455ba4bf1bf4..a66c474cd1aa 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8660.dtsi @@ -113,7 +113,6 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-msm8660"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; clocks = <&pxo_board>, <&cxo_board>; -- cgit From 660f6194693ede9c61cd9f01c36a7e56eff13dfd Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:04 +0300 Subject: ARM: dts: qcom: msm8960: drop #power-domain-cells property of GCC On MSM8960 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-6-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi index 922f9e49468a..a9c6d2dbb460 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -129,7 +129,6 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-msm8960"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; clocks = <&cxo_board>, -- cgit From c514f760b504fcb5bb34ea8daeb26f13c3561d95 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:05 +0300 Subject: ARM: dts: qcom: ipq4019: drop #power-domain-cells property of GCC On IPQ4019 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-7-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi index 0fb65f2bbcdf..56415ab34083 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -187,7 +187,6 @@ gcc: clock-controller@1800000 { compatible = "qcom,gcc-ipq4019"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x1800000 0x60000>; clocks = <&xo>, <&sleep_clk>; -- cgit From c39ce4b0a556408128fe11c25d22b7ba1d4a1c94 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:06 +0300 Subject: ARM: dts: qcom: ipq8064: drop #power-domain-cells property of GCC On IPQ8064 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-8-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi index f128510d8445..12cf85441a0b 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -519,7 +519,6 @@ reg = <0x00900000 0x4000>; #clock-cells = <1>; #reset-cells = <1>; - #power-domain-cells = <1>; tsens: thermal-sensor { compatible = "qcom,ipq8064-tsens"; -- cgit From 03df403dd7f495ce5e2324e4e6b4065b330acdc7 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Wed, 29 May 2024 17:47:07 +0300 Subject: ARM: dts: qcom: mdm9615: drop #power-domain-cells property of GCC On MDM9615 the Global Clock Controller (GCC) doesn't provide power domains. Drop the #power-domain-cells property from the controller device node. Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240529-qcom-gdscs-v2-9-69c63d0ae1e7@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi index 34c60994d026..573feb3218c3 100644 --- a/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-mdm9615.dtsi @@ -102,7 +102,6 @@ gcc: clock-controller@900000 { compatible = "qcom,gcc-mdm9615"; #clock-cells = <1>; - #power-domain-cells = <1>; #reset-cells = <1>; reg = <0x900000 0x4000>; clocks = <&cxo_board>, -- cgit From bba474656dd85b13e4c5d5bdb73ca08d9136df21 Mon Sep 17 00:00:00 2001 From: Pavel Löbl Date: Wed, 20 Mar 2024 07:10:19 +0100 Subject: ARM: dts: sunxi: remove duplicated entries in makefile MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit During introduction of DTS vendor subdirectories in 724ba6751532, sun8i section of the makefile got duplicated. Clean that up. Fixes: 724ba6751532 ("ARM: dts: Move .dts files to vendor sub-directories") Signed-off-by: Pavel Löbl Reviewed-by: Jernej Skrabec Reviewed-by: Andre Przywara Link: https://lore.kernel.org/r/20240320061027.4078852-1-pavel@loebl.cz Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/Makefile | 62 ------------------------------------ 1 file changed, 62 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile index 4247f19b1adc..cd0d044882cf 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -261,68 +261,6 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-v3s-licheepi-zero.dtb \ sun8i-v3s-licheepi-zero-dock.dtb \ sun8i-v40-bananapi-m2-berry.dtb -dtb-$(CONFIG_MACH_SUN8I) += \ - sun8i-a23-evb.dtb \ - sun8i-a23-gt90h-v4.dtb \ - sun8i-a23-inet86dz.dtb \ - sun8i-a23-ippo-q8h-v5.dtb \ - sun8i-a23-ippo-q8h-v1.2.dtb \ - sun8i-a23-polaroid-mid2407pxe03.dtb \ - sun8i-a23-polaroid-mid2809pxe04.dtb \ - sun8i-a23-q8-tablet.dtb \ - sun8i-a33-et-q8-v1.6.dtb \ - sun8i-a33-ga10h-v1.1.dtb \ - sun8i-a33-inet-d978-rev2.dtb \ - sun8i-a33-ippo-q8h-v1.2.dtb \ - sun8i-a33-olinuxino.dtb \ - sun8i-a33-q8-tablet.dtb \ - sun8i-a33-sinlinx-sina33.dtb \ - sun8i-a83t-allwinner-h8homlet-v2.dtb \ - sun8i-a83t-bananapi-m3.dtb \ - sun8i-a83t-cubietruck-plus.dtb \ - sun8i-a83t-tbs-a711.dtb \ - sun8i-h2-plus-bananapi-m2-zero.dtb \ - sun8i-h2-plus-libretech-all-h3-cc.dtb \ - sun8i-h2-plus-orangepi-r1.dtb \ - sun8i-h2-plus-orangepi-zero.dtb \ - sun8i-h3-bananapi-m2-plus.dtb \ - sun8i-h3-bananapi-m2-plus-v1.2.dtb \ - sun8i-h3-beelink-x2.dtb \ - sun8i-h3-libretech-all-h3-cc.dtb \ - sun8i-h3-mapleboard-mp130.dtb \ - sun8i-h3-nanopi-duo2.dtb \ - sun8i-h3-nanopi-m1.dtb\ - \ - sun8i-h3-nanopi-m1-plus.dtb \ - sun8i-h3-nanopi-neo.dtb \ - sun8i-h3-nanopi-neo-air.dtb \ - sun8i-h3-nanopi-r1.dtb \ - sun8i-h3-orangepi-2.dtb \ - sun8i-h3-orangepi-lite.dtb \ - sun8i-h3-orangepi-one.dtb \ - sun8i-h3-orangepi-pc.dtb \ - sun8i-h3-orangepi-pc-plus.dtb \ - sun8i-h3-orangepi-plus.dtb \ - sun8i-h3-orangepi-plus2e.dtb \ - sun8i-h3-orangepi-zero-plus2.dtb \ - sun8i-h3-rervision-dvk.dtb \ - sun8i-h3-zeropi.dtb \ - sun8i-h3-emlid-neutis-n5h3-devboard.dtb \ - sun8i-r16-bananapi-m2m.dtb \ - sun8i-r16-nintendo-nes-classic.dtb \ - sun8i-r16-nintendo-super-nes-classic.dtb \ - sun8i-r16-parrot.dtb \ - sun8i-r40-bananapi-m2-ultra.dtb \ - sun8i-r40-oka40i-c.dtb \ - sun8i-s3-elimo-initium.dtb \ - sun8i-s3-lichee-zero-plus.dtb \ - sun8i-s3-pinecube.dtb \ - sun8i-t113s-mangopi-mq-r-t113.dtb \ - sun8i-t3-cqa3t-bv3.dtb \ - sun8i-v3-sl631-imx179.dtb \ - sun8i-v3s-licheepi-zero.dtb \ - sun8i-v3s-licheepi-zero-dock.dtb \ - sun8i-v40-bananapi-m2-berry.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb \ sun9i-a80-cubieboard4.dtb -- cgit From d904c09b73fe9b0503e94f1c013d962e87a08123 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Wed, 24 Apr 2024 18:23:55 +0200 Subject: ARM: dts: qcom: msm8974: Use mboxes properties for APCS Instead of passing the syscon to the various nodes, use the mbox interface using the mboxes property. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240424-apcs-mboxes-v1-2-6556c47cb501@z3ntu.xyz Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index 944098b5ad2b..1bea3cef4ba7 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -132,7 +132,7 @@ smd-edge { interrupts = ; - qcom,ipc = <&apcs 8 0>; + mboxes = <&apcs 0>; qcom,smd-edge = <15>; rpm_requests: rpm-requests { @@ -219,7 +219,7 @@ interrupt-parent = <&intc>; interrupts = ; - qcom,ipc = <&apcs 8 10>; + mboxes = <&apcs 10>; qcom,local-pid = <0>; qcom,remote-pid = <2>; @@ -244,7 +244,7 @@ interrupt-parent = <&intc>; interrupts = ; - qcom,ipc = <&apcs 8 14>; + mboxes = <&apcs 14>; qcom,local-pid = <0>; qcom,remote-pid = <1>; @@ -269,7 +269,7 @@ interrupt-parent = <&intc>; interrupts = ; - qcom,ipc = <&apcs 8 18>; + mboxes = <&apcs 18>; qcom,local-pid = <0>; qcom,remote-pid = <4>; @@ -759,7 +759,7 @@ smd-edge { interrupts = ; - qcom,ipc = <&apcs 8 17>; + mboxes = <&apcs 17>; qcom,smd-edge = <6>; wcnss { @@ -1578,7 +1578,7 @@ smd-edge { interrupts = ; - qcom,ipc = <&apcs 8 12>; + mboxes = <&apcs 12>; qcom,smd-edge = <0>; label = "modem"; @@ -2215,7 +2215,7 @@ smd-edge { interrupts = ; - qcom,ipc = <&apcs 8 8>; + mboxes = <&apcs 8>; qcom,smd-edge = <1>; label = "lpass"; }; -- cgit From 0948424cd5e77c1f16ec64837dc1d51f71db7dd5 Mon Sep 17 00:00:00 2001 From: Alain Volmat Date: Fri, 26 Apr 2024 17:05:24 +0200 Subject: ARM: dts: stm32: add DCMIPP pinctrl on STM32MP13x SoC family Adds DCMIPP pinctrl support and assigns dedicated GPIO pins. Signed-off-by: Alain Volmat Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 33 +++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index 32c5d8a1e06a..b423d182aefd 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -13,6 +13,39 @@ }; }; + dcmipp_pins_a: dcmi-0 { + pins1 { + pinmux = ,/* DCMI_HSYNC */ + ,/* DCMI_VSYNC */ + ,/* DCMI_PIXCLK */ + ,/* DCMI_D0 */ + ,/* DCMI_D1 */ + ,/* DCMI_D2 */ + ,/* DCMI_D3 */ + ,/* DCMI_D4 */ + ,/* DCMI_D5 */ + ,/* DCMI_D6 */ + ;/* DCMI_D7 */ + bias-disable; + }; + }; + + dcmipp_sleep_pins_a: dcmi-sleep-0 { + pins1 { + pinmux = ,/* DCMI_HSYNC */ + ,/* DCMI_VSYNC */ + ,/* DCMI_PIXCLK */ + ,/* DCMI_D0 */ + ,/* DCMI_D1 */ + ,/* DCMI_D2 */ + ,/* DCMI_D3 */ + ,/* DCMI_D4 */ + ,/* DCMI_D5 */ + ,/* DCMI_D6 */ + ;/* DCMI_D7 */ + }; + }; + i2c1_pins_a: i2c1-0 { pins { pinmux = , /* I2C1_SCL */ -- cgit From 26c7b370eba6127431c82d1cbf5081f6b5674db6 Mon Sep 17 00:00:00 2001 From: Alain Volmat Date: Fri, 26 Apr 2024 17:05:25 +0200 Subject: ARM: dts: stm32: enable camera support on stm32mp135f-dk board On STM32MP135F-DK board the camera support is made of the CSI based GC2145 sensor, connected to the ST-MIPID02 CSI to parallel bridge, connected to the DCMIPP parallel input. Signed-off-by: Alain Volmat Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 87 +++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index 567e53ad285f..e43bb9b74b87 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -29,6 +29,20 @@ stdout-path = "serial0:115200n8"; }; + clocks { + clk_ext_camera: clk-ext-camera { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + + clk_mco1: clk-mco1 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + }; + memory@c0000000 { device_type = "memory"; reg = <0xc0000000 0x20000000>; @@ -141,6 +155,23 @@ status = "okay"; }; +&dcmipp { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dcmipp_pins_a>; + pinctrl-1 = <&dcmipp_sleep_pins_a>; + status = "okay"; + + port { + dcmipp_0: endpoint { + remote-endpoint = <&mipid02_2>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <0>; + }; + }; +}; + &i2c1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c1_pins_a>; @@ -201,6 +232,62 @@ /* spare dmas for other usage */ /delete-property/dmas; /delete-property/dma-names; + + stmipi: csi2rx@14 { + compatible = "st,st-mipid02"; + reg = <0x14>; + clocks = <&clk_mco1>; + clock-names = "xclk"; + VDDE-supply = <&scmi_v1v8_periph>; + VDDIN-supply = <&scmi_v1v8_periph>; + reset-gpios = <&mcp23017 2 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + + mipid02_0: endpoint { + data-lanes = <1 2>; + lane-polarities = <0 0 0>; + remote-endpoint = <&gc2145_ep>; + }; + }; + port@2 { + reg = <2>; + + mipid02_2: endpoint { + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + pclk-sample = <0>; + remote-endpoint = <&dcmipp_0>; + }; + }; + }; + }; + + gc2145: camera@3c { + compatible = "galaxycore,gc2145"; + reg = <0x3c>; + clocks = <&clk_ext_camera>; + iovdd-supply = <&scmi_v3v3_sw>; + avdd-supply = <&scmi_v3v3_sw>; + dvdd-supply = <&scmi_v3v3_sw>; + powerdown-gpios = <&mcp23017 3 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; + reset-gpios = <&mcp23017 4 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>; + status = "okay"; + + port { + gc2145_ep: endpoint { + remote-endpoint = <&mipid02_0>; + data-lanes = <1 2>; + link-frequencies = /bits/ 64 <120000000 192000000 240000000>; + }; + }; + }; }; &iwdg2 { -- cgit From 3d058df954ebdb592fd421e0005f6d0c25da21ed Mon Sep 17 00:00:00 2001 From: Yannick Fertre Date: Mon, 6 May 2024 16:49:45 +0200 Subject: ARM: dts: stm32: add goodix touchscreen on stm32mp135f-dk Touchscreen reset needs to be configured via the pinctrl not the driver (a pull-down resistor has been soldered onto the reset line which forces the touchscreen to reset state). Interrupt line must have a pull-down resistor in order to freeze the i2c address at 0x5D. Signed-off-by: Yannick Fertre Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 22 ++++++++++++++++++++++ arch/arm/boot/dts/st/stm32mp135f-dk.dts | 14 ++++++++++++++ 2 files changed, 36 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index b423d182aefd..66efef93251f 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -46,6 +46,28 @@ }; }; + goodix_pins_a: goodix-0 { + /* + * touchscreen reset needs to be configured + * via the pinctrl not the driver (a pull-down resistor + * has been soldered onto the reset line which forces + * the touchscreen to reset state). + */ + pins1 { + pinmux = ; + output-high; + bias-pull-up; + }; + /* + * Interrupt line must have a pull-down resistor + * in order to freeze the i2c address at 0x5D + */ + pins2 { + pinmux = ; + bias-pull-down; + }; + }; + i2c1_pins_a: i2c1-0 { pins { pinmux = , /* I2C1_SCL */ diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index e43bb9b74b87..970de441fbaa 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -288,6 +288,20 @@ }; }; }; + + goodix: goodix-ts@5d { + compatible = "goodix,gt911"; + reg = <0x5d>; + pinctrl-names = "default"; + pinctrl-0 = <&goodix_pins_a>; + interrupt-parent = <&gpiof>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + AVDD28-supply = <&scmi_v3v3_sw>; + VDDIO-supply = <&scmi_v3v3_sw>; + touchscreen-size-x = <480>; + touchscreen-size-y = <272>; + status = "okay" ; + }; }; &iwdg2 { -- cgit From 4306c047415a227bc72f0e7ba9bde1ccdac10435 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 13 May 2024 23:58:15 +0200 Subject: ARM: dts: stm32: Add arm,no-tick-in-suspend to STM32MP15xx STGEN timer STM32MP15xx RM0436 Rev 6 section 46.3 System timer generator (STGEN) states " Arm recommends that the system counter is in an always-on power domain. This is not supported in the current implementation, therefore STGEN should be saved and restored before Standby mode entry, and restored at Standby exit by secure software. ... " Instead of piling up workarounds in the firmware which is difficult to update, add "arm,no-tick-in-suspend" DT property into the timer node to indicate the timer is stopped in suspend, and let the kernel fix the timer up. Fixes: 8471a20253eb ("ARM: dts: stm32: add stm32mp157c initial support") Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp151.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index 90c5c72c87ab..4f878ec102c1 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -50,6 +50,7 @@ , ; interrupt-parent = <&intc>; + arm,no-tick-in-suspend; }; clocks { -- cgit From 7010a17fb12a0febd6002d5bae8c4bf14039ae8c Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 22 May 2024 10:23:29 +0200 Subject: ARM: dts: stm32: osd32: move usb phy power to common According to the OSD32MP1 Power System overview[1] usb phy power is hard-wired internally in the SIP module to ldo4. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Sean Nyekjaer Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts | 8 -------- arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi | 8 -------- arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi | 8 ++++++++ 3 files changed, 8 insertions(+), 16 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts index 527c33be66cc..854dfecd801f 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts @@ -211,11 +211,3 @@ &usbphyc { status = "okay"; }; - -&usbphyc_port0 { - phy-supply = <&vdd_usb>; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; -}; diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi index cfaf8adde319..aa28043c30fb 100644 --- a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi @@ -590,14 +590,6 @@ baseboard_eeprom: &sip_eeprom { status = "okay"; }; -&usbphyc_port0 { - phy-supply = <&vdd_usb>; -}; - -&usbphyc_port1 { - phy-supply = <&vdd_usb>; -}; - &vrefbuf { regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi index aeb71c41a734..ae01e7a5339e 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi @@ -214,3 +214,11 @@ &rng1 { status = "okay"; }; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; +}; -- cgit From f37c8d3ba5262dc4aee83c58958817c8360f1455 Mon Sep 17 00:00:00 2001 From: Sean Nyekjaer Date: Wed, 22 May 2024 10:23:30 +0200 Subject: ARM: dts: stm32: osd32: move pwr_regulators to common According to the OSD32MP1 Power System overview[1] pwr_regulators; vdd-supply and vdd_3v3_usbfs-supply are hard-wired internally in the SIP module to vdd and ldo4. [1]: https://octavosystems.com/app_notes/osd32mp1-power-system-overview/#connections Signed-off-by: Sean Nyekjaer Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts | 5 ----- arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi | 5 ----- arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi | 5 +++++ 3 files changed, 5 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts index 854dfecd801f..36e6055b5665 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts @@ -147,11 +147,6 @@ status = "okay"; }; -&pwr_regulators { - vdd-supply = <&vdd>; - vdd_3v3_usbfs-supply = <&vdd_usb>; -}; - &rtc { status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi index aa28043c30fb..c87fd96cbd91 100644 --- a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi @@ -379,11 +379,6 @@ baseboard_eeprom: &sip_eeprom { }; }; -&pwr_regulators { - vdd-supply = <&vdd>; - vdd_3v3_usbfs-supply = <&vdd_usb>; -}; - &rtc { status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi index ae01e7a5339e..2022a1fa31ca 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-osd32.dtsi @@ -215,6 +215,11 @@ status = "okay"; }; +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; +}; + &usbphyc_port0 { phy-supply = <&vdd_usb>; }; -- cgit From 0e8a41e511c98f5f5796c0dca8ff983d1c967b93 Mon Sep 17 00:00:00 2001 From: Alexandre Messier Date: Mon, 3 Jun 2024 02:28:57 -0400 Subject: ARM: dts: qcom: Add initial support for HTC One (M8) Add initial device tree for the HTC One (M8) smartphone. Initial support includes: - eMMC - Power button - USB - Vibrator - Volume buttons (GPIO) - Wi-Fi Signed-off-by: Alexandre Messier Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240603-m8-support-v1-2-c7b6a1941ed2@me.ssier.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/Makefile | 1 + arch/arm/boot/dts/qcom/qcom-msm8974pro-htc-m8.dts | 353 ++++++++++++++++++++++ 2 files changed, 354 insertions(+) create mode 100644 arch/arm/boot/dts/qcom/qcom-msm8974pro-htc-m8.dts (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index e6114a95428b..e9a8bc74195e 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -46,6 +46,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974-sony-xperia-rhine-amami.dtb \ qcom-msm8974-sony-xperia-rhine-honami.dtb \ qcom-msm8974pro-fairphone-fp2.dtb \ + qcom-msm8974pro-htc-m8.dtb \ qcom-msm8974pro-oneplus-bacon.dtb \ qcom-msm8974pro-samsung-klte.dtb \ qcom-msm8974pro-samsung-kltechn.dtb \ diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-htc-m8.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-htc-m8.dts new file mode 100644 index 000000000000..b896cc1ad6f7 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-htc-m8.dts @@ -0,0 +1,353 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include "qcom-msm8974pro.dtsi" +#include "pm8841.dtsi" +#include "pm8941.dtsi" +#include + +/ { + model = "HTC One (M8)"; + compatible = "htc,m8", "qcom,msm8974pro", "qcom,msm8974"; + chassis-type = "handset"; + + aliases { + mmc0 = &sdhc_1; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&gpio_keys_default>; + pinctrl-names = "default"; + + key-volume-down { + label = "volume_down"; + gpios = <&tlmm 27 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <20>; + wakeup-source; + }; + + key-volume-up { + label = "volume_up"; + gpios = <&tlmm 28 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <20>; + wakeup-source; + }; + }; + + vreg_boost: vreg-boost { + compatible = "regulator-fixed"; + + regulator-name = "vreg-boost"; + regulator-min-microvolt = <3150000>; + regulator-max-microvolt = <3150000>; + + regulator-always-on; + regulator-boot-on; + + gpio = <&pm8941_gpios 21 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&boost_bypass_n_pin>; + pinctrl-names = "default"; + }; + + vreg_vph_pwr: vreg-vph-pwr { + compatible = "regulator-fixed"; + regulator-name = "vph-pwr"; + + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + + regulator-always-on; + }; +}; + +&pm8941_vib { + status = "okay"; +}; + +&pronto { + vddmx-supply = <&pm8841_s1>; + vddcx-supply = <&pm8841_s2>; + vddpx-supply = <&pm8941_s3>; + + pinctrl-0 = <&wcnss_pin_a>; + pinctrl-names = "default"; + + status = "okay"; + + iris { + vddxo-supply = <&pm8941_l6>; + vddrfa-supply = <&pm8941_l11>; + vddpa-supply = <&pm8941_l19>; + vdddig-supply = <&pm8941_s3>; + }; + + smd-edge { + qcom,remote-pid = <4>; + label = "pronto"; + + wcnss { + status = "okay"; + }; + }; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm8841-regulators"; + + pm8841_s1: s1 { + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s2: s2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s3: s3 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + pm8841_s4: s4 { + regulator-min-microvolt = <815000>; + regulator-max-microvolt = <900000>; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm8941-regulators"; + + vdd_l1_l3-supply = <&pm8941_s1>; + vdd_l2_lvs1_2_3-supply = <&pm8941_s3>; + vdd_l4_l11-supply = <&pm8941_s1>; + vdd_l5_l7-supply = <&pm8941_s2>; + vdd_l6_l12_l14_l15-supply = <&pm8941_s2>; + vdd_l8_l16_l18_l19-supply = <&vreg_vph_pwr>; + vdd_l9_l10_l17_l22-supply = <&vreg_boost>; + vdd_l13_l20_l23_l24-supply = <&vreg_boost>; + vdd_l21-supply = <&vreg_boost>; + + pm8941_s1: s1 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_s2: s2 { + regulator-min-microvolt = <2150000>; + regulator-max-microvolt = <2150000>; + regulator-boot-on; + }; + + pm8941_s3: s3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8941_l3: l3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8941_l4: l4 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8941_l5: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + pm8941_l7: l7 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + pm8941_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l9: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8941_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8941_l11: l11 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1350000>; + }; + + pm8941_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + pm8941_l13: l13 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-boot-on; + }; + + pm8941_l14: l14 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8941_l15: l15 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8941_l16: l16 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2700000>; + }; + + pm8941_l17: l17 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8941_l18: l18 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + }; + + pm8941_l19: l19 { + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <3350000>; + }; + + pm8941_l20: l20 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-system-load = <200000>; + regulator-allow-set-load; + regulator-boot-on; + }; + + pm8941_l21: l21 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + regulator-boot-on; + }; + + pm8941_l22: l22 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + pm8941_l23: l23 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + pm8941_l24: l24 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + regulator-boot-on; + }; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8941_l20>; + vqmmc-supply = <&pm8941_s3>; + + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; + pinctrl-names = "default", "sleep"; + + status = "okay"; +}; + +&smbb { + status = "okay"; +}; + +&tlmm { + gpio_keys_default: gpio-keys-default-state { + pins = "gpio27", "gpio28"; + function = "gpio"; + bias-pull-up; + }; + + sdc1_on: sdc1-on-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <10>; + bias-disable; + }; + + cmd-data-pins { + pins = "sdc1_cmd", "sdc1_data"; + drive-strength = <10>; + bias-pull-up; + }; + }; + + wcnss_pin_a: wcnss-pin-active-state { + pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40"; + function = "wlan"; + drive-strength = <6>; + bias-pull-down; + }; +}; + +&usb { + phys = <&usb_hs1_phy>; + phy-select = <&tcsr 0xb000 0>; + extcon = <&smbb>, <&usb_id>; + vbus-supply = <&chg_otg>; + + hnp-disable; + srp-disable; + adp-disable; + + status = "okay"; +}; + +&usb_hs1_phy { + v1p8-supply = <&pm8941_l6>; + v3p3-supply = <&pm8941_l24>; + extcon = <&smbb>; + qcom,init-seq = /bits/ 8 <0x1 0x63>; + status = "okay"; +}; -- cgit From dd2118bd10c1e74b8f0082750bd39c4bcb5fe5f7 Mon Sep 17 00:00:00 2001 From: Mohammad Shehar Yaar Tausif Date: Tue, 23 Apr 2024 20:37:25 +0530 Subject: ARM: dts: vt8500: replace "uhci" nodename with generic name "usb" Replace "uhci" nodenames with "usb" as it's generic and aligns with the schema binding. Signed-off-by: Mohammad Shehar Yaar Tausif Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240423150728.91527-1-sheharyaar48@gmail.com Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/vt8500/vt8500.dtsi | 2 +- arch/arm/boot/dts/vt8500/wm8505.dtsi | 2 +- arch/arm/boot/dts/vt8500/wm8650.dtsi | 2 +- arch/arm/boot/dts/vt8500/wm8750.dtsi | 4 ++-- arch/arm/boot/dts/vt8500/wm8850.dtsi | 4 ++-- 5 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/vt8500/vt8500.dtsi b/arch/arm/boot/dts/vt8500/vt8500.dtsi index b7e09eff5bb2..f23cb5ee11ae 100644 --- a/arch/arm/boot/dts/vt8500/vt8500.dtsi +++ b/arch/arm/boot/dts/vt8500/vt8500.dtsi @@ -115,7 +115,7 @@ interrupts = <43>; }; - uhci@d8007b00 { + usb@d8007b00 { compatible = "platform-uhci"; reg = <0xd8007b00 0x200>; interrupts = <43>; diff --git a/arch/arm/boot/dts/vt8500/wm8505.dtsi b/arch/arm/boot/dts/vt8500/wm8505.dtsi index 168cd12b07bc..d9e1280372c5 100644 --- a/arch/arm/boot/dts/vt8500/wm8505.dtsi +++ b/arch/arm/boot/dts/vt8500/wm8505.dtsi @@ -213,7 +213,7 @@ interrupts = <1>; }; - uhci@d8007300 { + usb@d8007300 { compatible = "platform-uhci"; reg = <0xd8007300 0x200>; interrupts = <0>; diff --git a/arch/arm/boot/dts/vt8500/wm8650.dtsi b/arch/arm/boot/dts/vt8500/wm8650.dtsi index bc057b6f7d16..35d12d77efc0 100644 --- a/arch/arm/boot/dts/vt8500/wm8650.dtsi +++ b/arch/arm/boot/dts/vt8500/wm8650.dtsi @@ -185,7 +185,7 @@ interrupts = <43>; }; - uhci@d8007b00 { + usb@d8007b00 { compatible = "platform-uhci"; reg = <0xd8007b00 0x200>; interrupts = <43>; diff --git a/arch/arm/boot/dts/vt8500/wm8750.dtsi b/arch/arm/boot/dts/vt8500/wm8750.dtsi index 33aeb37491f4..b292f85d4e69 100644 --- a/arch/arm/boot/dts/vt8500/wm8750.dtsi +++ b/arch/arm/boot/dts/vt8500/wm8750.dtsi @@ -257,13 +257,13 @@ interrupts = <26>; }; - uhci@d8007b00 { + usb@d8007b00 { compatible = "platform-uhci"; reg = <0xd8007b00 0x200>; interrupts = <26>; }; - uhci@d8008d00 { + usb@d8008d00 { compatible = "platform-uhci"; reg = <0xd8008d00 0x200>; interrupts = <26>; diff --git a/arch/arm/boot/dts/vt8500/wm8850.dtsi b/arch/arm/boot/dts/vt8500/wm8850.dtsi index 65c9271050e6..c61717ebb4f1 100644 --- a/arch/arm/boot/dts/vt8500/wm8850.dtsi +++ b/arch/arm/boot/dts/vt8500/wm8850.dtsi @@ -244,13 +244,13 @@ interrupts = <26>; }; - uhci@d8007b00 { + usb@d8007b00 { compatible = "platform-uhci"; reg = <0xd8007b00 0x200>; interrupts = <26>; }; - uhci@d8008d00 { + usb@d8008d00 { compatible = "platform-uhci"; reg = <0xd8008d00 0x200>; interrupts = <26>; -- cgit From 9edd534fc6553d83ac9f208a64d581f5d20214d7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:47:49 +0200 Subject: ARM: dts: vt8500: align panel timings node name with dtschema DT schema expects panel timings node to follow certain pattern, dtbs_check warnings: vt8500-bv07.dtb: display-timings: '800x480' does not match any of the regexes: '^timing', 'pinctrl-[0-9]+' Linux drivers do not care about node name, so this should not have effect on Linux. Link: https://lore.kernel.org/r/20240509104749.216605-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/vt8500/vt8500-bv07.dts | 2 +- arch/arm/boot/dts/vt8500/wm8505-ref.dts | 2 +- arch/arm/boot/dts/vt8500/wm8650-mid.dts | 2 +- arch/arm/boot/dts/vt8500/wm8850-w70v2.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/vt8500/vt8500-bv07.dts b/arch/arm/boot/dts/vt8500/vt8500-bv07.dts index e9f55bd30bd4..38a2da5e2c5d 100644 --- a/arch/arm/boot/dts/vt8500/vt8500-bv07.dts +++ b/arch/arm/boot/dts/vt8500/vt8500-bv07.dts @@ -16,7 +16,7 @@ bits-per-pixel = <16>; display-timings { native-mode = <&timing0>; - timing0: 800x480 { + timing0: timing-800x480 { clock-frequency = <0>; /* unused but required */ hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/vt8500/wm8505-ref.dts b/arch/arm/boot/dts/vt8500/wm8505-ref.dts index 2d77c087676e..8ce9e2ef0a81 100644 --- a/arch/arm/boot/dts/vt8500/wm8505-ref.dts +++ b/arch/arm/boot/dts/vt8500/wm8505-ref.dts @@ -16,7 +16,7 @@ bits-per-pixel = <32>; display-timings { native-mode = <&timing0>; - timing0: 800x480 { + timing0: timing-800x480 { clock-frequency = <0>; /* unused but required */ hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/vt8500/wm8650-mid.dts b/arch/arm/boot/dts/vt8500/wm8650-mid.dts index f6a42149a0a0..7977b6c1e8eb 100644 --- a/arch/arm/boot/dts/vt8500/wm8650-mid.dts +++ b/arch/arm/boot/dts/vt8500/wm8650-mid.dts @@ -17,7 +17,7 @@ display-timings { native-mode = <&timing0>; - timing0: 800x480 { + timing0: timing-800x480 { clock-frequency = <0>; /* unused but required */ hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts b/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts index c7a6fe0ce48f..5d409323b10c 100644 --- a/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts +++ b/arch/arm/boot/dts/vt8500/wm8850-w70v2.dts @@ -28,7 +28,7 @@ bits-per-pixel = <16>; display-timings { native-mode = <&timing0>; - timing0: 800x480 { + timing0: timing-800x480 { clock-frequency = <0>; /* unused but required */ hactive = <800>; vactive = <480>; -- cgit From f3ed3b126a3653c7dc21bcf9a22ed2d7a62f83a2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:48:25 +0200 Subject: ARM: dts: cirrus: align panel timings node name with dtschema DT schema expects panel timings node to follow certain pattern. Linux drivers do not care about node name, so this should not have effect on Linux. Link: https://lore.kernel.org/r/20240509104825.216696-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/cirrus/ep7211-edb7211.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts b/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts index 7fb532f227af..808cd5778e27 100644 --- a/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts +++ b/arch/arm/boot/dts/cirrus/ep7211-edb7211.dts @@ -30,7 +30,7 @@ display-timings { native-mode = <&timing0>; - timing0: 320x240 { + timing0: timing-320x240 { hactive = <320>; hback-porch = <0>; hfront-porch = <0>; -- cgit From 5756101babc5334a9bc99601d1cc0d6776fa9ada Mon Sep 17 00:00:00 2001 From: Stanislav Jakubek Date: Sun, 9 Jun 2024 13:05:43 +0200 Subject: ARM: dts: qcom: motorola-falcon: add accelerometer, magnetometer Add the accelerometer and magnetometer that are present on the Motorola Moto G (2013) device. Signed-off-by: Stanislav Jakubek Link: https://lore.kernel.org/r/ZmWMh6fuLasvGkR/@standask-GA-A55M-S2HP Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts | 53 ++++++++++++++++++++++ 1 file changed, 53 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts b/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts index 029e1b1659c9..5dbca83f2230 100644 --- a/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts +++ b/arch/arm/boot/dts/qcom/msm8226-motorola-falcon.dts @@ -96,6 +96,35 @@ }; }; +&blsp1_i2c2 { + status = "okay"; + + magnetometer@c { + compatible = "asahi-kasei,ak8963"; + reg = <0xc>; + interrupts-extended = <&tlmm 66 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; + vdd-supply = <&pm8226_l19>; + vid-supply = <&pm8226_lvs1>; + pinctrl-0 = <&mag_int_default &mag_reset_default>; + pinctrl-names = "default"; + }; + + accelerometer@19 { + compatible = "st,lis3dh-accel"; + reg = <0x19>; + interrupts-extended = <&tlmm 63 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&pm8226_l19>; + vddio-supply = <&pm8226_lvs1>; + pinctrl-0 = <&accel_int_default>; + pinctrl-names = "default"; + mount-matrix = "0", "1", "0", + "1", "0", "0", + "0", "0", "-1"; + st,drdy-int-pin = <1>; + }; +}; + &blsp1_i2c3 { status = "okay"; @@ -321,6 +350,30 @@ }; &tlmm { + accel_int_default: accel-int-default-state { + pins = "gpio63"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-disable; + }; + + mag_int_default: mag-int-default-state { + pins = "gpio66"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-disable; + }; + + mag_reset_default: mag-reset-default-state { + pins = "gpio62"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; + reg_lcd_default: reg-lcd-default-state { pins = "gpio31", "gpio33"; function = "gpio"; -- cgit From 245838888dbf3ebaff762e3424a18e35b681afc2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:48:34 +0200 Subject: ARM: dts: imx: align panel timings node name with dtschema DT schema expects panel timings node to follow certain pattern, dtbs_check warnings: imx6dl-gw54xx.dtb: display-timings: 'hsd100pxn1' does not match any of the regexes: '^timing', 'pinctrl-[0-9]+' Linux drivers do not care about node name, so this should not have effect on Linux. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx51-babbage.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts | 14 +++++++------- arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts | 6 +++--- arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi | 16 ++++++++-------- arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi | 16 ++++++++-------- arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 14 +++++++------- 19 files changed, 47 insertions(+), 47 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts b/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts index b61d55ca1467..f72e109342bc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts @@ -25,7 +25,7 @@ pinctrl-0 = <&pinctrl_ipu_disp1>; display-timings { - lw700 { + timing0: timing-lw700 { native-mode; clock-frequency = <33000033>; hactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts b/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts index 16ff543f3fbf..f4a47e8348b2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-babbage.dts @@ -89,7 +89,7 @@ status = "disabled"; display-timings { native-mode = <&timing1>; - timing1: claawvga { + timing1: timing-claawvga { clock-frequency = <27000000>; hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts b/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts index 2bd0761c7e90..87a34cbdf233 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts @@ -58,7 +58,7 @@ pinctrl-0 = <&pinctrl_lcd>; display-timings { - 800x480p60 { + timing0: timing-800x480p60 { native-mode; clock-frequency = <30066000>; hactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts index 1353d985969c..f0f92ee7ba95 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts @@ -17,7 +17,7 @@ pinctrl-0 = <&pinctrl_ipu_disp1>; display-timings { - 800x480p60 { + timing0: timing-800x480p60 { native-mode; clock-frequency = <31500000>; hactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts b/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts index a7f77527269d..a02d77bb5672 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-tx53-x03x.dts @@ -67,7 +67,7 @@ }; display-timings { - VGA { + timing-vga { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -83,7 +83,7 @@ pixelclk-active = <0>; }; - ETV570 { + timing-etc570 { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -99,7 +99,7 @@ pixelclk-active = <0>; }; - ET0350 { + timing-et0350 { clock-frequency = <6413760>; hactive = <320>; vactive = <240>; @@ -115,7 +115,7 @@ pixelclk-active = <0>; }; - ET0430 { + timing-et0430 { clock-frequency = <9009000>; hactive = <480>; vactive = <272>; @@ -131,7 +131,7 @@ pixelclk-active = <1>; }; - ET0500 { + timing-et0500 { clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -147,7 +147,7 @@ pixelclk-active = <0>; }; - ET0700 { /* same as ET0500 */ + timing-et0700 { /* same as ET0500 */ clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -163,7 +163,7 @@ pixelclk-active = <0>; }; - ETQ570 { + timing-etq570 { clock-frequency = <6596040>; hactive = <320>; vactive = <240>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts b/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts index 6cdf2082c742..e10c179dbdb3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-tx53-x13x.dts @@ -191,7 +191,7 @@ display-timings { native-mode = <&lvds0_timing0>; - lvds0_timing0: hsd100pxn1 { + lvds0_timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; @@ -207,7 +207,7 @@ pixelclk-active = <1>; }; - lvds0_timing1: nl12880bc20 { + lvds0_timing1: timing-nl12880bc20 { clock-frequency = <71000000>; hactive = <1280>; vactive = <800>; @@ -233,7 +233,7 @@ display-timings { native-mode = <&lvds1_timing0>; - lvds1_timing0: hsd100pxn1 { + lvds1_timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts index dfa6f64d43cc..c75606fc4abd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts @@ -85,7 +85,7 @@ power-on-delay = <10>; display-timings { - 480x800p57 { + timing0: timing-480x800p57 { native-mode; clock-frequency = <27000027>; hactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts index a5ac79346854..0d86927819c2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts @@ -36,7 +36,7 @@ status = "okay"; display-timings { - 480x800p60 { + timing0: timing-480x800p60 { native-mode; clock-frequency = <30000000>; hactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts index 5a25bdbbeb68..66271daf97d9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts @@ -25,7 +25,7 @@ status = "okay"; display-timings { - 800x480p60 { + timing0: timing-800x480p60 { native-mode; clock-frequency = <33246000>; hactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi index 48ffb3ee01bd..082a2e3a391f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw52xx.dtsi @@ -485,7 +485,7 @@ display-timings { native-mode = <&timing0>; - timing0: hsd100pxn1 { + timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi index 1eae438fbdae..8ec442038ea0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw53xx.dtsi @@ -482,7 +482,7 @@ display-timings { native-mode = <&timing0>; - timing0: hsd100pxn1 { + timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi index c2ec8572c8a5..9df9f79affae 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw54xx.dtsi @@ -529,7 +529,7 @@ display-timings { native-mode = <&timing0>; - timing0: hsd100pxn1 { + timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi index 7cee983da669..7693f92195d5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw560x.dtsi @@ -584,7 +584,7 @@ display-timings { native-mode = <&timing0>; - timing0: hsd100pxn1 { + timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi index fbc704c064b6..9d0836df0fed 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5903.dtsi @@ -486,7 +486,7 @@ display-timings { native-mode = <&timing0>; - timing0: g101evn010 { + timing0: timing-g101evn010 { clock-frequency = <68930000>; hactive = <1280>; vactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi index 070506279186..f4cb9e1d34a9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-gw5904.dtsi @@ -551,7 +551,7 @@ display-timings { native-mode = <&timing0>; - timing0: hsd100pxn1 { + timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi index 6656e2e762a1..0a3deaf92eea 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabreauto.dtsi @@ -786,7 +786,7 @@ display-timings { native-mode = <&timing0>; - timing0: hsd100pxn1 { + timing0: timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi index 79f2354886b7..7ae495bdc48f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi @@ -110,7 +110,7 @@ }; display-timings { - VGA { + timing-vga { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -126,7 +126,7 @@ pixelclk-active = <0>; }; - ETV570 { + timing-etv570 { u-boot,panel-name = "edt,et057090dhu"; clock-frequency = <25200000>; hactive = <640>; @@ -143,7 +143,7 @@ pixelclk-active = <0>; }; - ET0350 { + timing-et0350 { u-boot,panel-name = "edt,et0350g0dh6"; clock-frequency = <6413760>; hactive = <320>; @@ -160,7 +160,7 @@ pixelclk-active = <0>; }; - ET0430 { + timing-et0430 { u-boot,panel-name = "edt,et0430g0dh6"; clock-frequency = <9009000>; hactive = <480>; @@ -177,7 +177,7 @@ pixelclk-active = <1>; }; - ET0500 { + timing-et0500 { clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -193,7 +193,7 @@ pixelclk-active = <0>; }; - ET0700 { /* same as ET0500 */ + timing-et0700 { /* same as ET0500 */ u-boot,panel-name = "edt,etm0700g0dh6"; clock-frequency = <33264000>; hactive = <800>; @@ -210,7 +210,7 @@ pixelclk-active = <0>; }; - ETQ570 { + timing-etq570 { clock-frequency = <6596040>; hactive = <320>; vactive = <240>; @@ -226,7 +226,7 @@ pixelclk-active = <0>; }; - CoMTFT { /* same as ET0700 but with inverted pixel clock */ + timing-comtft { /* same as ET0700 but with inverted pixel clock */ u-boot,panel-name = "edt,etm0700g0edh6"; clock-frequency = <33264000>; hactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi index 2ca2eb37e14f..dfbdbb87aec4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi @@ -127,7 +127,7 @@ }; display-timings { - hsd100pxn1 { + timing-hsd100pxn1 { u-boot,panel-name = "hannstar,hsd100pxn1"; clock-frequency = <65000000>; hactive = <1024>; @@ -142,7 +142,7 @@ pixelclk-active = <1>; }; - VGA { + timing-vga { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -158,7 +158,7 @@ pixelclk-active = <0>; }; - nl12880bc20 { + timing-nl12880bc20 { u-boot,panel-name = "nlt,nl12880bc20-spwg-24"; clock-frequency = <71000000>; hactive = <1280>; @@ -175,7 +175,7 @@ pixelclk-active = <1>; }; - ET0700 { + timing-et0700 { u-boot,panel-name = "edt,etm0700g0dh6"; clock-frequency = <33264000>; hactive = <800>; @@ -192,7 +192,7 @@ pixelclk-active = <0>; }; - ETV570 { + timing-etv570 { u-boot,panel-name = "edt,et057090dhu"; clock-frequency = <25200000>; hactive = <640>; @@ -224,7 +224,7 @@ }; display-timings { - hsd100pxn1 { + timing-hsd100pxn1 { clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; @@ -238,7 +238,7 @@ pixelclk-active = <1>; }; - VGA { + timing-vga { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -254,7 +254,7 @@ pixelclk-active = <0>; }; - nl12880bc20 { + timing-nl12880bc20 { clock-frequency = <71000000>; hactive = <1280>; vactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi index 1db146ac1c17..864173e30709 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi @@ -405,7 +405,7 @@ status = "okay"; display-timings { - VGA { + timing-vga { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -421,7 +421,7 @@ pixelclk-active = <1>; }; - ETV570 { + timing-etv570 { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -437,7 +437,7 @@ pixelclk-active = <1>; }; - ET0350 { + timing-et0350 { clock-frequency = <6413760>; hactive = <320>; vactive = <240>; @@ -453,7 +453,7 @@ pixelclk-active = <1>; }; - ET0430 { + timing-et0430 { clock-frequency = <9009000>; hactive = <480>; vactive = <272>; @@ -469,7 +469,7 @@ pixelclk-active = <0>; }; - ET0500 { + timing-et0500 { clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -485,7 +485,7 @@ pixelclk-active = <1>; }; - ET0700 { /* same as ET0500 */ + timing-et0700 { /* same as ET0500 */ clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -501,7 +501,7 @@ pixelclk-active = <1>; }; - ETQ570 { + timing-etq570 { clock-frequency = <6596040>; hactive = <320>; vactive = <240>; -- cgit From 069e81ea96bdff4e771df4a644fbcf4913261e9b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:48:35 +0200 Subject: ARM: dts: imx: correct choice of panel native mode Bindings and Linux driver expect native-mode to be a phandle to one of the timings node, not a boolean property. Correct the DTS to fix dtbs_check warnings like: imx53-m53evk.dtb: display-timings: timing-800x480p60: 'native-mode' does not match any of the regexes: 'pinctrl-[0-9]+' This should not have actual effect for Linux kernel (no real bug affecting choice of native-mode), because the first timing node is chosen in absence of proper native-mode property. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts b/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts index f72e109342bc..de6b7607510a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-apf51dev.dts @@ -25,8 +25,8 @@ pinctrl-0 = <&pinctrl_ipu_disp1>; display-timings { + native-mode = <&timing0>; timing0: timing-lw700 { - native-mode; clock-frequency = <33000033>; hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts b/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts index 87a34cbdf233..079bd3d14999 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts +++ b/arch/arm/boot/dts/nxp/imx/imx51-ts4800.dts @@ -58,8 +58,8 @@ pinctrl-0 = <&pinctrl_lcd>; display-timings { + native-mode = <&timing0>; timing0: timing-800x480p60 { - native-mode; clock-frequency = <30066000>; hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts index f0f92ee7ba95..ba0c62994f75 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-m53evk.dts @@ -17,8 +17,8 @@ pinctrl-0 = <&pinctrl_ipu_disp1>; display-timings { + native-mode = <&timing0>; timing0: timing-800x480p60 { - native-mode; clock-frequency = <31500000>; hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts index c75606fc4abd..ec806b8d503a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts @@ -85,8 +85,8 @@ power-on-delay = <10>; display-timings { + native-mode = <&timing0>; timing0: timing-480x800p57 { - native-mode; clock-frequency = <27000027>; hactive = <480>; vactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts index 0d86927819c2..9ec038f1d0ff 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_4.dts @@ -36,8 +36,8 @@ status = "okay"; display-timings { + native-mode = <&timing0>; timing0: timing-480x800p60 { - native-mode; clock-frequency = <30000000>; hactive = <480>; vactive = <800>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts index 66271daf97d9..b3129832f471 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos_7.dts @@ -25,8 +25,8 @@ status = "okay"; display-timings { + native-mode = <&timing0>; timing0: timing-800x480p60 { - native-mode; clock-frequency = <33246000>; hactive = <800>; vactive = <480>; -- cgit From 04ee7d2d72c399d084ca9326f4808f952d1630b7 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:48:36 +0200 Subject: ARM: dts: imx6dl-aristainetos2_4: drop redundant 'power-on-delay' property LG4573 panel bindings do not allow 'power-on-delay' property. Linux driver does not use it, either. Reported by dtbs_check: imx6dl-aristainetos2_4.dtb: display@0: Unevaluated properties are not allowed ('power-on-delay' was unexpected) Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts index ec806b8d503a..c9b2ea2b24b2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-aristainetos2_4.dts @@ -82,7 +82,6 @@ compatible = "lg,lg4573"; spi-max-frequency = <10000000>; reg = <0>; - power-on-delay = <10>; display-timings { native-mode = <&timing0>; -- cgit From 63da595d80499728b33eda30110cee6ab431451e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:48:37 +0200 Subject: ARM: dts: imx: drop redundant 'u-boot,panel-name' property Panel timing bindings do not allow 'u-boot,panel-name' and there seems to be no users of it: neither Linux kernel drivers, nor U-boot as of v2024.07-rc2. Reported by dtbs_check: imx6qp-tx6qp-8037.dtb: display-timings: timing-et0700: 'u-boot,panel-name' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi | 5 ----- arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi | 4 ---- 2 files changed, 9 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi index 7ae495bdc48f..ded241a39906 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi @@ -127,7 +127,6 @@ }; timing-etv570 { - u-boot,panel-name = "edt,et057090dhu"; clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -144,7 +143,6 @@ }; timing-et0350 { - u-boot,panel-name = "edt,et0350g0dh6"; clock-frequency = <6413760>; hactive = <320>; vactive = <240>; @@ -161,7 +159,6 @@ }; timing-et0430 { - u-boot,panel-name = "edt,et0430g0dh6"; clock-frequency = <9009000>; hactive = <480>; vactive = <272>; @@ -194,7 +191,6 @@ }; timing-et0700 { /* same as ET0500 */ - u-boot,panel-name = "edt,etm0700g0dh6"; clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -227,7 +223,6 @@ }; timing-comtft { /* same as ET0700 but with inverted pixel clock */ - u-boot,panel-name = "edt,etm0700g0edh6"; clock-frequency = <33264000>; hactive = <800>; vactive = <480>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi index dfbdbb87aec4..4eb53d5677a6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lvds.dtsi @@ -128,7 +128,6 @@ display-timings { timing-hsd100pxn1 { - u-boot,panel-name = "hannstar,hsd100pxn1"; clock-frequency = <65000000>; hactive = <1024>; vactive = <768>; @@ -159,7 +158,6 @@ }; timing-nl12880bc20 { - u-boot,panel-name = "nlt,nl12880bc20-spwg-24"; clock-frequency = <71000000>; hactive = <1280>; vactive = <800>; @@ -176,7 +174,6 @@ }; timing-et0700 { - u-boot,panel-name = "edt,etm0700g0dh6"; clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -193,7 +190,6 @@ }; timing-etv570 { - u-boot,panel-name = "edt,et057090dhu"; clock-frequency = <25200000>; hactive = <640>; vactive = <480>; -- cgit From 331929bd9edbf2217563e441be7e5748834b62ba Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:48:38 +0200 Subject: ARM: dts: imx28-tx28: drop redundant 'panel-name' property Panel timing bindings do not allow 'panel-name' and there seems to be no users of it: neither Linux kernel drivers, nor U-boot as of v2024.07-rc2. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts b/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts index 5485fe118dc4..d38183edf0fd 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-tx28.dts @@ -323,7 +323,6 @@ display-timings { native-mode = <&timing5>; timing0: timing0 { - panel-name = "VGA"; clock-frequency = <25175000>; hactive = <640>; vactive = <480>; @@ -340,7 +339,6 @@ }; timing1: timing1 { - panel-name = "ETV570"; clock-frequency = <25175000>; hactive = <640>; vactive = <480>; @@ -357,7 +355,6 @@ }; timing2: timing2 { - panel-name = "ET0350"; clock-frequency = <6500000>; hactive = <320>; vactive = <240>; @@ -374,7 +371,6 @@ }; timing3: timing3 { - panel-name = "ET0430"; clock-frequency = <9000000>; hactive = <480>; vactive = <272>; @@ -391,7 +387,6 @@ }; timing4: timing4 { - panel-name = "ET0500", "ET0700"; clock-frequency = <33260000>; hactive = <800>; vactive = <480>; @@ -408,7 +403,6 @@ }; timing5: timing5 { - panel-name = "ETQ570"; clock-frequency = <6400000>; hactive = <320>; vactive = <240>; -- cgit From bd036febd03cb40b56911f057e3dacabd1521014 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 23 May 2024 00:22:02 +0200 Subject: ARM: dts: imx: Add LVDS port data mapping on M53 Menlo Describe LVDS data mapping of the LVDS-to-DPI decoder input port. This fixes a warning reported by lvds-codec driver: " lvds-codec lvds-decoder: missing 'data-mapping' DT property " Signed-off-by: Marek Vasut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts b/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts index 4d77b6077fc1..558751e730f3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts +++ b/arch/arm/boot/dts/nxp/imx/imx53-m53menlo.dts @@ -64,6 +64,7 @@ reg = <0>; lvds_decoder_in: endpoint { + data-mapping = "jeida-18"; remote-endpoint = <&lvds0_out>; }; }; -- cgit From 3a5297c5071055c31f268c123289488a6ec47a3e Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Wed, 5 Jun 2024 10:39:50 +0200 Subject: ARM: dts: e60k02: fix aliases for mmc Since commit fa2d0aa96941 ("mmc: core: Allow setting slot index via device tree alias") mmc numbering are changed, confusing boot scripts. Fix that by adding proper aliases Signed-off-by: Andreas Kemnade Reviewed-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/e60k02.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/e60k02.dtsi b/arch/arm/boot/dts/nxp/imx/e60k02.dtsi index 13756d39fb7b..0029c12f16c8 100644 --- a/arch/arm/boot/dts/nxp/imx/e60k02.dtsi +++ b/arch/arm/boot/dts/nxp/imx/e60k02.dtsi @@ -14,6 +14,10 @@ #include / { + aliases { + mmc0 = &usdhc2; + mmc1 = &usdhc3; + }; chosen { stdout-path = &uart1; -- cgit From af88df12762dab540d02c13324a0767473322f1e Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Wed, 12 Jun 2024 10:13:13 -0500 Subject: ARM: dts: nspire: Add unit name addresses to memory nodes Fixes the following DTB check warning: > node has a reg or ranges property, but no unit name Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240612151314.27967-1-afd@ti.com Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nspire/nspire-classic.dtsi | 2 +- arch/arm/boot/dts/nspire/nspire-cx.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nspire/nspire-classic.dtsi b/arch/arm/boot/dts/nspire/nspire-classic.dtsi index a6e9cbf51524..0ee53d3ecd54 100644 --- a/arch/arm/boot/dts/nspire/nspire-classic.dtsi +++ b/arch/arm/boot/dts/nspire/nspire-classic.dtsi @@ -55,7 +55,7 @@ }; / { - memory { + memory@10000000 { device_type = "memory"; reg = <0x10000000 0x2000000>; /* 32 MB */ }; diff --git a/arch/arm/boot/dts/nspire/nspire-cx.dts b/arch/arm/boot/dts/nspire/nspire-cx.dts index 29f0181e5b38..debeff0ec010 100644 --- a/arch/arm/boot/dts/nspire/nspire-cx.dts +++ b/arch/arm/boot/dts/nspire/nspire-cx.dts @@ -122,7 +122,7 @@ model = "TI-NSPIRE CX"; compatible = "ti,nspire-cx"; - memory { + memory@10000000 { device_type = "memory"; reg = <0x10000000 0x4000000>; /* 64 MB */ }; -- cgit From c322d10fe52138b2d47e3b8dd65c20d705e1c313 Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Wed, 12 Jun 2024 10:13:14 -0500 Subject: ARM: dts: nspire: Add full compatible for watchdog node The watchdog appears to be an ARM SP805, add the full compatible and the needed clocks properties. Leave this disabled for now as functionality is not fully tested. Signed-off-by: Andrew Davis Link: https://lore.kernel.org/r/20240612151314.27967-2-afd@ti.com Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nspire/nspire.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nspire/nspire.dtsi b/arch/arm/boot/dts/nspire/nspire.dtsi index d56fef7250db..95588b716c6f 100644 --- a/arch/arm/boot/dts/nspire/nspire.dtsi +++ b/arch/arm/boot/dts/nspire/nspire.dtsi @@ -170,9 +170,12 @@ }; watchdog: watchdog@90060000 { - compatible = "arm,primecell"; + compatible = "arm,sp805", "arm,primecell"; reg = <0x90060000 0x1000>; interrupts = <3>; + clocks = <&apb_pclk>, <&apb_pclk>; + clock-names = "wdog_clk", "apb_pclk"; + status = "disabled"; }; rtc: rtc@90090000 { -- cgit From f873f24375c6d46bea92a2ed8ffe55b2f9d5509c Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 31 May 2024 14:31:04 -0500 Subject: arm: dts: nuvoton: Use standard 'i2c' bus node name The standard node name for I2C buses is 'i2c'. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240531193104.3814663-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts | 22 +++++++++++----------- .../dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts | 22 +++++++++++----------- 2 files changed, 22 insertions(+), 22 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts index 5787ae95d3b4..1f07ba382910 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts +++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm730-kudo.dts @@ -525,7 +525,7 @@ }; }; - i2c-bus@4 { + i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>; @@ -537,7 +537,7 @@ }; }; - i2c-bus@5 { + i2c@5 { #address-cells = <1>; #size-cells = <0>; reg = <5>; @@ -549,7 +549,7 @@ }; }; - i2c-bus@6 { + i2c@6 { #address-cells = <1>; #size-cells = <0>; reg = <6>; @@ -561,7 +561,7 @@ }; }; - i2c-bus@7 { + i2c@7 { #address-cells = <1>; #size-cells = <0>; reg = <7>; @@ -580,7 +580,7 @@ reg = <0x77>; i2c-mux-idle-disconnect; - i2c-bus@2 { + i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; @@ -620,7 +620,7 @@ reg = <0x77>; i2c-mux-idle-disconnect; - i2c-bus@0 { + i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; @@ -632,7 +632,7 @@ }; }; - i2c-bus@1 { + i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; @@ -691,7 +691,7 @@ reg = <0x77>; i2c-mux-idle-disconnect; - i2c-bus@3 { + i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; @@ -703,7 +703,7 @@ }; }; - i2c-bus@4 { + i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>; @@ -715,7 +715,7 @@ }; }; - i2c-bus@5 { + i2c@5 { #address-cells = <1>; #size-cells = <0>; reg = <5>; @@ -726,7 +726,7 @@ reg = <0x28>; }; }; - i2c-bus@6 { + i2c@6 { #address-cells = <1>; #size-cells = <0>; reg = <6>; diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts index baa39d0c1032..087f4ac43187 100644 --- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts +++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-runbmc-olympus.dts @@ -215,43 +215,43 @@ reg = <0x70>; i2c-mux-idle-disconnect; - i2c_slot1a: i2c-bus@0 { + i2c_slot1a: i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; }; - i2c_slot1b: i2c-bus@1 { + i2c_slot1b: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; }; - i2c_slot2a: i2c-bus@2 { + i2c_slot2a: i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; }; - i2c_slot2b: i2c-bus@3 { + i2c_slot2b: i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; }; - i2c_slot3: i2c-bus@4 { + i2c_slot3: i2c@4 { #address-cells = <1>; #size-cells = <0>; reg = <4>; }; - i2c_slot4: i2c-bus@5 { + i2c_slot4: i2c@5 { #address-cells = <1>; #size-cells = <0>; reg = <5>; }; - i2c_slot5: i2c-bus@6 { + i2c_slot5: i2c@6 { #address-cells = <1>; #size-cells = <0>; reg = <6>; @@ -265,24 +265,24 @@ #size-cells = <0>; i2c-mux-idle-disconnect; - i2c_m2_s1: i2c-bus@0 { + i2c_m2_s1: i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; }; - i2c_m2_s2: i2c-bus@1 { + i2c_m2_s2: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; }; - i2c_m2_s3: i2c-bus@2 { + i2c_m2_s3: i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; }; - i2c_m2_s4: i2c-bus@3 { + i2c_m2_s4: i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; -- cgit From 11afaf16a6540754d618179bd01791fc03480146 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Fri, 31 May 2024 14:31:14 -0500 Subject: arm: dts: aspeed: Use standard 'i2c' bus node name The standard node name for I2C buses is 'i2c'. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240531193115.3814887-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/aspeed/aspeed-g4.dtsi | 28 ++++++++++++++-------------- arch/arm/boot/dts/aspeed/aspeed-g5.dtsi | 28 ++++++++++++++-------------- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 32 ++++++++++++++++---------------- 3 files changed, 44 insertions(+), 44 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi index 857cb26ed6d7..c669ec202085 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g4.dtsi @@ -463,7 +463,7 @@ interrupt-controller; }; - i2c0: i2c-bus@40 { + i2c0: i2c@40 { #address-cells = <1>; #size-cells = <0>; @@ -478,7 +478,7 @@ /* Does not need pinctrl properties */ }; - i2c1: i2c-bus@80 { + i2c1: i2c@80 { #address-cells = <1>; #size-cells = <0>; @@ -493,7 +493,7 @@ /* Does not need pinctrl properties */ }; - i2c2: i2c-bus@c0 { + i2c2: i2c@c0 { #address-cells = <1>; #size-cells = <0>; @@ -509,7 +509,7 @@ status = "disabled"; }; - i2c3: i2c-bus@100 { + i2c3: i2c@100 { #address-cells = <1>; #size-cells = <0>; @@ -525,7 +525,7 @@ status = "disabled"; }; - i2c4: i2c-bus@140 { + i2c4: i2c@140 { #address-cells = <1>; #size-cells = <0>; @@ -541,7 +541,7 @@ status = "disabled"; }; - i2c5: i2c-bus@180 { + i2c5: i2c@180 { #address-cells = <1>; #size-cells = <0>; @@ -557,7 +557,7 @@ status = "disabled"; }; - i2c6: i2c-bus@1c0 { + i2c6: i2c@1c0 { #address-cells = <1>; #size-cells = <0>; @@ -573,7 +573,7 @@ status = "disabled"; }; - i2c7: i2c-bus@300 { + i2c7: i2c@300 { #address-cells = <1>; #size-cells = <0>; @@ -589,7 +589,7 @@ status = "disabled"; }; - i2c8: i2c-bus@340 { + i2c8: i2c@340 { #address-cells = <1>; #size-cells = <0>; @@ -605,7 +605,7 @@ status = "disabled"; }; - i2c9: i2c-bus@380 { + i2c9: i2c@380 { #address-cells = <1>; #size-cells = <0>; @@ -621,7 +621,7 @@ status = "disabled"; }; - i2c10: i2c-bus@3c0 { + i2c10: i2c@3c0 { #address-cells = <1>; #size-cells = <0>; @@ -637,7 +637,7 @@ status = "disabled"; }; - i2c11: i2c-bus@400 { + i2c11: i2c@400 { #address-cells = <1>; #size-cells = <0>; @@ -653,7 +653,7 @@ status = "disabled"; }; - i2c12: i2c-bus@440 { + i2c12: i2c@440 { #address-cells = <1>; #size-cells = <0>; @@ -669,7 +669,7 @@ status = "disabled"; }; - i2c13: i2c-bus@480 { + i2c13: i2c@480 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi index e6f3cf3c721e..6e05cbcce49c 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g5.dtsi @@ -592,7 +592,7 @@ interrupt-controller; }; - i2c0: i2c-bus@40 { + i2c0: i2c@40 { #address-cells = <1>; #size-cells = <0>; @@ -607,7 +607,7 @@ /* Does not need pinctrl properties */ }; - i2c1: i2c-bus@80 { + i2c1: i2c@80 { #address-cells = <1>; #size-cells = <0>; @@ -622,7 +622,7 @@ /* Does not need pinctrl properties */ }; - i2c2: i2c-bus@c0 { + i2c2: i2c@c0 { #address-cells = <1>; #size-cells = <0>; @@ -638,7 +638,7 @@ status = "disabled"; }; - i2c3: i2c-bus@100 { + i2c3: i2c@100 { #address-cells = <1>; #size-cells = <0>; @@ -654,7 +654,7 @@ status = "disabled"; }; - i2c4: i2c-bus@140 { + i2c4: i2c@140 { #address-cells = <1>; #size-cells = <0>; @@ -670,7 +670,7 @@ status = "disabled"; }; - i2c5: i2c-bus@180 { + i2c5: i2c@180 { #address-cells = <1>; #size-cells = <0>; @@ -686,7 +686,7 @@ status = "disabled"; }; - i2c6: i2c-bus@1c0 { + i2c6: i2c@1c0 { #address-cells = <1>; #size-cells = <0>; @@ -702,7 +702,7 @@ status = "disabled"; }; - i2c7: i2c-bus@300 { + i2c7: i2c@300 { #address-cells = <1>; #size-cells = <0>; @@ -718,7 +718,7 @@ status = "disabled"; }; - i2c8: i2c-bus@340 { + i2c8: i2c@340 { #address-cells = <1>; #size-cells = <0>; @@ -734,7 +734,7 @@ status = "disabled"; }; - i2c9: i2c-bus@380 { + i2c9: i2c@380 { #address-cells = <1>; #size-cells = <0>; @@ -750,7 +750,7 @@ status = "disabled"; }; - i2c10: i2c-bus@3c0 { + i2c10: i2c@3c0 { #address-cells = <1>; #size-cells = <0>; @@ -766,7 +766,7 @@ status = "disabled"; }; - i2c11: i2c-bus@400 { + i2c11: i2c@400 { #address-cells = <1>; #size-cells = <0>; @@ -782,7 +782,7 @@ status = "disabled"; }; - i2c12: i2c-bus@440 { + i2c12: i2c@440 { #address-cells = <1>; #size-cells = <0>; @@ -798,7 +798,7 @@ status = "disabled"; }; - i2c13: i2c-bus@480 { + i2c13: i2c@480 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi index 7fb421153596..0c00882f111a 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -905,7 +905,7 @@ #include "aspeed-g6-pinctrl.dtsi" &i2c { - i2c0: i2c-bus@80 { + i2c0: i2c@80 { #address-cells = <1>; #size-cells = <0>; reg = <0x80 0x80>; @@ -919,7 +919,7 @@ status = "disabled"; }; - i2c1: i2c-bus@100 { + i2c1: i2c@100 { #address-cells = <1>; #size-cells = <0>; reg = <0x100 0x80>; @@ -933,7 +933,7 @@ status = "disabled"; }; - i2c2: i2c-bus@180 { + i2c2: i2c@180 { #address-cells = <1>; #size-cells = <0>; reg = <0x180 0x80>; @@ -947,7 +947,7 @@ status = "disabled"; }; - i2c3: i2c-bus@200 { + i2c3: i2c@200 { #address-cells = <1>; #size-cells = <0>; reg = <0x200 0x80>; @@ -961,7 +961,7 @@ status = "disabled"; }; - i2c4: i2c-bus@280 { + i2c4: i2c@280 { #address-cells = <1>; #size-cells = <0>; reg = <0x280 0x80>; @@ -975,7 +975,7 @@ status = "disabled"; }; - i2c5: i2c-bus@300 { + i2c5: i2c@300 { #address-cells = <1>; #size-cells = <0>; reg = <0x300 0x80>; @@ -989,7 +989,7 @@ status = "disabled"; }; - i2c6: i2c-bus@380 { + i2c6: i2c@380 { #address-cells = <1>; #size-cells = <0>; reg = <0x380 0x80>; @@ -1003,7 +1003,7 @@ status = "disabled"; }; - i2c7: i2c-bus@400 { + i2c7: i2c@400 { #address-cells = <1>; #size-cells = <0>; reg = <0x400 0x80>; @@ -1017,7 +1017,7 @@ status = "disabled"; }; - i2c8: i2c-bus@480 { + i2c8: i2c@480 { #address-cells = <1>; #size-cells = <0>; reg = <0x480 0x80>; @@ -1031,7 +1031,7 @@ status = "disabled"; }; - i2c9: i2c-bus@500 { + i2c9: i2c@500 { #address-cells = <1>; #size-cells = <0>; reg = <0x500 0x80>; @@ -1045,7 +1045,7 @@ status = "disabled"; }; - i2c10: i2c-bus@580 { + i2c10: i2c@580 { #address-cells = <1>; #size-cells = <0>; reg = <0x580 0x80>; @@ -1059,7 +1059,7 @@ status = "disabled"; }; - i2c11: i2c-bus@600 { + i2c11: i2c@600 { #address-cells = <1>; #size-cells = <0>; reg = <0x600 0x80>; @@ -1073,7 +1073,7 @@ status = "disabled"; }; - i2c12: i2c-bus@680 { + i2c12: i2c@680 { #address-cells = <1>; #size-cells = <0>; reg = <0x680 0x80>; @@ -1087,7 +1087,7 @@ status = "disabled"; }; - i2c13: i2c-bus@700 { + i2c13: i2c@700 { #address-cells = <1>; #size-cells = <0>; reg = <0x700 0x80>; @@ -1101,7 +1101,7 @@ status = "disabled"; }; - i2c14: i2c-bus@780 { + i2c14: i2c@780 { #address-cells = <1>; #size-cells = <0>; reg = <0x780 0x80>; @@ -1115,7 +1115,7 @@ status = "disabled"; }; - i2c15: i2c-bus@800 { + i2c15: i2c@800 { #address-cells = <1>; #size-cells = <0>; reg = <0x800 0x80>; -- cgit From 65896f4a3f852f868bd5bbc0abea072b2f6e0470 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 9 May 2024 16:06:52 +0200 Subject: ARM: dts: rockchip: Add D-PHY for RK3128 The InnoSilicon D-PHY found in RK3128 SoCs supports DSI/LVDS/TTL with a maximum transfer rate of 1 Gbps per lane. While adding it, also add it's clocks to RK3128_PD_VIO powerdomain as the phy is part of it. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240509140653.168591-7-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index fb98873fd94e..2e8ab8e8796a 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -216,6 +216,8 @@ <&cru ACLK_LCDC0>, <&cru HCLK_LCDC0>, <&cru PCLK_MIPI>, + <&cru PCLK_MIPIPHY>, + <&cru SCLK_MIPI_24M>, <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru ACLK_VIO0>, @@ -496,6 +498,18 @@ }; }; + dphy: phy@20038000 { + compatible = "rockchip,rk3128-dsi-dphy"; + reg = <0x20038000 0x4000>; + clocks = <&cru SCLK_MIPI_24M>, <&cru PCLK_MIPIPHY>; + clock-names = "ref", "pclk"; + #phy-cells = <0>; + power-domains = <&power RK3128_PD_VIO>; + resets = <&cru SRST_MIPIPHY_P>; + reset-names = "apb"; + status = "disabled"; + }; + timer0: timer@20044000 { compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer"; reg = <0x20044000 0x20>; -- cgit From 171ea1ff14e42041af420ed3745f6f480612baa0 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 9 May 2024 16:06:53 +0200 Subject: ARM: dts: rockchip: Add DSI for RK3128 Add the Designware MIPI DSI controller and it's port nodes. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240509140653.168591-8-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 37 ++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 2e8ab8e8796a..a7ab0904564f 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -277,6 +277,43 @@ reg = <0>; remote-endpoint = <&hdmi_in_vop>; }; + + vop_out_dsi: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi_in_vop>; + }; + }; + }; + + dsi: dsi@10110000 { + compatible = "rockchip,rk3128-mipi-dsi", "snps,dw-mipi-dsi"; + reg = <0x10110000 0x4000>; + interrupts = ; + clocks = <&cru PCLK_MIPI>; + clock-names = "pclk"; + phys = <&dphy>; + phy-names = "dphy"; + power-domains = <&power RK3128_PD_VIO>; + resets = <&cru SRST_VIO_MIPI_DSI>; + reset-names = "apb"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dsi_in: port@0 { + reg = <0>; + + dsi_in_vop: endpoint { + remote-endpoint = <&vop_out_dsi>; + }; + }; + + dsi_out: port@1 { + reg = <1>; + }; }; }; -- cgit From f87427158d268fe4747cc223de7a2523617b7475 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 6 May 2024 17:51:02 +0200 Subject: ARM: dts: rockchip: Add i2s nodes for RK3128 RK3128 SoCs have two i2s controllers. i2s_8ch has 8 tx and 2 rx channels and is internally hard-wired to the hdmi-controller respectivly the SoC's analog codec. i2s_2ch has 2 tx and 2 rx channels and can also be used externally as it's pins are exposed though pinctrl. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240506155103.206592-2-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index a7ab0904564f..2c41a123c96a 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -399,6 +399,18 @@ status = "disabled"; }; + i2s_8ch: i2s@10200000 { + compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s"; + reg = <0x10200000 0x1000>; + interrupts = ; + clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>; + clock-names = "i2s_clk", "i2s_hclk"; + dmas = <&pdma 14>, <&pdma 15>; + dma-names = "tx", "rx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + sdmmc: mmc@10214000 { compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -447,6 +459,21 @@ status = "disabled"; }; + i2s_2ch: i2s@10220000 { + compatible = "rockchip,rk3128-i2s", "rockchip,rk3066-i2s"; + reg = <0x10220000 0x1000>; + interrupts = ; + clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S_2CH>; + clock-names = "i2s_clk", "i2s_hclk"; + dmas = <&pdma 0>, <&pdma 1>; + dma-names = "tx", "rx"; + rockchip,playback-channels = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_bus>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + nfc: nand-controller@10500000 { compatible = "rockchip,rk3128-nfc", "rockchip,rk2928-nfc"; reg = <0x10500000 0x4000>; -- cgit From d244d6cc718a048672bfb148a6bc9c593a0e1207 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 6 May 2024 17:51:03 +0200 Subject: ARM: dts: rockchip: Add spdif node for RK3128 The SoC has a S/PDIF TX controller which is fully compatible with older generation Rockchip SoCs. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240506155103.206592-3-knaerzche@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 2c41a123c96a..4ced1f1fabea 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -411,6 +411,20 @@ status = "disabled"; }; + spdif: spdif@10204000 { + compatible = "rockchip,rk3128-spdif", "rockchip,rk3066-spdif"; + reg = <0x10204000 0x1000>; + interrupts = ; + clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>; + clock-names = "mclk", "hclk"; + dmas = <&pdma 13>; + dma-names = "tx"; + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx>; + #sound-dai-cells = <0>; + status = "disabled"; + }; + sdmmc: mmc@10214000 { compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; -- cgit From 041f240e4df6c49d5a928e0dd4c672d0d3326466 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Tue, 18 Jun 2024 14:02:25 +0200 Subject: ARM: dts: rockchip: add hdmi-sound node to rk3066a Add hdmi-sound node to rk3066a.dtsi, so that it can be reused by boards with HDMI support. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/5fe7c2fe-4a38-436a-8017-66989959329a@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3066a.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3066a.dtsi b/arch/arm/boot/dts/rockchip/rk3066a.dtsi index 30139f21de64..a4e815cd6707 100644 --- a/arch/arm/boot/dts/rockchip/rk3066a.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3066a.dtsi @@ -53,6 +53,22 @@ ports = <&vop0_out>, <&vop1_out>; }; + hdmi_sound: hdmi-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "HDMI"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + status = "disabled"; + + simple-audio-card,codec { + sound-dai = <&hdmi>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s0>; + }; + }; + sram: sram@10080000 { compatible = "mmio-sram"; reg = <0x10080000 0x10000>; -- cgit From 81fc54e62b5b391d78f741bf33c3a91f18464ffb Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 23 Jun 2024 14:07:07 +0200 Subject: ARM: dts: qcom: use generic node names for Adreno and QFPROM Use recommended generic node names for the Adreno GPU and QFPROM fused values device nodes. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240623120707.45764-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 4 ++-- arch/arm/boot/dts/qcom/qcom-apq8084.dtsi | 2 +- arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 2 +- arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 4 ++-- arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 4 ++-- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index 178a3b424670..d73ea1434b36 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -666,7 +666,7 @@ qcom,controller-type = "pmic-arbiter"; }; - qfprom: qfprom@700000 { + qfprom: efuse@700000 { compatible = "qcom,apq8064-qfprom", "qcom,qfprom"; reg = <0x00700000 0x1000>; #address-cells = <1>; @@ -992,7 +992,7 @@ reg = <0x1a400000 0x100>; }; - gpu: adreno-3xx@4300000 { + gpu: gpu@4300000 { compatible = "qcom,adreno-320.2", "qcom,adreno"; reg = <0x04300000 0x20000>; reg-names = "kgsl_3d0_reg_memory"; diff --git a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi index ca53dff820ef..2b52e5d5eb51 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8084.dtsi @@ -245,7 +245,7 @@ reg = <0xfc190000 0x10000>; }; - qfprom: qfprom@fc4bc000 { + qfprom: efuse@fc4bc000 { compatible = "qcom,apq8084-qfprom", "qcom,qfprom"; reg = <0xfc4bc000 0x1000>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi index 12cf85441a0b..da0fd75f4711 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi @@ -372,7 +372,7 @@ qcom,controller-type = "pmic-arbiter"; }; - qfprom: qfprom@700000 { + qfprom: efuse@700000 { compatible = "qcom,ipq8064-qfprom", "qcom,qfprom"; reg = <0x00700000 0x1000>; #address-cells = <1>; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi index 270973e85625..b2f92ad6499a 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi @@ -635,7 +635,7 @@ reg = <0xfc4ab000 0x4>; }; - qfprom: qfprom@fc4bc000 { + qfprom: efuse@fc4bc000 { compatible = "qcom,msm8226-qfprom", "qcom,qfprom"; reg = <0xfc4bc000 0x1000>; #address-cells = <1>; @@ -1046,7 +1046,7 @@ }; }; - gpu: adreno@fdb00000 { + gpu: gpu@fdb00000 { compatible = "qcom,adreno-305.18", "qcom,adreno"; reg = <0xfdb00000 0x10000>; reg-names = "kgsl_3d0_reg_memory"; diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index 1bea3cef4ba7..f9820d996910 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -1235,7 +1235,7 @@ reg = <0xfc4ab000 0x4>; }; - qfprom: qfprom@fc4bc000 { + qfprom: efuse@fc4bc000 { compatible = "qcom,msm8974-qfprom", "qcom,qfprom"; reg = <0xfc4bc000 0x2100>; #address-cells = <1>; @@ -2131,7 +2131,7 @@ }; }; - gpu: adreno@fdb00000 { + gpu: gpu@fdb00000 { compatible = "qcom,adreno-330.1", "qcom,adreno"; reg = <0xfdb00000 0x10000>; reg-names = "kgsl_3d0_reg_memory"; -- cgit From 54c799c3c4abe2c5e2c22d47dbcba5c34ec99aae Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 6 Jun 2024 16:34:02 +0200 Subject: ARM: dts: rockchip: Add SFC for RK3128 Add the Serial Flash Controller and it's pincontrols. Signed-off-by: Alex Bee Link: https://lore.kernel.org/r/20240606143401.32454-7-knaerzche@gmail.com [reference HCLK_SFC by its numeric id to prevent conflicts with the clock binding/controller changes] Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 35 ++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 4ced1f1fabea..5019aae1be32 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -425,6 +425,15 @@ status = "disabled"; }; + sfc: spi@1020c000 { + compatible = "rockchip,sfc"; + reg = <0x1020c000 0x8000>; + interrupts = ; + clocks = <&cru SCLK_SFC>, <&cru 479>; + clock-names = "clk_sfc", "hclk_sfc"; + status = "disabled"; + }; + sdmmc: mmc@10214000 { compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x10214000 0x4000>; @@ -1196,6 +1205,32 @@ }; }; + sfc { + sfc_bus2: sfc-bus2 { + rockchip,pins = <1 RK_PD0 3 &pcfg_pull_default>, + <1 RK_PD1 3 &pcfg_pull_default>; + }; + + sfc_bus4: sfc-bus4 { + rockchip,pins = <1 RK_PD0 3 &pcfg_pull_default>, + <1 RK_PD1 3 &pcfg_pull_default>, + <1 RK_PD2 3 &pcfg_pull_default>, + <1 RK_PD3 3 &pcfg_pull_default>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = <2 RK_PA4 3 &pcfg_pull_none>; + }; + + sfc_cs0: sfc-cs0 { + rockchip,pins = <2 RK_PA2 2 &pcfg_pull_default>; + }; + + sfc_cs1: sfc-cs1 { + rockchip,pins = <2 RK_PA3 2 &pcfg_pull_default>; + }; + }; + spdif { spdif_tx: spdif-tx { rockchip,pins = <3 RK_PD3 1 &pcfg_pull_none>; -- cgit From 5014e1e970dede6410c7b758c4f3665a0875bb7e Mon Sep 17 00:00:00 2001 From: Valeriy Klimin Date: Fri, 21 Jun 2024 17:26:43 +0300 Subject: ARM: dts: qcom: Add Sony Xperia Z3 Compact smartphone Add the dts for the Z3 Compact. This is currently almost the same as the plain Z3 as they share almost the same hardware and nothing device-specific is currently supported. Signed-off-by: Valeriy Klimin Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240621-sony-aries-v2-2-dddf10722522@gmail.com Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/Makefile | 1 + .../qcom-msm8974pro-sony-xperia-shinano-aries.dts | 44 ++++++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-aries.dts (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index e9a8bc74195e..ccd4ce6353df 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -50,6 +50,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8974pro-oneplus-bacon.dtb \ qcom-msm8974pro-samsung-klte.dtb \ qcom-msm8974pro-samsung-kltechn.dtb \ + qcom-msm8974pro-sony-xperia-shinano-aries.dtb \ qcom-msm8974pro-sony-xperia-shinano-castor.dtb \ qcom-msm8974pro-sony-xperia-shinano-leo.dtb \ qcom-mdm9615-wp8548-mangoh-green.dtb \ diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-aries.dts b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-aries.dts new file mode 100644 index 000000000000..2621c5928b6a --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-aries.dts @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-msm8974pro-sony-xperia-shinano-common.dtsi" + +/ { + model = "Sony Xperia Z3 Compact"; + compatible = "sony,xperia-aries", "qcom,msm8974pro", "qcom,msm8974"; + chassis-type = "handset"; + + gpio-keys { + key-camera-snapshot { + label = "camera_snapshot"; + gpios = <&pm8941_gpios 3 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + + key-camera-focus { + label = "camera_focus"; + gpios = <&pm8941_gpios 4 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <15>; + }; + }; +}; + +&gpio_keys_pin_a { + pins = "gpio2", "gpio3", "gpio4", "gpio5"; +}; + +&smbb { + usb-charge-current-limit = <1500000>; + qcom,fast-charge-safe-current = <2100000>; + qcom,fast-charge-current-limit = <1800000>; + qcom,fast-charge-safe-voltage = <4400000>; + qcom,fast-charge-high-threshold-voltage = <4350000>; + qcom,auto-recharge-threshold-voltage = <4280000>; + qcom,minimum-input-voltage = <4200000>; + + status = "okay"; +}; + +&synaptics_touchscreen { + vio-supply = <&pm8941_s3>; +}; -- cgit From f1a77eff4c60b9814d8b59abae21cfa80c00df79 Mon Sep 17 00:00:00 2001 From: Valeriy Klimin Date: Fri, 21 Jun 2024 17:26:44 +0300 Subject: ARM: dts: qcom: msm8974-sony-shinano: increase load on l21 for sdhc2 SD cards would exhibit errors similar to ones described in commit 27fe0fc05f35 ("ARM: dts: msm8974-FP2: Increase load on l20 for sdhci") This patch applies the same change to the regulator for sdhc2. Signed-off-by: Valeriy Klimin Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240621-sony-aries-v2-3-dddf10722522@gmail.com Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi index e129bb1bd6ec..6af7c71c7158 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi @@ -380,6 +380,8 @@ pm8941_l21: l21 { regulator-min-microvolt = <2950000>; regulator-max-microvolt = <2950000>; + regulator-system-load = <500000>; + regulator-allow-set-load; regulator-boot-on; }; -- cgit From 368a5aed131271600e75c715a5b79f0b613f0225 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Wed, 19 Jun 2024 18:42:27 +0200 Subject: ARM: dts: qcom: msm8974: Use mboxes in smsm node With the smsm bindings and driver finally supporting mboxes, switch to that and stop using apcs as syscon. Signed-off-by: Luca Weiss Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240619-smsm-mbox-dts-v1-1-268ab7eef779@lucaweiss.eu Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi index f9820d996910..15568579459a 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi @@ -294,9 +294,7 @@ #address-cells = <1>; #size-cells = <0>; - qcom,ipc-1 = <&apcs 8 13>; - qcom,ipc-2 = <&apcs 8 9>; - qcom,ipc-3 = <&apcs 8 19>; + mboxes = <0>, <&apcs 13>, <&apcs 9>, <&apcs 19>; apps_smsm: apps@0 { reg = <0>; -- cgit From c04774af7ae392322e204dd20117e6c5162e0fe4 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Thu, 20 Jun 2024 12:16:56 +0200 Subject: arm: dts: mediatek: Declare drive-strength numerically On some devicetrees, the drive-strength property gets assigned a MTK_DRIVE_(x)_mA definition, which matches with (x). For example, MTK_DRIVE_8mA equals to 8 and MTK_DRIVE_30mA equals to 30. Also keeping in mind that the drive-strength property is, by (binding) definition, taking a number in milliamperes unit, change all devicetrees to avoid the usage of any MTK_DRIVE_(x) definition. Reviewed-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20240620101656.1096374-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno --- arch/arm/boot/dts/mediatek/mt2701-evb.dts | 2 +- arch/arm/boot/dts/mediatek/mt7623.dtsi | 18 +++++++++--------- 2 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/mediatek/mt2701-evb.dts b/arch/arm/boot/dts/mediatek/mt2701-evb.dts index 9c7325f18933..4c76366aa938 100644 --- a/arch/arm/boot/dts/mediatek/mt2701-evb.dts +++ b/arch/arm/boot/dts/mediatek/mt2701-evb.dts @@ -231,7 +231,7 @@ , , ; - drive-strength = ; + drive-strength = <4>; bias-pull-up; }; }; diff --git a/arch/arm/boot/dts/mediatek/mt7623.dtsi b/arch/arm/boot/dts/mediatek/mt7623.dtsi index f0b4a09004b3..814586abc297 100644 --- a/arch/arm/boot/dts/mediatek/mt7623.dtsi +++ b/arch/arm/boot/dts/mediatek/mt7623.dtsi @@ -1143,13 +1143,13 @@ , ; input-enable; - drive-strength = ; + drive-strength = <2>; bias-pull-up = ; }; pins-clk { pinmux = ; - drive-strength = ; + drive-strength = <2>; bias-pull-down = ; }; @@ -1167,14 +1167,14 @@ , ; input-enable; - drive-strength = ; + drive-strength = <4>; bias-pull-up = ; }; pins-clk { pinmux = ; bias-pull-down; - drive-strength = ; + drive-strength = <4>; }; pins-wp { @@ -1197,13 +1197,13 @@ , ; input-enable; - drive-strength = ; + drive-strength = <4>; bias-pull-up = ; }; pins-clk { pinmux = ; - drive-strength = ; + drive-strength = <4>; bias-pull-down = ; }; }; @@ -1211,7 +1211,7 @@ nand_pins_default: nanddefault { pins-ale { pinmux = ; - drive-strength = ; + drive-strength = <8>; bias-pull-down = ; }; @@ -1226,13 +1226,13 @@ , ; input-enable; - drive-strength = ; + drive-strength = <8>; bias-pull-up; }; pins-we { pinmux = ; - drive-strength = ; + drive-strength = <8>; bias-pull-up = ; }; }; -- cgit From 99a2b6d16b37258bcbdc2e07eb55e129362a182f Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Thu, 20 Jun 2024 16:11:38 +0200 Subject: ARM: dts: rockchip: enable hdmi_sound and i2s0 for mk808 hdmi Enable the hdmi_sound node and add i2s0 as sound source for mk808 hdmi. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/aa79ff87-ea94-4f6d-a81b-5110724243f4@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3066a-mk808.dts | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts b/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts index 06790f05b395..4de9a45c4883 100644 --- a/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts +++ b/arch/arm/boot/dts/rockchip/rk3066a-mk808.dts @@ -143,6 +143,14 @@ }; }; +&hdmi_sound { + status = "okay"; +}; + +&i2s0 { + status = "okay"; +}; + &mmc0 { bus-width = <4>; cap-mmc-highspeed; -- cgit From 65ec35baeb937e91970c5d88118c5638d8582bb3 Mon Sep 17 00:00:00 2001 From: André Apitzsch Date: Mon, 17 Jun 2024 23:22:27 +0200 Subject: ARM: dts: qcom: msm8926-motorola-peregrine: Add accelerometer, magnetometer, regulator MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the accelerometer, magnetometer and regulator that are present on the Motorola Moto G 4G (2013) device. Signed-off-by: André Apitzsch Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240617-peregrine-v2-1-c8835d2da7af@apitzsch.eu Signed-off-by: Bjorn Andersson --- .../dts/qcom/qcom-msm8926-motorola-peregrine.dts | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts index 0cbe2d2fbbb1..50ae3cfc95bb 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts @@ -68,9 +68,60 @@ }; }; +&blsp1_i2c2 { + clock-frequency = <100000>; + status = "okay"; + + magnetometer@c { + compatible = "asahi-kasei,ak8963"; + reg = <0xc>; + interrupts-extended = <&tlmm 38 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; + vdd-supply = <&pm8226_l19>; + pinctrl-0 = <&mag_int_default &mag_reset_default>; + pinctrl-names = "default"; + }; + + accelerometer@18 { + compatible = "st,lis3dh-accel"; + reg = <0x18>; + interrupts-extended = <&tlmm 1 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&pm8226_l19>; + pinctrl-0 = <&accel_int_default>; + pinctrl-names = "default"; + st,drdy-int-pin = <1>; + }; +}; + &blsp1_i2c3 { + clock-frequency = <400000>; status = "okay"; + regulator@3e { + compatible = "ti,tps65132"; + reg = <0x3e>; + pinctrl-0 = <®_lcd_default>; + pinctrl-names = "default"; + + reg_lcd_pos: outp { + regulator-name = "outp"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-active-discharge = <1>; + regulator-boot-on; + enable-gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>; + }; + + reg_lcd_neg: outn { + regulator-name = "outn"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-active-discharge = <1>; + regulator-boot-on; + enable-gpios = <&tlmm 33 GPIO_ACTIVE_HIGH>; + }; + }; + sensor@48 { compatible = "ti,tmp108"; reg = <0x48>; @@ -278,6 +329,40 @@ status = "okay"; }; +&tlmm { + accel_int_default: accel-int-default-state { + pins = "gpio1"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-disable; + }; + + mag_int_default: mag-int-default-state { + pins = "gpio38"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-disable; + }; + + mag_reset_default: mag-reset-default-state { + pins = "gpio62"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; + + reg_lcd_default: reg-lcd-default-state { + pins = "gpio31", "gpio33"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; +}; + &usb { extcon = <&smbb>; dr_mode = "peripheral"; -- cgit From c9c86387ea1c4034fec34690c7cf2a96f9c21196 Mon Sep 17 00:00:00 2001 From: André Apitzsch Date: Mon, 17 Jun 2024 23:22:28 +0200 Subject: ARM: dts: qcom: msm8926-motorola-peregrine: Update temperature sensor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add alert interrupt for the temperature sensor of Motorola Moto G 4G (2013), although not used by the driver yet. Signed-off-by: André Apitzsch Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240617-peregrine-v2-2-c8835d2da7af@apitzsch.eu Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts index 50ae3cfc95bb..cff9415baa46 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts @@ -125,6 +125,10 @@ sensor@48 { compatible = "ti,tmp108"; reg = <0x48>; + interrupts-extended = <&tlmm 13 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&temp_alert_default>; + pinctrl-names = "default"; + #thermal-sensor-cells = <0>; }; }; @@ -361,6 +365,14 @@ bias-disable; output-high; }; + + temp_alert_default: temp-alert-default-state { + pins = "gpio13"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-disable; + }; }; &usb { -- cgit From fed1c79fc7fe10900d99a79a36e40443f3267ef3 Mon Sep 17 00:00:00 2001 From: André Apitzsch Date: Mon, 17 Jun 2024 23:22:29 +0200 Subject: ARM: dts: qcom: msm8926-motorola-peregrine: Add framebuffer supplies MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add regulators used by the framebuffer of Motorola Moto G 4G (2013). Signed-off-by: André Apitzsch Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240617-peregrine-v2-3-c8835d2da7af@apitzsch.eu Signed-off-by: Bjorn Andersson --- .../dts/qcom/qcom-msm8926-motorola-peregrine.dts | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts b/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts index cff9415baa46..376a33125941 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts +++ b/arch/arm/boot/dts/qcom/qcom-msm8926-motorola-peregrine.dts @@ -29,6 +29,10 @@ height = <1280>; stride = <(720 * 3)>; format = "r8g8b8"; + vsp-supply = <®_lcd_pos>; + vsn-supply = <®_lcd_neg>; + vdd-supply = <&pm8226_l28>; + vddio-supply = <&vddio_disp_vreg>; }; }; @@ -51,6 +55,18 @@ }; }; + vddio_disp_vreg: regulator-vddio-disp { + compatible = "regulator-fixed"; + regulator-name = "vddio_disp"; + gpio = <&tlmm 34 GPIO_ACTIVE_HIGH>; + startup-delay-us = <300>; + enable-active-high; + regulator-boot-on; + vin-supply = <&pm8226_l8>; + pinctrl-0 = <&disp_vddio_default>; + pinctrl-names = "default"; + }; + reserved-memory { #address-cells = <1>; #size-cells = <1>; @@ -342,6 +358,14 @@ output-disable; }; + disp_vddio_default: disp-vddio-default-state { + pins = "gpio34"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-high; + }; + mag_int_default: mag-int-default-state { pins = "gpio38"; function = "gpio"; -- cgit From 93ba8817f2ea13593d1c43e02a819cb7d9be048b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 9 May 2024 12:48:13 +0200 Subject: ARM: dts: ti: align panel timings node name with dtschema DT schema expects panel timings node to follow certain pattern, dtbs_check warnings: am335x-pdu001.dtb: display-timings: '240x320p16' does not match any of the regexes: '^timing', 'pinctrl-[0-9]+' Linux drivers do not care about node name, so this should not have effect on Linux. Acked-by: Bartosz Golaszewski # For DaVinci Link: https://lore.kernel.org/r/20240509104813.216655-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/ti/davinci/da850-evm.dts | 2 +- arch/arm/boot/dts/ti/omap/am335x-guardian.dts | 2 +- arch/arm/boot/dts/ti/omap/am335x-pdu001.dts | 2 +- arch/arm/boot/dts/ti/omap/am335x-pepper.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/ti/davinci/da850-evm.dts b/arch/arm/boot/dts/ti/davinci/da850-evm.dts index 6c5936278e75..1f5cd35f8b74 100644 --- a/arch/arm/boot/dts/ti/davinci/da850-evm.dts +++ b/arch/arm/boot/dts/ti/davinci/da850-evm.dts @@ -65,7 +65,7 @@ display-timings { native-mode = <&timing0>; - timing0: 480x272 { + timing0: timing-480x272 { clock-frequency = <9000000>; hactive = <480>; vactive = <272>; diff --git a/arch/arm/boot/dts/ti/omap/am335x-guardian.dts b/arch/arm/boot/dts/ti/omap/am335x-guardian.dts index 56e5d954a490..4b070e634b28 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-guardian.dts +++ b/arch/arm/boot/dts/ti/omap/am335x-guardian.dts @@ -74,7 +74,7 @@ pinctrl-1 = <&lcd_pins_sleep>; display-timings { - 320x240 { + timing-320x240 { hactive = <320>; vactive = <240>; hback-porch = <68>; diff --git a/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts b/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts index f38f5bff2b96..17574d0d0525 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts +++ b/arch/arm/boot/dts/ti/omap/am335x-pdu001.dts @@ -67,7 +67,7 @@ }; display-timings { - 240x320p16 { + timing-240x320p16 { clock-frequency = <6500000>; hactive = <240>; vactive = <320>; diff --git a/arch/arm/boot/dts/ti/omap/am335x-pepper.dts b/arch/arm/boot/dts/ti/omap/am335x-pepper.dts index d5a4a21889d1..e7d561a527fd 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-pepper.dts +++ b/arch/arm/boot/dts/ti/omap/am335x-pepper.dts @@ -202,7 +202,7 @@ }; display-timings { native-mode = <&timing0>; - timing0: 480x272 { + timing0: timing-480x272 { clock-frequency = <18400000>; hactive = <480>; vactive = <272>; -- cgit From 90b6de4550aac6ac97448d3d26429a0a55dbaa34 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 15 Jun 2024 19:49:04 +0200 Subject: ARM: dts: omap am5729-beagleboneai: drop unneeded ti,enable-id-detection There is a ti,enable-id-detection property in the Extcon Palmas (extcon-palmas), but not in the Extcon USB GPIO binding and driver. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202406152004.F2fNnorG-lkp@intel.com/ Link: https://lore.kernel.org/r/20240615174904.39012-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts b/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts index eb1ec85aba28..e6a18954e449 100644 --- a/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts +++ b/arch/arm/boot/dts/ti/omap/am5729-beagleboneai.dts @@ -196,7 +196,6 @@ extcon_usb1: extcon_usb1 { compatible = "linux,extcon-usb-gpio"; - ti,enable-id-detection; id-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; }; }; -- cgit From e11997428fb3c7efe602eca698c739d186c009cb Mon Sep 17 00:00:00 2001 From: Rafał Miłecki Date: Mon, 20 May 2024 08:02:22 +0200 Subject: ARM: dts: nxp: imx6: convert NVMEM content to layout syntax MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use cleaner (and non-deprecated) bindings syntax. See commit bd912c991d2e ("dt-bindings: nvmem: layouts: add fixed-layout") for details. Signed-off-by: Rafał Miłecki Reviewed-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi | 12 ++++++++---- arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi | 12 ++++++++---- 2 files changed, 16 insertions(+), 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi index 238f3af42822..807f3c95e3ce 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6a.dtsi @@ -22,12 +22,16 @@ compatible = "atmel,24c64"; reg = <0x57>; pagesize = <32>; - #address-cells = <1>; - #size-cells = <1>; vcc-supply = <®_mba6_3p3v>; - mba_mac_address: mac-address@20 { - reg = <0x20 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mba_mac_address: mac-address@20 { + reg = <0x20 0x6>; + }; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi index a587bc88f76f..789733a45b95 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-mba6b.dtsi @@ -32,12 +32,16 @@ compatible = "atmel,24c64"; reg = <0x57>; pagesize = <32>; - #address-cells = <1>; - #size-cells = <1>; vcc-supply = <®_mba6_3p3v>; - mba_mac_address: mac-address@20 { - reg = <0x20 0x6>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mba_mac_address: mac-address@20 { + reg = <0x20 0x6>; + }; }; }; -- cgit From 0df3c7d7a73d75153090637392c0b73a63cdc24a Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:29 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: fix phy-mode The i.MX6 cannot add any RGMII delays. The PHY has to add both the RX and TX delays on the RGMII interface. Fix the interface mode. While at it, use the new phy-connection-type property name. Fixes: 5694eed98cca ("ARM: dts: imx6qdl-kontron-samx6i: move phy reset into phy-node") Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index 85aeebc9485d..d8c1dfb8c9ab 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -259,7 +259,7 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; + phy-connection-type = "rgmii-id"; phy-handle = <ðphy>; mdio { -- cgit From edfea889a049abe80f0d55c0365bf60fbade272f Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:30 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset The PHY reset line is connected to both the SoC (GPIO1_25) and the CPLD. We must not use the GPIO1_25 as it will drive against the output buffer of the CPLD. Instead there is another GPIO (GPIO2_01), an input to the CPLD, which will tell the CPLD to assert the PHY reset line. Fixes: 2a51f9dae13d ("ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module") Fixes: 5694eed98cca ("ARM: dts: imx6qdl-kontron-samx6i: move phy reset into phy-node") Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index d8c1dfb8c9ab..d6c049b9a9c6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -269,7 +269,7 @@ ethphy: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; - reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; reset-assert-us = <1000>; }; }; @@ -516,7 +516,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */ + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 /* RST_GBE0_PHY# */ >; }; -- cgit From b972d6b3b46345023aee56a95df8e2c137aa4ee4 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:31 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: fix board reset On i.MX6 the board is reset by the watchdog. But in turn to do a complete board reset, we have to assert the WDOG_B output which is routed also to the CPLD which then do a complete power-cycle of the board. Fixes: 2125212785c9 ("ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support") Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index d6c049b9a9c6..700780bf64f5 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -817,5 +817,6 @@ /* CPLD is feeded by watchdog (hardwired) */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog1>; + fsl,ext-reset-output; status = "okay"; }; -- cgit From 73243146246f40fe01a6e2c5106ea160976e6f58 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:32 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: cleanup the PMIC node Remove the comment, remove the unused phandle name for the VGEN5 output. VGEN5 is not used at all. Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index 700780bf64f5..8c7f21f986e1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -356,10 +356,6 @@ regulator-always-on; }; - /* - * Per schematics, of all VGEN's, only VGEN5 has some - * usage ... but even that - over DNI resistor - */ vgen1 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; @@ -380,8 +376,7 @@ regulator-max-microvolt = <3300000>; }; - reg_2p5v_s0: vgen5 { - regulator-name = "V_2V5_S0"; + vgen5 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; }; -- cgit From 74e1c956a68a65d642447d852e95b3fbb69bebaa Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:33 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: fix SPI0 chip selects There is a comment in the imx6q variant dtsi claiming that these modules will have one more chip select than the imx6dl variant. This is wrong. Ordinary GPIOs are used for chip selects and both variants of the module share the very same PCB and both have this GPIO routed to the SPI0_CS1# pin of the SMARC connector. Fix it by moving the third chip select description to the common dtsi. Fixes: 2125212785c9 ("ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support") Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- .../arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi | 23 ---------------------- .../boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 5 ++++- 2 files changed, 4 insertions(+), 24 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi index 4d6a0c3e8455..ff062f4fd726 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi @@ -5,31 +5,8 @@ #include "imx6q.dtsi" #include "imx6qdl-kontron-samx6i.dtsi" -#include / { model = "Kontron SMARC sAMX6i Quad/Dual"; compatible = "kontron,imx6q-samx6i", "fsl,imx6q"; }; - -/* Quad/Dual SoMs have 3 chip-select signals */ -&ecspi4 { - cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, - <&gpio3 29 GPIO_ACTIVE_LOW>, - <&gpio3 25 GPIO_ACTIVE_LOW>; -}; - -&pinctrl_ecspi4 { - fsl,pins = < - MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 - MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 - MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 - - /* SPI4_IMX_CS2# - connected to internal flash */ - MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0 - /* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */ - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 - /* SPI4_CS3# - connected to SMARC SPI0_CS1# */ - MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0 - >; -}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index 8c7f21f986e1..4a6ab7e7908a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -244,7 +244,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi4>; cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, - <&gpio3 29 GPIO_ACTIVE_LOW>; + <&gpio3 29 GPIO_ACTIVE_LOW>, + <&gpio3 25 GPIO_ACTIVE_LOW>; status = "okay"; /* default boot source: workaround #1 for errata ERR006282 */ @@ -459,6 +460,8 @@ MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0 /* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 + /* SPI4_CS3# - connected to SMARC SPI0_CS1# */ + MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0 >; }; -- cgit From 2005b36923dc74ac2e69475cdef6673716af96a7 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:34 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: fix product name The correct name of the product is "Kontron SMARC-sAMX6i". See also https://www.kontron.com/en/products/smarc-samx6i/p89810 Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i.dtsi index a864fdbd5f16..5a9b819d7ee8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i.dtsi @@ -7,6 +7,6 @@ #include "imx6qdl-kontron-samx6i.dtsi" / { - model = "Kontron SMARC sAMX6i Dual-Lite/Solo"; + model = "Kontron SMARC-sAMX6i Dual-Lite/Solo"; compatible = "kontron,imx6dl-samx6i", "fsl,imx6dl"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi index ff062f4fd726..e76963436079 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi @@ -7,6 +7,6 @@ #include "imx6qdl-kontron-samx6i.dtsi" / { - model = "Kontron SMARC sAMX6i Quad/Dual"; + model = "Kontron SMARC-sAMX6i Quad/Dual"; compatible = "kontron,imx6q-samx6i", "fsl,imx6q"; }; -- cgit From fa5a518c8078a4b7dc9dcb8b5cf2c9181a3b48c3 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:35 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: always enable eMMC There are no variants of this module without an eMMC. Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index 4a6ab7e7908a..4d3cd338a707 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -800,7 +800,6 @@ /* SDMMC */ &usdhc4 { - /* Internal eMMC, optional on some boards */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc4>; bus-width = <8>; @@ -809,6 +808,7 @@ non-removable; vmmc-supply = <®_3p3v_s0>; vqmmc-supply = <®_1p8v_s0>; + status = "okay"; }; &wdog1 { -- cgit From ad851864b4d29e388368a1fdb662923855f76ad5 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:36 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: add SDIO_PWR_EN support The module can enable/disable the SD card power supply and has it's dedicated pin SDIO_PWR_EN for that reason. This is esp. useful to be able to reset the SD card if it was in an UHS mode. Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- .../arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index 4d3cd338a707..b0fa07ade76d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -61,6 +61,18 @@ vin-supply = <®_smarc_suppy>; }; + reg_sdio: regulator-sdio { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_sdio>; + regulator-name = "V_3V3_SD"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <20000>; + }; + reg_smarc_lcdbklt: regulator-smarc-lcdbklt { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -640,6 +652,12 @@ >; }; + pinctrl_reg_sdio: reg-sdiogrp { + fsl,pins = < + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* SDIO_PWR_EN */ + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 @@ -692,7 +710,6 @@ MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 /* CD */ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0 /* WP */ - MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PWR_EN */ >; }; @@ -795,6 +812,7 @@ pinctrl-0 = <&pinctrl_usdhc3>; cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + vmmc-supply = <®_sdio>; no-1-8-v; }; -- cgit From ffd0b96c3889ea9f65b31e863a76357b6b3a265b Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:37 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: fix node names Rename the nodes according to the schema. In particular, rename the bit bang I2C controller to "i2c-N" and the mux nodes of the audmux to "mux-*". While at it, fix the typo "adu", which should have been "aud". Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index b0fa07ade76d..7eeffd6eb476 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -149,7 +149,7 @@ status = "disabled"; }; - i2c_intern: i2c-gpio-intern { + i2c_intern: i2c-0 { compatible = "i2c-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c_gpio_intern>; @@ -160,7 +160,7 @@ #size-cells = <0>; }; - i2c_lcd: i2c-gpio-lcd { + i2c_lcd: i2c-1 { compatible = "i2c-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c_gpio_lcd>; @@ -172,7 +172,7 @@ status = "disabled"; }; - i2c_cam: i2c-gpio-cam { + i2c_cam: i2c-2 { compatible = "i2c-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c_gpio_cam>; @@ -190,7 +190,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; - audmux_ssi1 { + mux-ssi1 { fsl,audmux-port = ; fsl,port-config = < (IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT3) | @@ -202,7 +202,7 @@ >; }; - audmux_adu3 { + mux-aud3 { fsl,audmux-port = ; fsl,port-config = < IMX_AUDMUX_V2_PTCR_SYN @@ -210,7 +210,7 @@ >; }; - audmux_ssi2 { + mux-ssi2 { fsl,audmux-port = ; fsl,port-config = < (IMX_AUDMUX_V2_PTCR_TFSEL(MX51_AUDMUX_PORT4) | @@ -222,7 +222,7 @@ >; }; - audmux_adu4 { + mux-aud4 { fsl,audmux-port = ; fsl,port-config = < IMX_AUDMUX_V2_PTCR_SYN -- cgit From df35c6e9027cf9affe699e632a48082ab1bbba4c Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:38 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: fix PCIe reset polarity The PCIe reset line is active low. Fix it. Fixes: 2a51f9dae13d ("ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module") Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index 7eeffd6eb476..17abebc006df 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -744,7 +744,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio3 13 GPIO_ACTIVE_LOW>; }; /* LCD_BKLT_PWM */ -- cgit From 62ee222c92aba06f32d2bedace4741a610370ac0 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:39 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: remove wake-up-gpio property Remove the "wake-up-gpio" property within the PCIe controller node. There is no such property, thus just remove it. This will also make the schema validation happy. Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi index 17abebc006df..99b5e78458aa 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi @@ -743,7 +743,6 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; - wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>; reset-gpio = <&gpio3 13 GPIO_ACTIVE_LOW>; }; -- cgit From dac1c5043a083c570592dd048266e9f87b001c4e Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 17 Jun 2024 11:13:41 +0200 Subject: ARM: dts: imx6qdl-kontron-samx6i: add actual device trees For now, there wasn't any in-tree users of the dtsi files for the Kontron SMARC-sAMX6i board. Let's add device trees, for this board on a Kontron SMARC Eval 2.0 Carrier. Signed-off-by: Michael Walle Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/Makefile | 2 + .../dts/nxp/imx/imx6dl-kontron-samx6i-ads2.dts | 12 ++ .../boot/dts/nxp/imx/imx6q-kontron-samx6i-ads2.dts | 12 ++ .../dts/nxp/imx/imx6qdl-kontron-samx6i-ads2.dtsi | 148 +++++++++++++++++++++ 4 files changed, 174 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i-ads2.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i-ads2.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i-ads2.dtsi (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index 231c0d73a53e..92e291603ea1 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -99,6 +99,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \ + imx6dl-kontron-samx6i-ads2.dtb \ imx6dl-lanmcu.dtb \ imx6dl-mamoj.dtb \ imx6dl-mba6a.dtb \ @@ -207,6 +208,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-icore-ofcap10.dtb \ imx6q-icore-ofcap12.dtb \ imx6q-icore-rqs.dtb \ + imx6q-kontron-samx6i-ads2.dtb \ imx6q-kp-tpc.dtb \ imx6q-logicpd.dtb \ imx6q-marsboard.dtb \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i-ads2.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i-ads2.dts new file mode 100644 index 000000000000..6a0c53f23a15 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-kontron-samx6i-ads2.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 + +/dts-v1/; + +#include "imx6dl.dtsi" +#include "imx6qdl-kontron-samx6i.dtsi" +#include "imx6qdl-kontron-samx6i-ads2.dtsi" + +/ { + model = "Kontron SMARC-sAMX6i Dual-Lite/Solo on SMARC Eval 2.0 carrier"; + compatible = "kontron,imx6dl-samx6i-ads2", "kontron,imx6dl-samx6i", "fsl,imx6dl"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i-ads2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i-ads2.dts new file mode 100644 index 000000000000..94c395cc020e --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i-ads2.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-kontron-samx6i.dtsi" +#include "imx6qdl-kontron-samx6i-ads2.dtsi" + +/ { + model = "Kontron SMARC-sAMX6i Quad/Dual on SMARC Eval 2.0 carrier"; + compatible = "kontron,imx6q-samx6i-ads2", "kontron,imx6q-samx6i", "fsl,imx6q"; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i-ads2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i-ads2.dtsi new file mode 100644 index 000000000000..b4a79245b7b6 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i-ads2.dtsi @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree include for the Kontron SMARC-sAMX6i board on a SMARC Eval + * 2.0 carrier (ADS2). + * + */ + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + sound { + #address-cells = <1>; + #size-cells = <0>; + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&dailink_master>; + simple-audio-card,frame-master = <&dailink_master>; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Line", "Line Out Jack", + "Microphone", "Microphone Jack", + "Line", "Line In Jack"; + simple-audio-card,routing = + "Line Out Jack", "LINEOUTR", + "Line Out Jack", "LINEOUTL", + "Headphone Jack", "HPOUTR", + "Headphone Jack", "HPOUTL", + "IN1L", "Line In Jack", + "IN1R", "Line In Jack", + "Microphone Jack", "MICBIAS", + "IN2L", "Microphone Jack", + "IN2R", "Microphone Jack"; + + simple-audio-card,cpu { + sound-dai = <&ssi1>; + }; + + dailink_master: simple-audio-card,codec { + sound-dai = <&wm8904>; + }; + }; + + reg_codec_mic: regulator-codec-mic { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_MIC"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_codec_1p8v: regulator-codec-1p8v { + compatible = "regulator-fixed"; + regulator-name = "V_1V8_S0_CODEC"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&audmux { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + +&can2 { + status = "okay"; +}; + +&ecspi4 { + flash@1 { + compatible = "jedec,spi-nor"; + reg = <1>; + spi-max-frequency = <100000000>; + m25p,fast-read; + }; +}; + +&fec { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + wm8904: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + #sound-dai-cells = <0>; + clocks = <&clks IMX6QDL_CLK_CKO2>; + clock-names = "mclk"; + AVDD-supply = <®_codec_1p8v>; + CPVDD-supply = <®_codec_1p8v>; + DBVDD-supply = <®_codec_1p8v>; + DCVDD-supply = <®_codec_1p8v>; + MICVDD-supply = <®_codec_mic>; + }; +}; + +&i2c3 { + eeprom@57 { + compatible = "atmel,24c64"; + reg = <0x57>; + pagesize = <32>; + }; +}; + +&pcie { + status = "okay"; +}; + +&ssi1 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + status = "okay"; +}; + +&usdhc3 { + status = "okay"; +}; -- cgit From d45db4fcd3ae0d13191c8db00583f0bc49d9795d Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 24 Jun 2024 19:43:29 +0200 Subject: ARM: dts: rockchip: add #sound-dai-cells to hdmi node no rk3036 '#sound-dai-cells' is required to properly interpret the list of DAI specified in the 'sound-dai' property, so add them to the 'hdmi' node for 'rk3036.dtsi'. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/55d302e5-c018-4b93-84c1-8cf75162e939@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3036.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/rockchip/rk3036.dtsi index 04af224005f8..96279d1e02fe 100644 --- a/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -402,6 +402,7 @@ rockchip,grf = <&grf>; pinctrl-names = "default"; pinctrl-0 = <&hdmi_ctl>; + #sound-dai-cells = <0>; status = "disabled"; ports { -- cgit From 313da6f69fa41d044b03f2ea37e56fe49f1e8a42 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Mon, 24 Jun 2024 19:26:48 +0200 Subject: ARM: dts: rockchip: add #sound-dai-cells to hdmi node on rk3128 '#sound-dai-cells' is required to properly interpret the list of DAI specified in the 'sound-dai' property, so add them to the 'hdmi' node for 'rk3128.dtsi'. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/9d0fabb0-70b0-4b4b-ac7c-389b1c7afe20@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3128.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index 5019aae1be32..23e633387c24 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -566,6 +566,7 @@ pinctrl-names = "default"; pinctrl-0 = <&hdmii2c_xfer &hdmi_hpd &hdmi_cec>; power-domains = <&power RK3128_PD_VIO>; + #sound-dai-cells = <0>; status = "disabled"; ports { -- cgit From e00d100a94a15531eec0caf2dddfeec439690097 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Wed, 20 Mar 2024 22:33:49 +0100 Subject: ARM: dts: st: add thermal property on stih410.dtsi and stih418.dtsi "#thermal-sensor-cells" is required and missing in thermal nodes. Add it. Signed-off-by: Raphael Gallais-Pou Reviewed-by: Patrice Chotard Signed-off-by: Patrice Chotard --- arch/arm/boot/dts/st/stih410.dtsi | 1 + arch/arm/boot/dts/st/stih418.dtsi | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stih410.dtsi b/arch/arm/boot/dts/st/stih410.dtsi index 29e95e9d3229..a69231854f78 100644 --- a/arch/arm/boot/dts/st/stih410.dtsi +++ b/arch/arm/boot/dts/st/stih410.dtsi @@ -270,6 +270,7 @@ clock-names = "thermal"; clocks = <&clk_sysin>; interrupts = ; + #thermal-sensor-cells = <0>; }; cec@94a087c { diff --git a/arch/arm/boot/dts/st/stih418.dtsi b/arch/arm/boot/dts/st/stih418.dtsi index b35b9b7a7ccc..0f0db988a907 100644 --- a/arch/arm/boot/dts/st/stih418.dtsi +++ b/arch/arm/boot/dts/st/stih418.dtsi @@ -113,6 +113,7 @@ clock-names = "thermal"; clocks = <&clk_sysin>; interrupts = ; + #thermal-sensor-cells = <0>; }; }; }; -- cgit From b664f6f7a77a41b0e8da7e12534debc94c9d23db Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Tue, 25 Jun 2024 23:32:42 +0200 Subject: ARM: dts: sti: add thermal-zones support on stih418 Add a 'thermal-zones' node for stih418. A thermal-zone needs three components: - thermal sensors, described in an earlier commit[1] - cooling devices, specified for each CPU - a thermal zone, describing the overall behavior. The thermal zone needs references to both CPUs and thermal sensors, which phandle are also added. The thermal management will then be achieved on CPUs using the cpufreq framework. [1] https://lore.kernel.org/lkml/20240320-thermal-v3-2-700296694c4a@gmail.com/ Reviewed-by: Patrice Chotard Signed-off-by: Raphael Gallais-Pou Signed-off-by: Patrice Chotard --- arch/arm/boot/dts/st/stih407-family.dtsi | 6 +++-- arch/arm/boot/dts/st/stih418.dtsi | 41 +++++++++++++++++++++++++++++--- 2 files changed, 42 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stih407-family.dtsi b/arch/arm/boot/dts/st/stih407-family.dtsi index 29302e74aa1d..35a55aef7f4b 100644 --- a/arch/arm/boot/dts/st/stih407-family.dtsi +++ b/arch/arm/boot/dts/st/stih407-family.dtsi @@ -33,7 +33,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; @@ -52,8 +52,9 @@ clock-latency = <100000>; cpu0-supply = <&pwm_regulator>; st,syscfg = <&syscfg_core 0x8e0>; + #cooling-cells = <2>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; @@ -66,6 +67,7 @@ 1200000 0 800000 0 500000 0>; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/boot/dts/st/stih418.dtsi b/arch/arm/boot/dts/st/stih418.dtsi index 0f0db988a907..8fb8b3af5e49 100644 --- a/arch/arm/boot/dts/st/stih418.dtsi +++ b/arch/arm/boot/dts/st/stih418.dtsi @@ -6,23 +6,26 @@ #include "stih418-clock.dtsi" #include "stih407-family.dtsi" #include "stih410-pinctrl.dtsi" +#include / { cpus { #address-cells = <1>; #size-cells = <0>; - cpu@2 { + cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; /* u-boot puts hpen in SBC dmem at 0xa4 offset */ cpu-release-addr = <0x94100A4>; + #cooling-cells = <2>; }; - cpu@3 { + cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; /* u-boot puts hpen in SBC dmem at 0xa4 offset */ cpu-release-addr = <0x94100A4>; + #cooling-cells = <2>; }; }; @@ -44,6 +47,38 @@ reset-names = "global", "port"; }; + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <250>; /* 250ms */ + polling-delay = <1000>; /* 1000ms */ + + thermal-sensors = <&thermal>; + + trips { + cpu_crit: cpu-crit { + temperature = <95000>; /* 95C */ + hysteresis = <2000>; + type = "critical"; + }; + cpu_alert: cpu-alert { + temperature = <85000>; /* 85C */ + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map { + trip = <&cpu_alert>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + soc { rng11: rng@8a8a000 { status = "disabled"; @@ -107,7 +142,7 @@ assigned-clock-rates = <200000000>; }; - thermal@91a0000 { + thermal: thermal@91a0000 { compatible = "st,stih407-thermal"; reg = <0x91a0000 0x28>; clock-names = "thermal"; -- cgit From 2af8d8a583a483530ce3cbb06a953fa5aacdb557 Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 24 Jun 2024 16:53:54 +0200 Subject: ARM: dts: armada-{370-xp,375,38x,39x}: Drop #size-cells from mpic node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The marvell,mpic interrupt controller has no children nodes. Drop the Signed-off-by: Marek Behún Link: https://lore.kernel.org/r/20240624145355.8034-2-kabel@kernel.org Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/marvell/armada-370-xp.dtsi | 1 - arch/arm/boot/dts/marvell/armada-375.dtsi | 1 - arch/arm/boot/dts/marvell/armada-38x.dtsi | 1 - arch/arm/boot/dts/marvell/armada-39x.dtsi | 1 - 4 files changed, 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/armada-370-xp.dtsi b/arch/arm/boot/dts/marvell/armada-370-xp.dtsi index 0b8c2a64b36f..954c891e5aee 100644 --- a/arch/arm/boot/dts/marvell/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/marvell/armada-370-xp.dtsi @@ -168,7 +168,6 @@ mpic: interrupt-controller@20a00 { compatible = "marvell,mpic"; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; }; diff --git a/arch/arm/boot/dts/marvell/armada-375.dtsi b/arch/arm/boot/dts/marvell/armada-375.dtsi index ddc49547d786..99778b4b7e7b 100644 --- a/arch/arm/boot/dts/marvell/armada-375.dtsi +++ b/arch/arm/boot/dts/marvell/armada-375.dtsi @@ -376,7 +376,6 @@ compatible = "marvell,mpic"; reg = <0x20a00 0x2d0>, <0x21070 0x58>; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; interrupts = ; diff --git a/arch/arm/boot/dts/marvell/armada-38x.dtsi b/arch/arm/boot/dts/marvell/armada-38x.dtsi index 446861b6b17b..1181b13deabc 100644 --- a/arch/arm/boot/dts/marvell/armada-38x.dtsi +++ b/arch/arm/boot/dts/marvell/armada-38x.dtsi @@ -408,7 +408,6 @@ compatible = "marvell,mpic"; reg = <0x20a00 0x2d0>, <0x21070 0x58>; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; interrupts = ; diff --git a/arch/arm/boot/dts/marvell/armada-39x.dtsi b/arch/arm/boot/dts/marvell/armada-39x.dtsi index 9d1cac49c022..6d05835efb42 100644 --- a/arch/arm/boot/dts/marvell/armada-39x.dtsi +++ b/arch/arm/boot/dts/marvell/armada-39x.dtsi @@ -268,7 +268,6 @@ compatible = "marvell,mpic"; reg = <0x20a00 0x2d0>, <0x21070 0x58>; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; interrupts = ; -- cgit From b1a4e71d4fc463934b6b00cc3460f93b4816816d Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 27 Jun 2024 21:57:38 +0200 Subject: arm: dts: arm: Drop redundant fixed-factor clocks There's not much reason to have multiple fixed-factor-clock instances which are all the same factor and clock input. Drop the nodes, but keep the labels to minimize the changes and keep some distinction of the different clocks. Signed-off-by: Rob Herring (Arm) Reviewed-by: Linus Walleij Link: https://lore.kernel.org/20240528191536.1444649-1-robh@kernel.org Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20240627-arm-dts-fixes-v1-1-40a2cb7d344b@linaro.org Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/arm/arm-realview-eb.dtsi | 42 +-------------------------- arch/arm/boot/dts/arm/arm-realview-pb1176.dts | 34 +--------------------- arch/arm/boot/dts/arm/arm-realview-pb11mp.dts | 42 +-------------------------- arch/arm/boot/dts/arm/arm-realview-pbx.dtsi | 42 +-------------------------- arch/arm/boot/dts/arm/integratorap.dts | 10 +------ arch/arm/boot/dts/arm/mps2.dtsi | 34 +--------------------- 6 files changed, 6 insertions(+), 198 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/arm/arm-realview-eb.dtsi b/arch/arm/boot/dts/arm/arm-realview-eb.dtsi index fbb2258b451f..ed3ed5a4f0f7 100644 --- a/arch/arm/boot/dts/arm/arm-realview-eb.dtsi +++ b/arch/arm/boot/dts/arm/arm-realview-eb.dtsi @@ -53,7 +53,7 @@ regulator-boot-on; }; - xtal24mhz: xtal24mhz@24M { + xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -67,46 +67,6 @@ clocks = <&xtal24mhz>; }; - mclk: mclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - kmiclk: kmiclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - sspclk: sspclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - uartclk: uartclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - wdogclk: wdogclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - /* FIXME: this actually hangs off the PLL clocks */ pclk: pclk@0 { #clock-cells = <0>; diff --git a/arch/arm/boot/dts/arm/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm/arm-realview-pb1176.dts index d99bac02232b..ab2c9b71da69 100644 --- a/arch/arm/boot/dts/arm/arm-realview-pb1176.dts +++ b/arch/arm/boot/dts/arm/arm-realview-pb1176.dts @@ -63,7 +63,7 @@ regulator-boot-on; }; - xtal24mhz: xtal24mhz@24M { + xtal24mhz: mclk: kmiclk: sspclk: uartclk: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -77,38 +77,6 @@ clocks = <&xtal24mhz>; }; - mclk: mclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - kmiclk: kmiclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - sspclk: sspclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - uartclk: uartclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - /* FIXME: this actually hangs off the PLL clocks */ pclk: pclk@0 { #clock-cells = <0>; diff --git a/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts b/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts index 89103d54ecc1..a4c2d96aa5c8 100644 --- a/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts +++ b/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts @@ -163,7 +163,7 @@ regulator-boot-on; }; - xtal24mhz: xtal24mhz@24M { + xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -183,46 +183,6 @@ clocks = <&xtal24mhz>; }; - mclk: mclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - kmiclk: kmiclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - sspclk: sspclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - uartclk: uartclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - wdogclk: wdogclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - /* FIXME: this actually hangs off the PLL clocks */ pclk: pclk@0 { #clock-cells = <0>; diff --git a/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi b/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi index ec1507c5147c..61dbe041c69b 100644 --- a/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi +++ b/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi @@ -62,7 +62,7 @@ regulator-boot-on; }; - xtal24mhz: xtal24mhz@24M { + xtal24mhz: mclk: kmiclk: sspclk: uartclk: wdogclk: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -82,46 +82,6 @@ clocks = <&xtal24mhz>; }; - mclk: mclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - kmiclk: kmiclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - sspclk: sspclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - uartclk: uartclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - - wdogclk: wdogclk@24M { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - /* FIXME: this actually hangs off the PLL clocks */ pclk: pclk@0 { #clock-cells = <0>; diff --git a/arch/arm/boot/dts/arm/integratorap.dts b/arch/arm/boot/dts/arm/integratorap.dts index d9927d3181dc..27498e0f93f6 100644 --- a/arch/arm/boot/dts/arm/integratorap.dts +++ b/arch/arm/boot/dts/arm/integratorap.dts @@ -57,20 +57,12 @@ }; /* 24 MHz chrystal on the Integrator/AP development board */ - xtal24mhz: xtal24mhz@24M { + xtal24mhz: pclk: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; }; - pclk: pclk@0 { - #clock-cells = <0>; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - clocks = <&xtal24mhz>; - }; - /* The UART clock is 14.74 MHz divided by an ICS525 */ uartclk: uartclk@14.74M { #clock-cells = <0>; diff --git a/arch/arm/boot/dts/arm/mps2.dtsi b/arch/arm/boot/dts/arm/mps2.dtsi index ce308820765b..d930168fbd91 100644 --- a/arch/arm/boot/dts/arm/mps2.dtsi +++ b/arch/arm/boot/dts/arm/mps2.dtsi @@ -78,7 +78,7 @@ clock-frequency = <75000000>; }; - sysclk: clk-sys { + sysclk: spiclcd: spicon: i2cclcd: i2caud: clock-sys { compatible = "fixed-factor-clock"; clocks = <&oscclk0>; #clock-cells = <0>; @@ -102,38 +102,6 @@ clock-mult = <1>; }; - spiclcd: clk-cpiclcd { - compatible = "fixed-factor-clock"; - clocks = <&oscclk0>; - #clock-cells = <0>; - clock-div = <2>; - clock-mult = <1>; - }; - - spicon: clk-spicon { - compatible = "fixed-factor-clock"; - clocks = <&oscclk0>; - #clock-cells = <0>; - clock-div = <2>; - clock-mult = <1>; - }; - - i2cclcd: clk-i2cclcd { - compatible = "fixed-factor-clock"; - clocks = <&oscclk0>; - #clock-cells = <0>; - clock-div = <2>; - clock-mult = <1>; - }; - - i2caud: clk-i2caud { - compatible = "fixed-factor-clock"; - clocks = <&oscclk0>; - #clock-cells = <0>; - clock-div = <2>; - clock-mult = <1>; - }; - soc { compatible = "simple-bus"; ranges; -- cgit From 9d30bd7bdfe373f3e9f7e3e047afd8dd2e585feb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jun 2024 15:57:38 +0200 Subject: ARM: dts: renesas: Add interrupt-names to arch timer nodes Add interrupt-names properties to device nodes that represent ARM architected timers for clarity. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/b964e2f916cc23b6272e158c7b24597c971a82a5.1718890849.git.geert+renesas@glider.be --- arch/arm/boot/dts/renesas/r8a73a4.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7742.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7743.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7744.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7745.dtsi | 1 + arch/arm/boot/dts/renesas/r8a77470.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7790.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7791.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7792.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7793.dtsi | 1 + arch/arm/boot/dts/renesas/r8a7794.dtsi | 1 + arch/arm/boot/dts/renesas/r9a06g032.dtsi | 1 + 12 files changed, 12 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi index 9a2ae282a46b..85261684b5d5 100644 --- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi +++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi @@ -58,6 +58,7 @@ , , ; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; tmu0: timer@e61e0000 { diff --git a/arch/arm/boot/dts/renesas/r8a7742.dtsi b/arch/arm/boot/dts/renesas/r8a7742.dtsi index d55c344c1cd2..3a5d6b434d09 100644 --- a/arch/arm/boot/dts/renesas/r8a7742.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7742.dtsi @@ -1938,6 +1938,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7743.dtsi b/arch/arm/boot/dts/renesas/r8a7743.dtsi index d917c0a971f5..8833898d5557 100644 --- a/arch/arm/boot/dts/renesas/r8a7743.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7743.dtsi @@ -1846,6 +1846,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7744.dtsi b/arch/arm/boot/dts/renesas/r8a7744.dtsi index 754859c38a93..c66c1102fb72 100644 --- a/arch/arm/boot/dts/renesas/r8a7744.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7744.dtsi @@ -1832,6 +1832,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7745.dtsi b/arch/arm/boot/dts/renesas/r8a7745.dtsi index 168298300490..6ddde364782b 100644 --- a/arch/arm/boot/dts/renesas/r8a7745.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7745.dtsi @@ -1636,6 +1636,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a77470.dtsi b/arch/arm/boot/dts/renesas/r8a77470.dtsi index 2375438d83c9..a8a12275c98a 100644 --- a/arch/arm/boot/dts/renesas/r8a77470.dtsi +++ b/arch/arm/boot/dts/renesas/r8a77470.dtsi @@ -1061,6 +1061,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7790.dtsi b/arch/arm/boot/dts/renesas/r8a7790.dtsi index 583b74a9f071..20e4d4c6e748 100644 --- a/arch/arm/boot/dts/renesas/r8a7790.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7790.dtsi @@ -2012,6 +2012,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7791.dtsi b/arch/arm/boot/dts/renesas/r8a7791.dtsi index de08ceb62230..f9c9e1d8f669 100644 --- a/arch/arm/boot/dts/renesas/r8a7791.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7791.dtsi @@ -1938,6 +1938,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7792.dtsi b/arch/arm/boot/dts/renesas/r8a7792.dtsi index 7defeb8e4cd1..dd3bc32668b7 100644 --- a/arch/arm/boot/dts/renesas/r8a7792.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7792.dtsi @@ -990,5 +990,6 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; }; diff --git a/arch/arm/boot/dts/renesas/r8a7793.dtsi b/arch/arm/boot/dts/renesas/r8a7793.dtsi index d32a9d5d3faa..24e66ddf37e0 100644 --- a/arch/arm/boot/dts/renesas/r8a7793.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7793.dtsi @@ -1517,6 +1517,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r8a7794.dtsi b/arch/arm/boot/dts/renesas/r8a7794.dtsi index f37f094cecc8..8e6386a79aea 100644 --- a/arch/arm/boot/dts/renesas/r8a7794.dtsi +++ b/arch/arm/boot/dts/renesas/r8a7794.dtsi @@ -1484,6 +1484,7 @@ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; /* External USB clock - can be overridden by the board */ diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi index 466077a8f0ac..7548291c8d7e 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -484,6 +484,7 @@ , , ; + interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; }; usbphy: usb-phy { -- cgit From 04515932e52cbe517cf0e933fd22b254034874c4 Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 1 Jul 2024 13:30:09 +0200 Subject: ARM: dts: turris-omnia: Add MCU system-controller node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Turris Omnia's MCU provides various features that can be configured over I2C at address 0x2a. Add device-tree node. This does not carry a Fixes tag - we do not want this to get backported to stable kernels for the following reason: U-Boot since v2022.10 inserts a phy-reset-gpio property into the WAN ethernet node pointing to the MCU node if it finds the MCU node with a cznic,turris-omnia-mcu compatible. Thus if this change got backported to a stable kernel, the WAN interface driver would defer probe indefinitely (since it would wait for the turris-omnia-mcu driver which would not be present). Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn Reviewed-by: Andy Shevchenko Reviewed-by: Conor Dooley Acked-by: Bartosz Golaszewski Acked-by: Alexandre Belloni Link: https://lore.kernel.org/r/20240701113010.16447-8-kabel@kernel.org Signed-off-by: Arnd Bergmann --- .../boot/dts/marvell/armada-385-turris-omnia.dts | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 7b755bb4e4e7..59079d63fe27 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -218,7 +218,22 @@ #size-cells = <0>; reg = <0>; - /* STM32F0 command interface at address 0x2a */ + mcu: system-controller@2a { + compatible = "cznic,turris-omnia-mcu"; + reg = <0x2a>; + + pinctrl-names = "default"; + pinctrl-0 = <&mcu_pins>; + + interrupt-parent = <&gpio1>; + interrupts = <11 IRQ_TYPE_NONE>; + + gpio-controller; + #gpio-cells = <3>; + + interrupt-controller; + #interrupt-cells = <2>; + }; led-controller@2b { compatible = "cznic,turris-omnia-leds"; @@ -501,6 +516,11 @@ }; &pinctrl { + mcu_pins: mcu-pins { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pcawan_pins: pcawan-pins { marvell,pins = "mpp46"; marvell,function = "gpio"; -- cgit From ade990619444234d96ee5a79ca6305474c6c687b Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 1 Jul 2024 13:30:10 +0200 Subject: ARM: dts: turris-omnia: Add GPIO key node for front button MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that we have the MCU device-tree node, which acts as a GPIO controller, add GPIO key node for the front button. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn Reviewed-by: Andy Shevchenko Reviewed-by: Conor Dooley Acked-by: Bartosz Golaszewski Acked-by: Alexandre Belloni Link: https://lore.kernel.org/r/20240701113010.16447-9-kabel@kernel.org Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 59079d63fe27..43202890c959 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -112,6 +112,19 @@ status = "disabled"; }; + gpio-keys { + compatible = "gpio-keys"; + + front-button { + label = "Front Button"; + linux,code = ; + linux,can-disable; + gpios = <&mcu 0 12 GPIO_ACTIVE_HIGH>; + /* debouncing is done by the microcontroller */ + debounce-interval = <0>; + }; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,name = "SPDIF"; -- cgit From 04f08ef291d4b8d76f8d198bf2929ad43b96eecf Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Sun, 30 Jun 2024 00:15:35 +0200 Subject: arm/arm64: dts: arm: Use generic clock and regulator nodenames With the recent defining of preferred naming for fixed clock and regulator nodes, convert the Arm Ltd. boards to use the preferred names. In the cases which had a unit-address, warnings about missing "reg" property are fixed. Signed-off-by: Rob Herring (Arm) Reviewed-by: Linus Walleij Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/20240528191536.1444649-2-robh@kernel.org Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20240630-arm-dts-fixes-2-v1-1-a32ba57e5b1d@linaro.org Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi | 2 +- arch/arm/boot/dts/arm/arm-realview-eb.dtsi | 6 +++--- arch/arm/boot/dts/arm/arm-realview-pb1176.dts | 4 ++-- arch/arm/boot/dts/arm/arm-realview-pb11mp.dts | 6 +++--- arch/arm/boot/dts/arm/arm-realview-pbx.dtsi | 6 +++--- arch/arm/boot/dts/arm/integratorap-im-pd1.dts | 4 ++-- arch/arm/boot/dts/arm/integratorap.dts | 4 ++-- arch/arm/boot/dts/arm/integratorcp.dts | 14 +++++++------- arch/arm/boot/dts/arm/mps2.dtsi | 14 +++++++------- arch/arm/boot/dts/arm/versatile-ab.dts | 8 ++++---- arch/arm/boot/dts/arm/vexpress-v2m-rs1.dtsi | 8 ++++---- arch/arm/boot/dts/arm/vexpress-v2m.dtsi | 16 ++++++++-------- arch/arm/boot/dts/arm/vexpress-v2p-ca15-tc1.dts | 14 +++++++------- arch/arm/boot/dts/arm/vexpress-v2p-ca15_a7.dts | 22 +++++++++++----------- arch/arm/boot/dts/arm/vexpress-v2p-ca5s.dts | 12 ++++++------ arch/arm/boot/dts/arm/vexpress-v2p-ca9.dts | 18 +++++++++--------- 16 files changed, 79 insertions(+), 79 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi b/arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi index a79e1d1d30a7..7f62aef9ca8a 100644 --- a/arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi +++ b/arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi @@ -22,7 +22,7 @@ / { /* Introduce a fixed regulator for the new ethernet controller */ - veth: fixedregulator@0 { + veth: regulator-veth { compatible = "regulator-fixed"; regulator-name = "veth"; regulator-min-microvolt = <3300000>; diff --git a/arch/arm/boot/dts/arm/arm-realview-eb.dtsi b/arch/arm/boot/dts/arm/arm-realview-eb.dtsi index ed3ed5a4f0f7..16f784da5a55 100644 --- a/arch/arm/boot/dts/arm/arm-realview-eb.dtsi +++ b/arch/arm/boot/dts/arm/arm-realview-eb.dtsi @@ -45,7 +45,7 @@ }; /* The voltage to the MMC card is hardwired at 3.3V */ - vmmc: fixedregulator@0 { + vmmc: regulator-vmmc { compatible = "regulator-fixed"; regulator-name = "vmmc"; regulator-min-microvolt = <3300000>; @@ -59,7 +59,7 @@ clock-frequency = <24000000>; }; - timclk: timclk@1M { + timclk: clock-1000000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <24>; @@ -68,7 +68,7 @@ }; /* FIXME: this actually hangs off the PLL clocks */ - pclk: pclk@0 { + pclk: clock-pclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <0>; diff --git a/arch/arm/boot/dts/arm/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm/arm-realview-pb1176.dts index ab2c9b71da69..b9b10cbd65aa 100644 --- a/arch/arm/boot/dts/arm/arm-realview-pb1176.dts +++ b/arch/arm/boot/dts/arm/arm-realview-pb1176.dts @@ -69,7 +69,7 @@ clock-frequency = <24000000>; }; - timclk: timclk@1M { + timclk: clock-1000000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <24>; @@ -78,7 +78,7 @@ }; /* FIXME: this actually hangs off the PLL clocks */ - pclk: pclk@0 { + pclk: clock-pclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <0>; diff --git a/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts b/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts index a4c2d96aa5c8..ce35748f3d25 100644 --- a/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts +++ b/arch/arm/boot/dts/arm/arm-realview-pb11mp.dts @@ -169,13 +169,13 @@ clock-frequency = <24000000>; }; - refclk32khz: refclk32khz { + refclk32khz: clock-32768 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; }; - timclk: timclk@1M { + timclk: clock-1000000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <24>; @@ -184,7 +184,7 @@ }; /* FIXME: this actually hangs off the PLL clocks */ - pclk: pclk@0 { + pclk: clock-pclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <0>; diff --git a/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi b/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi index 61dbe041c69b..e625403a9456 100644 --- a/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi +++ b/arch/arm/boot/dts/arm/arm-realview-pbx.dtsi @@ -68,13 +68,13 @@ clock-frequency = <24000000>; }; - refclk32khz: refclk32khz { + refclk32khz: clock-32768 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; - timclk: timclk@1M { + timclk: clock-1000000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <24>; @@ -83,7 +83,7 @@ }; /* FIXME: this actually hangs off the PLL clocks */ - pclk: pclk@0 { + pclk: clock-pclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <0>; diff --git a/arch/arm/boot/dts/arm/integratorap-im-pd1.dts b/arch/arm/boot/dts/arm/integratorap-im-pd1.dts index 367850ea0912..db13e09f2fab 100644 --- a/arch/arm/boot/dts/arm/integratorap-im-pd1.dts +++ b/arch/arm/boot/dts/arm/integratorap-im-pd1.dts @@ -54,7 +54,7 @@ }; /* Also used for the Smart Card Interface SCI */ - impd1_uartclk: clock@1_4 { + impd1_uartclk: clock-uart { compatible = "fixed-factor-clock"; #clock-cells = <0>; clock-div = <4>; @@ -64,7 +64,7 @@ }; /* For the SSP the clock is divided by 64 */ - impd1_sspclk: clock@1_64 { + impd1_sspclk: clock-ssp { compatible = "fixed-factor-clock"; #clock-cells = <0>; clock-div = <64>; diff --git a/arch/arm/boot/dts/arm/integratorap.dts b/arch/arm/boot/dts/arm/integratorap.dts index 27498e0f93f6..9b6a1dbaf265 100644 --- a/arch/arm/boot/dts/arm/integratorap.dts +++ b/arch/arm/boot/dts/arm/integratorap.dts @@ -64,7 +64,7 @@ }; /* The UART clock is 14.74 MHz divided by an ICS525 */ - uartclk: uartclk@14.74M { + uartclk: clock-14745600 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <14745600>; @@ -73,7 +73,7 @@ core-module@10000000 { /* 24 MHz chrystal on the core module */ - cm24mhz: cm24mhz@24M { + cm24mhz: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; diff --git a/arch/arm/boot/dts/arm/integratorcp.dts b/arch/arm/boot/dts/arm/integratorcp.dts index c011333eb165..8ad1a8957ace 100644 --- a/arch/arm/boot/dts/arm/integratorcp.dts +++ b/arch/arm/boot/dts/arm/integratorcp.dts @@ -47,14 +47,14 @@ */ /* The codec chrystal operates at 24.576 MHz */ - xtal_codec: xtal24.576@24.576M { + xtal_codec: clock-24576000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24576000>; }; /* The chrystal is divided by 2 by the codec for the AACI bit clock */ - aaci_bitclk: aaci_bitclk@12.288M { + aaci_bitclk: clock-12288000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <2>; @@ -63,21 +63,21 @@ }; /* This is a 25MHz chrystal on the base board */ - xtal25mhz: xtal25mhz@25M { + xtal25mhz: clock-25000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <25000000>; }; /* The UART clock is 14.74 MHz divided from 25MHz by an ICS525 */ - uartclk: uartclk@14.74M { + uartclk: clock-14745600 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <14745600>; }; /* Actually sysclk I think */ - pclk: pclk@0 { + pclk: clock-pclk { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <0>; @@ -85,7 +85,7 @@ core-module@10000000 { /* 24 MHz chrystal on the core module */ - cm24mhz: cm24mhz@24M { + cm24mhz: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -131,7 +131,7 @@ }; /* The timer clock is the 24 MHz oscillator divided to 1MHz */ - timclk: timclk@1M { + timclk: clock-1000000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <24>; diff --git a/arch/arm/boot/dts/arm/mps2.dtsi b/arch/arm/boot/dts/arm/mps2.dtsi index d930168fbd91..e240bc8aa605 100644 --- a/arch/arm/boot/dts/arm/mps2.dtsi +++ b/arch/arm/boot/dts/arm/mps2.dtsi @@ -48,31 +48,31 @@ #address-cells = <1>; #size-cells = <1>; - oscclk0: clk-osc0 { + oscclk0: clock-50000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; }; - oscclk1: clk-osc1 { + oscclk1: clock-24576000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24576000>; }; - oscclk2: clk-osc2 { + oscclk2: clock-25000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; - cfgclk: clk-cfg { + cfgclk: clock-5000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <5000000>; }; - spicfgclk: clk-spicfg { + spicfgclk: clock-75000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <75000000>; @@ -86,7 +86,7 @@ clock-mult = <1>; }; - audmclk: clk-audm { + audmclk: clk-12388000 { compatible = "fixed-factor-clock"; clocks = <&oscclk1>; #clock-cells = <0>; @@ -94,7 +94,7 @@ clock-mult = <1>; }; - audsclk: clk-auds { + audsclk: clk-3072000 { compatible = "fixed-factor-clock"; clocks = <&oscclk1>; #clock-cells = <0>; diff --git a/arch/arm/boot/dts/arm/versatile-ab.dts b/arch/arm/boot/dts/arm/versatile-ab.dts index de45aa99e260..6fe6b49f5d8e 100644 --- a/arch/arm/boot/dts/arm/versatile-ab.dts +++ b/arch/arm/boot/dts/arm/versatile-ab.dts @@ -24,7 +24,7 @@ reg = <0x0 0x08000000>; }; - xtal24mhz: xtal24mhz@24M { + xtal24mhz: clock-24000000 { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <24000000>; @@ -142,14 +142,14 @@ }; /* OSC1 on AB, OSC4 on PB */ - osc1: cm_aux_osc@24M { + osc1: clock-osc { #clock-cells = <0>; compatible = "arm,versatile-cm-auxosc"; clocks = <&xtal24mhz>; }; /* The timer clock is the 24 MHz oscillator divided to 1MHz */ - timclk: timclk@1M { + timclk: clock-1000000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <24>; @@ -157,7 +157,7 @@ clocks = <&xtal24mhz>; }; - pclk: pclk@24M { + pclk: clock-24000000 { #clock-cells = <0>; compatible = "fixed-factor-clock"; clock-div = <1>; diff --git a/arch/arm/boot/dts/arm/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/arm/vexpress-v2m-rs1.dtsi index 8af4b77fe655..158b3923eae3 100644 --- a/arch/arm/boot/dts/arm/vexpress-v2m-rs1.dtsi +++ b/arch/arm/boot/dts/arm/vexpress-v2m-rs1.dtsi @@ -20,7 +20,7 @@ #include / { - v2m_fixed_3v3: fixed-regulator-0 { + v2m_fixed_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3V3"; regulator-min-microvolt = <3300000>; @@ -28,21 +28,21 @@ regulator-always-on; }; - v2m_clk24mhz: clk24mhz { + v2m_clk24mhz: clock-24000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; clock-output-names = "v2m:clk24mhz"; }; - v2m_refclk1mhz: refclk1mhz { + v2m_refclk1mhz: clock-1000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; clock-output-names = "v2m:refclk1mhz"; }; - v2m_refclk32khz: refclk32khz { + v2m_refclk32khz: clock-32768 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; diff --git a/arch/arm/boot/dts/arm/vexpress-v2m.dtsi b/arch/arm/boot/dts/arm/vexpress-v2m.dtsi index c5e92f6d2fcd..be03f2a8a57a 100644 --- a/arch/arm/boot/dts/arm/vexpress-v2m.dtsi +++ b/arch/arm/boot/dts/arm/vexpress-v2m.dtsi @@ -351,7 +351,7 @@ }; }; - v2m_fixed_3v3: fixed-regulator-0 { + v2m_fixed_3v3: regulator-3v3 { compatible = "regulator-fixed"; regulator-name = "3V3"; regulator-min-microvolt = <3300000>; @@ -359,21 +359,21 @@ regulator-always-on; }; - v2m_clk24mhz: clk24mhz { + v2m_clk24mhz: clock-24000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; clock-output-names = "v2m:clk24mhz"; }; - v2m_refclk1mhz: refclk1mhz { + v2m_refclk1mhz: clock-1000000 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <1000000>; clock-output-names = "v2m:refclk1mhz"; }; - v2m_refclk32khz: refclk32khz { + v2m_refclk32khz: clock-32768 { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32768>; @@ -436,7 +436,7 @@ compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - oscclk0 { + clock-controller-0 { /* MCC static memory clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; @@ -445,7 +445,7 @@ clock-output-names = "v2m:oscclk0"; }; - v2m_oscclk1: oscclk1 { + v2m_oscclk1: clock-controller-1 { /* CLCD clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 1>; @@ -454,7 +454,7 @@ clock-output-names = "v2m:oscclk1"; }; - v2m_oscclk2: oscclk2 { + v2m_oscclk2: clock-controller-2 { /* IO FPGA peripheral clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 2>; @@ -463,7 +463,7 @@ clock-output-names = "v2m:oscclk2"; }; - volt-vio { + regulator-vio { /* Logic level voltage */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 0>; diff --git a/arch/arm/boot/dts/arm/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/arm/vexpress-v2p-ca15-tc1.dts index 679537e17ff5..5a91e936edef 100644 --- a/arch/arm/boot/dts/arm/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/arm/vexpress-v2p-ca15-tc1.dts @@ -142,7 +142,7 @@ compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - oscclk0 { + clock-controller-0 { /* CPU PLL reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; @@ -151,7 +151,7 @@ clock-output-names = "oscclk0"; }; - oscclk4 { + clock-controller-4 { /* Multiplexed AXI master clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 4>; @@ -160,7 +160,7 @@ clock-output-names = "oscclk4"; }; - hdlcd_clk: oscclk5 { + hdlcd_clk: clock-controller-5 { /* HDLCD PLL reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 5>; @@ -169,7 +169,7 @@ clock-output-names = "oscclk5"; }; - smbclk: oscclk6 { + smbclk: clock-controller-6 { /* SMB clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 6>; @@ -178,7 +178,7 @@ clock-output-names = "oscclk6"; }; - sys_pll: oscclk7 { + sys_pll: clock-controller-7 { /* SYS PLL reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 7>; @@ -187,7 +187,7 @@ clock-output-names = "oscclk7"; }; - oscclk8 { + clock-controller-8 { /* DDR2 PLL reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 8>; @@ -196,7 +196,7 @@ clock-output-names = "oscclk8"; }; - volt-cores { + regulator-cores { /* CPU core voltage */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 0>; diff --git a/arch/arm/boot/dts/arm/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/arm/vexpress-v2p-ca15_a7.dts index 511e87cc2bc5..6ef23c53d2d8 100644 --- a/arch/arm/boot/dts/arm/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/arm/vexpress-v2p-ca15_a7.dts @@ -253,7 +253,7 @@ compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - oscclk0 { + clock-controller-0 { /* A15 PLL 0 reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; @@ -262,7 +262,7 @@ clock-output-names = "oscclk0"; }; - oscclk1 { + clock-controller-1 { /* A15 PLL 1 reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 1>; @@ -271,7 +271,7 @@ clock-output-names = "oscclk1"; }; - oscclk2 { + clock-controller-2 { /* A7 PLL 0 reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 2>; @@ -280,7 +280,7 @@ clock-output-names = "oscclk2"; }; - oscclk3 { + clock-controller-3 { /* A7 PLL 1 reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 3>; @@ -289,7 +289,7 @@ clock-output-names = "oscclk3"; }; - oscclk4 { + clock-controller-4 { /* External AXI master clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 4>; @@ -298,7 +298,7 @@ clock-output-names = "oscclk4"; }; - hdlcd_clk: oscclk5 { + hdlcd_clk: clock-controller-5 { /* HDLCD PLL reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 5>; @@ -307,7 +307,7 @@ clock-output-names = "oscclk5"; }; - smbclk: oscclk6 { + smbclk: clock-controller-6 { /* Static memory controller clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 6>; @@ -316,7 +316,7 @@ clock-output-names = "oscclk6"; }; - oscclk7 { + clock-controller-7 { /* SYS PLL reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 7>; @@ -325,7 +325,7 @@ clock-output-names = "oscclk7"; }; - oscclk8 { + clock-controller-8 { /* DDR2 PLL reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 8>; @@ -334,7 +334,7 @@ clock-output-names = "oscclk8"; }; - volt-a15 { + regulator-a15 { /* A15 CPU core voltage */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 0>; @@ -345,7 +345,7 @@ label = "A15 Vcore"; }; - volt-a7 { + regulator-a7 { /* A7 CPU core voltage */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 1>; diff --git a/arch/arm/boot/dts/arm/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/arm/vexpress-v2p-ca5s.dts index ff1f9a1bcfcf..e3896253f33e 100644 --- a/arch/arm/boot/dts/arm/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/arm/vexpress-v2p-ca5s.dts @@ -145,7 +145,7 @@ compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - cpu_clk: oscclk0 { + cpu_clk: clock-controller-0 { /* CPU and internal AXI reference clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; @@ -154,7 +154,7 @@ clock-output-names = "oscclk0"; }; - axi_clk: oscclk1 { + axi_clk: clock-controller-1 { /* Multiplexed AXI master clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 1>; @@ -163,7 +163,7 @@ clock-output-names = "oscclk1"; }; - oscclk2 { + clock-controller-2 { /* DDR2 */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 2>; @@ -172,7 +172,7 @@ clock-output-names = "oscclk2"; }; - hdlcd_clk: oscclk3 { + hdlcd_clk: clock-controller-3 { /* HDLCD */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 3>; @@ -181,7 +181,7 @@ clock-output-names = "oscclk3"; }; - oscclk4 { + clock-controller-4 { /* Test chip gate configuration */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 4>; @@ -190,7 +190,7 @@ clock-output-names = "oscclk4"; }; - smbclk: oscclk5 { + smbclk: clock-controller-5 { /* SMB clock */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 5>; diff --git a/arch/arm/boot/dts/arm/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/arm/vexpress-v2p-ca9.dts index 8bf35666412b..43a5a4ab6ff0 100644 --- a/arch/arm/boot/dts/arm/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/arm/vexpress-v2p-ca9.dts @@ -187,7 +187,7 @@ compatible = "arm,vexpress,config-bus"; arm,vexpress,config-bridge = <&v2m_sysreg>; - oscclk0: extsaxiclk { + oscclk0: clock-controller-0 { /* ACLK clock to the AXI master port on the test chip */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 0>; @@ -196,7 +196,7 @@ clock-output-names = "extsaxiclk"; }; - oscclk1: clcdclk { + oscclk1: clock-controller-1 { /* Reference clock for the CLCD */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 1>; @@ -205,7 +205,7 @@ clock-output-names = "clcdclk"; }; - smbclk: oscclk2: tcrefclk { + smbclk: oscclk2: clock-controller-2 { /* Reference clock for the test chip internal PLLs */ compatible = "arm,vexpress-osc"; arm,vexpress-sysreg,func = <1 2>; @@ -214,7 +214,7 @@ clock-output-names = "tcrefclk"; }; - volt-vd10 { + regulator-vd10 { /* Test Chip internal logic voltage */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 0>; @@ -223,7 +223,7 @@ label = "VD10"; }; - volt-vd10-s2 { + regulator-vd10-s2 { /* PL310, L2 cache, RAM cell supply (not PL310 logic) */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 1>; @@ -232,7 +232,7 @@ label = "VD10_S2"; }; - volt-vd10-s3 { + regulator-vd10-s3 { /* Cortex-A9 system supply, Cores, MPEs, SCU and PL310 logic */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 2>; @@ -241,7 +241,7 @@ label = "VD10_S3"; }; - volt-vcc1v8 { + regulator-vcc1v8 { /* DDR2 SDRAM and Test Chip DDR2 I/O supply */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 3>; @@ -250,7 +250,7 @@ label = "VCC1V8"; }; - volt-ddr2vtt { + regulator-ddr2vtt { /* DDR2 SDRAM VTT termination voltage */ compatible = "arm,vexpress-volt"; arm,vexpress-sysreg,func = <2 4>; @@ -259,7 +259,7 @@ label = "DDR2VTT"; }; - volt-vcc3v3 { + regulator-vcc3v3 { /* Local board supply for miscellaneous logic external to the Test Chip */ arm,vexpress-sysreg,func = <2 5>; compatible = "arm,vexpress-volt"; -- cgit From 2a89f2b7e4b98ff684eff2950cbe62d8dd47da72 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 08:22:53 +0200 Subject: ARM: dts: qcom: apq8064: drop incorrect ranges from QFPROM There is no direct mapping between QFPROM children and parent/SoC MMIO bus, so 'ranges' property is not correct. Pointed by dtbs_check: qcom-apq8064-cm-qs600.dtb: efuse@700000: Unevaluated properties are not allowed ('ranges' was unexpected) Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202406292139.yqPYyUfi-lkp@intel.com/ Signed-off-by: Krzysztof Kozlowski Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240701062253.18149-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index d73ea1434b36..769e151747c3 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -671,7 +671,7 @@ reg = <0x00700000 0x1000>; #address-cells = <1>; #size-cells = <1>; - ranges; + tsens_calib: calib@404 { reg = <0x404 0x10>; }; -- cgit From 2a5454d0fe5684855581f8ad958afbcdc476fd64 Mon Sep 17 00:00:00 2001 From: Raymond Hackley Date: Sun, 30 Jun 2024 13:29:41 +0000 Subject: ARM: dts: qcom: qcom-msm8226-samsung-ms013g: Add initial device tree Samsung Galaxy Grand 2 is a phone based on MSM8226. It's similar to the other Samsung devices based on MSM8226 with only a few minor differences. The device trees contain initial support with: - GPIO keys - Regulator haptic - SDHCI (internal and external storage) - UART (on USB connector via the TI TSU6721 MUIC) - Regulators - Touchscreen - Accelerometer Signed-off-by: Raymond Hackley Reviewed-by: Luca Weiss Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20240630132859.2885-3-raymondhackley@protonmail.com Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/Makefile | 1 + .../boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts | 386 +++++++++++++++++++++ 2 files changed, 387 insertions(+) create mode 100644 arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makefile index ccd4ce6353df..f06c6d425e91 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8226-microsoft-dempsey.dtb \ qcom-msm8226-microsoft-makepeace.dtb \ qcom-msm8226-microsoft-moneypenny.dtb \ + qcom-msm8226-samsung-ms013g.dtb \ qcom-msm8226-samsung-s3ve3g.dtb \ qcom-msm8660-surf.dtb \ qcom-msm8916-samsung-e5.dtb \ diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts b/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts new file mode 100644 index 000000000000..2ecc5983d365 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-msm8226-samsung-ms013g.dts @@ -0,0 +1,386 @@ +// SPDX-License-Identifier: BSD-3-Clause + +/dts-v1/; + +#include "qcom-msm8226.dtsi" +#include "pm8226.dtsi" + +/delete-node/ &smem_region; + +/ { + model = "Samsung Galaxy Grand 2"; + compatible = "samsung,ms013g", "qcom,msm8226"; + chassis-type = "handset"; + + aliases { + mmc0 = &sdhc_1; /* SDC1 eMMC slot */ + mmc1 = &sdhc_2; /* SDC2 SD card slot */ + serial0 = &blsp1_uart3; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-hall-sensor { + compatible = "gpio-keys"; + + pinctrl-0 = <&gpio_hall_sensor_default>; + pinctrl-names = "default"; + + label = "GPIO Hall Effect Sensor"; + + event-hall-sensor { + label = "Hall Effect Sensor"; + gpios = <&tlmm 50 GPIO_ACTIVE_LOW>; + linux,input-type = ; + linux,code = ; + linux,can-disable; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + pinctrl-0 = <&gpio_keys_default>; + pinctrl-names = "default"; + + label = "GPIO Buttons"; + + button-volume-up { + label = "Volume Up"; + gpios = <&tlmm 106 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + button-volume-down { + label = "Volume Down"; + gpios = <&tlmm 107 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + button-home { + label = "Home Key"; + gpios = <&tlmm 108 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + reg_motor_vdd: regulator-motor-vdd { + compatible = "regulator-fixed"; + regulator-name = "motor_vdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 111 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&motor_en_default>; + pinctrl-names = "default"; + }; + + reg_vdd_tsp_a: regulator-vdd-tsp-a { + compatible = "regulator-fixed"; + regulator-name = "tsp_3p3v"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&tsp_en_default>; + pinctrl-names = "default"; + }; + + reserved-memory { + smem_region: smem@fa00000 { + reg = <0x0fa00000 0x100000>; + no-map; + }; + }; + + vibrator { + compatible = "regulator-haptic"; + haptic-supply = <®_motor_vdd>; + min-microvolt = <3300000>; + max-microvolt = <3300000>; + }; +}; + +&blsp1_i2c2 { + status = "okay"; + + accelerometer@18 { + compatible = "bosch,bma255"; + reg = <0x18>; + interrupts-extended = <&tlmm 64 IRQ_TYPE_EDGE_RISING>; + + vdd-supply = <&pm8226_l19>; + vddio-supply = <&pm8226_lvs1>; + + pinctrl-0 = <&accel_int_default>; + pinctrl-names = "default"; + + mount-matrix = "0", "1", "0", + "-1", "0", "0", + "0", "0", "-1"; + }; +}; + +&blsp1_i2c5 { + status = "okay"; + + touchscreen@20 { + compatible = "zinitix,bt541"; + + reg = <0x20>; + interrupts-extended = <&tlmm 17 IRQ_TYPE_EDGE_FALLING>; + + touchscreen-size-x = <720>; + touchscreen-size-y = <1280>; + + vcca-supply = <®_vdd_tsp_a>; + vdd-supply = <&pm8226_lvs1>; + + pinctrl-0 = <&tsp_int_default>; + pinctrl-names = "default"; + }; +}; + +&blsp1_uart3 { + status = "okay"; +}; + +&rpm_requests { + regulators { + compatible = "qcom,rpm-pm8226-regulators"; + + pm8226_s3: s3 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_s4: s4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2200000>; + }; + + pm8226_s5: s5 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1150000>; + }; + + pm8226_l1: l1 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1225000>; + }; + + pm8226_l2: l2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l3: l3 { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1337500>; + }; + + pm8226_l4: l4 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l5: l5 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + pm8226_l6: l6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-allow-set-load; + regulator-always-on; + }; + + pm8226_l7: l7 { + regulator-min-microvolt = <1850000>; + regulator-max-microvolt = <1850000>; + }; + + pm8226_l8: l8 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l9: l9 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l10: l10 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l12: l12 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + pm8226_l14: l14 { + regulator-min-microvolt = <2750000>; + regulator-max-microvolt = <2750000>; + }; + + pm8226_l15: l15 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + + pm8226_l16: l16 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3350000>; + }; + + pm8226_l17: l17 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + + regulator-system-load = <200000>; + regulator-allow-set-load; + regulator-always-on; + }; + + pm8226_l18: l18 { + regulator-min-microvolt = <2950000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l19: l19 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3000000>; + }; + + pm8226_l20: l20 { + regulator-min-microvolt = <3075000>; + regulator-max-microvolt = <3075000>; + }; + + pm8226_l21: l21 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + regulator-allow-set-load; + }; + + pm8226_l22: l22 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_l23: l23 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + pm8226_l24: l24 { + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1350000>; + }; + + pm8226_l25: l25 { + regulator-min-microvolt = <1775000>; + regulator-max-microvolt = <2125000>; + }; + + pm8226_l26: l26 { + regulator-min-microvolt = <1225000>; + regulator-max-microvolt = <1300000>; + }; + + pm8226_l27: l27 { + regulator-min-microvolt = <2050000>; + regulator-max-microvolt = <2050000>; + }; + + pm8226_l28: l28 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2950000>; + }; + + pm8226_lvs1: lvs1 {}; + }; +}; + +&sdhc_1 { + vmmc-supply = <&pm8226_l17>; + vqmmc-supply = <&pm8226_l6>; + + bus-width = <8>; + non-removable; + + status = "okay"; +}; + +&sdhc_2 { + vmmc-supply = <&pm8226_l18>; + vqmmc-supply = <&pm8226_l21>; + + bus-width = <4>; + cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&sdhc2_default_state &sdhc2_cd_default>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&tlmm { + accel_int_default: accel-int-default-state { + pins = "gpio64"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + gpio_hall_sensor_default: gpio-hall-sensor-default-state { + pins = "gpio50"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + gpio_keys_default: gpio-keys-default-state { + pins = "gpio106", "gpio107", "gpio108"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + motor_en_default: motor-en-default-state { + pins = "gpio111"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + sdhc2_cd_default: sdhc2-cd-default-state { + pins = "gpio38"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_en_default: tsp-en-default-state { + pins = "gpio31"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + tsp_int_default: tsp-int-default-state { + pins = "gpio17"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; -- cgit From 9c29e5d7a2d1d91c29976c0c8aa7f42780e4a254 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 30 Jun 2024 05:48:41 +0200 Subject: ARM: dts: rockchip: Drop ethernet-phy-ieee802.3-c22 from PHY compatible string on edgeble-neu2 The rtl82xx DT bindings do not require ethernet-phy-ieee802.3-c22 as the fallback compatible string. There are fewer users of the Realtek PHY compatible string with fallback compatible string than there are users without fallback compatible string, so drop the fallback compatible string from the few remaining users: $ git grep -ho ethernet-phy-id001c....... | sort | uniq -c 1 ethernet-phy-id001c.c816", 2 ethernet-phy-id001c.c915", 2 ethernet-phy-id001c.c915"; 5 ethernet-phy-id001c.c916", 13 ethernet-phy-id001c.c916"; Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202406290316.YvZdvLxu-lkp@intel.com/ Signed-off-by: Marek Vasut Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20240630034910.173552-1-marex@denx.de Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts index 0c2396b8f8db..7707d1b01440 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts +++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2-io.dts @@ -69,8 +69,7 @@ &mdio { phy: ethernet-phy@0 { - compatible = "ethernet-phy-id001c.c916", - "ethernet-phy-ieee802.3-c22"; + compatible = "ethernet-phy-id001c.c916"; reg = <0x0>; pinctrl-names = "default"; pinctrl-0 = <ð_phy_rst>; -- cgit From 690c66656e99ebc962451afbc1f15d074646773a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 28 Apr 2024 00:10:11 +0200 Subject: ARM: dts: stm32: Add pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board Add new pinmux nodes for DH electronics STM32MP13xx DHCOR SoM and DHSBC board. The following pinmux nodes are added: - ADC pins - ADC CC pins - ETH1 pins - ETH2 pins - I2C5 pins - MCAN1 pins - MCAN2 pins - PWM13 pins - PWM5 pins - QSPI pins - SAI1 pins - SDMMC2 D4..D7 pins - SPI2 pins - SPI3 pins - UART4 pins - UART7 pins - USART1 pins - USART2 pins Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 483 ++++++++++++++++++++++++++++ 1 file changed, 483 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index 66efef93251f..22cd07196499 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -6,6 +6,12 @@ #include &pinctrl { + adc1_pins_a: adc1-pins-0 { + pins { + pinmux = ; /* ADC1 in12 */ + }; + }; + adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 { pins { pinmux = , /* ADC1 in6 */ @@ -68,6 +74,104 @@ }; }; + adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 { + pins { + pinmux = , /* ADC1_INP2 */ + ; /* ADC1_INP11 */ + }; + }; + + eth1_rgmii_pins_a: eth1-rgmii-0 { + pins1 { + pinmux = , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + , /* ETH_RGMII_TX_CTL */ + , /* ETH_RGMII_GTX_CLK */ + , /* ETH_MDIO */ + ; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + + pins2 { + pinmux = , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD2 */ + , /* ETH_RGMII_RXD3 */ + , /* ETH_RGMII_RX_CTL */ + ; /* ETH_RGMII_RX_CLK */ + bias-disable; + }; + + }; + + eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 { + pins1 { + pinmux = , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + , /* ETH_RGMII_TX_CTL */ + , /* ETH_RGMII_GTX_CLK */ + , /* ETH_MDIO */ + , /* ETH_MDC */ + , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RX_CTL */ + ; /* ETH_RGMII_RX_CLK */ + }; + }; + + eth2_rgmii_pins_a: eth2-rgmii-0 { + pins1 { + pinmux = , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + , /* ETH_RGMII_TX_CTL */ + , /* ETH_RGMII_GTX_CLK */ + , /* ETH_MDIO */ + ; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + + pins2 { + pinmux = , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD2 */ + , /* ETH_RGMII_RXD3 */ + , /* ETH_RGMII_RX_CTL */ + ; /* ETH_RGMII_RX_CLK */ + bias-disable; + }; + }; + + eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 { + pins1 { + pinmux = , /* ETH_RGMII_TXD0 */ + , /* ETH_RGMII_TXD1 */ + , /* ETH_RGMII_TXD2 */ + , /* ETH_RGMII_TXD3 */ + , /* ETH_RGMII_TX_CTL */ + , /* ETH_RGMII_GTX_CLK */ + , /* ETH_MDIO */ + , /* ETH_MDC */ + , /* ETH_RGMII_RXD0 */ + , /* ETH_RGMII_RXD1 */ + , /* ETH_RGMII_RXD2 */ + , /* ETH_RGMII_RXD3 */ + , /* ETH_RGMII_RX_CTL */ + ; /* ETH_RGMII_RX_CLK */ + }; + }; + i2c1_pins_a: i2c1-0 { pins { pinmux = , /* I2C1_SCL */ @@ -102,6 +206,23 @@ }; }; + i2c5_pins_b: i2c5-1 { + pins { + pinmux = , /* I2C5_SCL */ + ; /* I2C5_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c5_sleep_pins_b: i2c5-sleep-1 { + pins { + pinmux = , /* I2C5_SCL */ + ; /* I2C5_SDA */ + }; + }; + ltdc_pins_a: ltdc-0 { pins { pinmux = , /* LCD_CLK */ @@ -159,6 +280,46 @@ }; }; + m_can1_pins_a: m-can1-0 { + pins1 { + pinmux = ; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_a: m_can1-sleep-0 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + + m_can2_pins_a: m-can2-0 { + pins1 { + pinmux = ; /* CAN2_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN2_RX */ + bias-disable; + }; + }; + + m_can2_sleep_pins_a: m_can2-sleep-0 { + pins { + pinmux = , /* CAN2_TX */ + ; /* CAN2_RX */ + }; + }; + mcp23017_pins_a: mcp23017-0 { pins { pinmux = ; @@ -196,6 +357,21 @@ }; }; + pwm5_pins_a: pwm5-0 { + pins { + pinmux = ; /* TIM5_CH3 */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm5_sleep_pins_a: pwm5-sleep-0 { + pins { + pinmux = ; /* TIM5_CH3 */ + }; + }; + pwm8_pins_a: pwm8-0 { pins { pinmux = ; /* TIM8_CH3 */ @@ -211,6 +387,21 @@ }; }; + pwm13_pins_a: pwm13-0 { + pins { + pinmux = ; /* TIM13_CH1 */ + bias-pull-down; + drive-push-pull; + slew-rate = <0>; + }; + }; + + pwm13_sleep_pins_a: pwm13-sleep-0 { + pins { + pinmux = ; /* TIM13_CH1 */ + }; + }; + pwm14_pins_a: pwm14-0 { pins { pinmux = ; /* TIM14_CH1 */ @@ -226,6 +417,89 @@ }; }; + qspi_clk_pins_a: qspi-clk-0 { + pins { + pinmux = ; /* QSPI_CLK */ + bias-disable; + drive-push-pull; + slew-rate = <3>; + }; + }; + + qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { + pins { + pinmux = ; /* QSPI_CLK */ + }; + }; + + qspi_bk1_pins_a: qspi-bk1-0 { + pins { + pinmux = , /* QSPI_BK1_IO0 */ + , /* QSPI_BK1_IO1 */ + , /* QSPI_BK1_IO2 */ + ; /* QSPI_BK1_IO3 */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + }; + + qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { + pins { + pinmux = , /* QSPI_BK1_IO0 */ + , /* QSPI_BK1_IO1 */ + , /* QSPI_BK1_IO2 */ + ; /* QSPI_BK1_IO3 */ + }; + }; + + qspi_cs1_pins_a: qspi-cs1-0 { + pins { + pinmux = ; /* QSPI_BK1_NCS */ + bias-pull-up; + drive-push-pull; + slew-rate = <1>; + }; + }; + + qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 { + pins { + pinmux = ; /* QSPI_BK1_NCS */ + }; + }; + + sai1a_pins_a: sai1a-0 { + pins { + pinmux = , /* SAI1_SCK_A */ + , /* SAI1_SD_A */ + ; /* SAI1_FS_A */ + slew-rate = <0>; + drive-push-pull; + bias-disable; + }; + }; + + sai1a_sleep_pins_a: sai1a-sleep-0 { + pins { + pinmux = , /* SAI1_SCK_A */ + , /* SAI1_SD_A */ + ; /* SAI1_FS_A */ + }; + }; + + sai1b_pins_a: sai1b-0 { + pins { + pinmux = ; /* SAI1_SD_B */ + bias-disable; + }; + }; + + sai1b_sleep_pins_a: sai1b-sleep-0 { + pins { + pinmux = ; /* SAI1_SD_B */ + }; + }; + sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins { pinmux = , /* SDMMC1_D0 */ @@ -328,6 +602,73 @@ }; }; + sdmmc2_d47_pins_a: sdmmc2-d47-0 { + pins { + pinmux = , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + slew-rate = <1>; + drive-push-pull; + bias-pull-up; + }; + }; + + sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { + pins { + pinmux = , /* SDMMC2_D4 */ + , /* SDMMC2_D5 */ + , /* SDMMC2_D6 */ + ; /* SDMMC2_D7 */ + }; + }; + + spi2_pins_a: spi2-0 { + pins1 { + pinmux = , /* SPI2_SCK */ + ; /* SPI2_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI2_MISO */ + bias-disable; + }; + }; + + spi2_sleep_pins_a: spi2-sleep-0 { + pins { + pinmux = , /* SPI2_SCK */ + , /* SPI2_MISO */ + ; /* SPI2_MOSI */ + }; + }; + + spi3_pins_a: spi3-0 { + pins1 { + pinmux = , /* SPI3_SCK */ + ; /* SPI3_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI3_MISO */ + bias-disable; + }; + }; + + spi3_sleep_pins_a: spi3-sleep-0 { + pins { + pinmux = , /* SPI3_SCK */ + , /* SPI3_MISO */ + ; /* SPI3_MOSI */ + }; + }; + spi5_pins_a: spi5-0 { pins1 { pinmux = , /* SPI5_SCK */ @@ -388,6 +729,77 @@ }; }; + uart4_pins_b: uart4-1 { + pins1 { + pinmux = ; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-pull-up; + }; + }; + + uart4_idle_pins_b: uart4-idle-1 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-pull-up; + }; + }; + + uart4_sleep_pins_b: uart4-sleep-1 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; + + uart7_pins_a: uart7-0 { + pins1 { + pinmux = , /* UART7_TX */ + ; /* UART7_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* UART7_RX */ + ; /* UART7_CTS_NSS */ + bias-disable; + }; + }; + + uart7_idle_pins_a: uart7-idle-0 { + pins1 { + pinmux = , /* UART7_TX */ + ; /* UART7_CTS_NSS */ + }; + pins2 { + pinmux = ; /* UART7_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* UART7_RX */ + bias-disable; + }; + }; + + uart7_sleep_pins_a: uart7-sleep-0 { + pins { + pinmux = , /* UART7_TX */ + , /* UART7_RTS */ + , /* UART7_RX */ + ; /* UART7_CTS_NSS */ + }; + }; + uart8_pins_a: uart8-0 { pins1 { pinmux = ; /* UART8_TX */ @@ -459,6 +871,36 @@ }; }; + usart1_pins_b: usart1-1 { + pins1 { + pinmux = ; /* USART1_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* USART1_RX */ + bias-pull-up; + }; + }; + + usart1_idle_pins_b: usart1-idle-1 { + pins1 { + pinmux = ; /* USART1_TX */ + }; + pins2 { + pinmux = ; /* USART1_RX */ + bias-pull-up; + }; + }; + + usart1_sleep_pins_b: usart1-sleep-1 { + pins { + pinmux = , /* USART1_TX */ + ; /* USART1_RX */ + }; + }; + usart2_pins_a: usart2-0 { pins1 { pinmux = , /* USART2_TX */ @@ -499,4 +941,45 @@ ; /* USART2_CTS_NSS */ }; }; + + usart2_pins_b: usart2-1 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_idle_pins_b: usart2-idle-1 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART2_RX */ + bias-disable; + }; + }; + + usart2_sleep_pins_b: usart2-sleep-1 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; }; -- cgit From 6331bddce649829afb2c2e462df812f8e8657a61 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 28 Apr 2024 00:10:12 +0200 Subject: ARM: dts: stm32: Add support for STM32MP13xx DHCOR SoM and DHSBC board This stm32mp135f-dhcor-dhsbc board is a stack of DHCOR SoM based on STM32MP135F SoC (900MHz / crypto capabilities) populated on DHSBC carrier board. The SoM contains the following peripherals: - STPMIC (power delivery) - 512MB DDR3L memory - eMMC and SDIO WiFi module The DHSBC carrier board contains the following peripherals: - Two RGMII Ethernet ports - USB-A Host port, USB-C peripheral port, USB-C power supply plug - Expansion connector Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/Makefile | 1 + arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts | 321 +++++++++++++++++++++++ arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi | 308 ++++++++++++++++++++++ 3 files changed, 630 insertions(+) create mode 100644 arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts create mode 100644 arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/Makefile b/arch/arm/boot/dts/st/Makefile index 9fedd6776208..015903d09323 100644 --- a/arch/arm/boot/dts/st/Makefile +++ b/arch/arm/boot/dts/st/Makefile @@ -29,6 +29,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32h743i-eval.dtb \ stm32h743i-disco.dtb \ stm32h750i-art-pi.dtb \ + stm32mp135f-dhcor-dhsbc.dtb \ stm32mp135f-dk.dtb \ stm32mp151a-prtt1a.dtb \ stm32mp151a-prtt1c.dtb \ diff --git a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts new file mode 100644 index 000000000000..5f4f6b6e427a --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts @@ -0,0 +1,321 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2024 Marek Vasut + * + * DHCOR STM32MP13 variant: + * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG + * DHCOR PCB number: 718-100 or newer + * DHSBC PCB number: 719-100 or newer + */ + +/dts-v1/; + +#include +#include "stm32mp135.dtsi" +#include "stm32mp13xf.dtsi" +#include "stm32mp13xx-dhcor-som.dtsi" + +/ { + model = "DH electronics STM32MP135F DHCOR DHSBC"; + compatible = "dh,stm32mp135f-dhcor-dhsbc", + "dh,stm32mp135f-dhcor-som", + "st,stm32mp135"; + + aliases { + serial2 = &usart1; + serial3 = &usart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&adc_1 { + pinctrl-names = "default"; + pinctrl-0 = <&adc1_pins_a &adc1_usb_cc_pins_b>; + vdda-supply = <&vdd_adc>; + vref-supply = <&vdd_adc>; + status = "okay"; + + adc1: adc@0 { + status = "okay"; + + /* + * Type-C USB_PWR_CC1 & USB_PWR_CC2 on in2 & in11. + * Use at least 5 * RC time, e.g. 5 * (Rp + Rd) * C: + * 5 * (5.1 + 47kOhms) * 5pF => 1.3us. + * Use arbitrary margin here (e.g. 5us). + * + * The pinmux pins must be set as ANALOG, use datasheet + * DS13483 Table 7. STM32MP135C/F ball definitions to + * find out which 'pin name' maps to which 'additional + * functions', which lists the mapping between pin and + * ADC channel. In this case, PA5 maps to ADC1_INP2 and + * PF13 maps to ADC1_INP11 . + */ + channel@2 { + reg = <2>; + st,min-sample-time-ns = <5000>; + }; + + channel@11 { + reg = <11>; + st,min-sample-time-ns = <5000>; + }; + + /* Expansion connector: INP12:pin29 */ + channel@12 { + reg = <12>; + st,min-sample-time-ns = <5000>; + }; + }; +}; + +&gpioa { + gpio-line-names = "", "", "", "", + "", "DHSBC_USB_PWR_CC1", "", "", + "", "", "", "DHSBC_nETH1_RST", + "", "DHCOR_HW-CODING_0", "", ""; +}; + +&gpiob { + gpio-line-names = "", "", "", "", + "", "", "", "DHCOR_BT_HOST_WAKE", + "", "", "", "", + "", "DHSBC_nTPM_CS", "", ""; +}; + +&gpioc { + gpio-line-names = "", "", "", "DHSBC_USB_5V_MEAS", + "", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +&gpiod { + gpio-line-names = "", "", "", "", + "", "DHCOR_RAM-CODING_0", "", "", + "", "DHCOR_RAM-CODING_1", "", "", + "", "", "", ""; +}; + +&gpioe { + gpio-line-names = "", "", "", "", + "", "", "", "", + "", "DHSBC_nTPM_RST", "", "", + "DHSBC_nTPM_PIRQ", "", "DHCOR_WL_HOST_WAKE", ""; +}; + +&gpiof { + gpio-line-names = "", "", "DHSBC_USB_PWR_nFLT", "", + "", "", "", "", + "", "", "", "", + "DHCOR_WL_REG_ON", "DHSBC_USB_PWR_CC2", "", ""; +}; + +&gpiog { + gpio-line-names = "", "", "", "", + "", "", "", "", + "DHSBC_nETH2_RST", "DHCOR_BT_DEV_WAKE", "", "", + "DHSBC_ETH1_INTB", "", "", "DHSBC_ETH2_INTB"; +}; + +&gpioi { + gpio-line-names = "DHCOR_RTC_nINT", "DHCOR_HW-CODING_1", + "DHCOR_BT_REG_ON", "DHCOR_PMIC_nINT", + "DHSBC_BOOT0", "DHSBC_BOOT1", + "DHSBC_BOOT2", "DHSBC_USB-C_DATA_VBUS"; +}; + +&i2c1 { /* Expansion connector: SDA:pin27 SCL:pin28 */ + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-1 = <&i2c1_sleep_pins_a>; + i2c-scl-rising-time-ns = <96>; + i2c-scl-falling-time-ns = <3>; + clock-frequency = <400000>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; +}; + +&i2c5 { /* Expansion connector: SDA:pin3 SCL:pin5 */ + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c5_pins_b>; + pinctrl-1 = <&i2c5_sleep_pins_b>; + i2c-scl-rising-time-ns = <96>; + i2c-scl-falling-time-ns = <3>; + clock-frequency = <400000>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; +}; + +&m_can1 { /* Expansion connector: TX:pin16 RX:pin18 */ + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can1_pins_a>; + pinctrl-1 = <&m_can1_sleep_pins_a>; + status = "okay"; +}; + +&m_can2 { /* Expansion connector: TX:pin22 RX:pin26 */ + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&m_can2_pins_a>; + pinctrl-1 = <&m_can2_sleep_pins_a>; + status = "okay"; +}; + +&pwr_regulators { + vdd-supply = <&vdd>; + vdd_3v3_usbfs-supply = <&vdd_usb>; + status = "okay"; +}; + +&sai1 { /* Expansion connector: SCK-A:pin12 FS-A:pin35 SD-A:pin38 SD-B:pin40 */ + clocks = <&rcc SAI1>, <&rcc PLL3_Q>, <&rcc PLL3_R>; + clock-names = "pclk", "x8k", "x11k"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sai1a_pins_a &sai1b_pins_a>; + pinctrl-1 = <&sai1a_sleep_pins_a &sai1b_sleep_pins_a>; +}; + +&scmi_voltd { + status = "disabled"; +}; + +&spi2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&spi2_pins_a>; + pinctrl-1 = <&spi2_sleep_pins_a>; + cs-gpios = <&gpiob 13 0>; + status = "okay"; + + st33htph: tpm@0 { + compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; + reg = <0>; + spi-max-frequency = <24000000>; + }; +}; + +&spi3 { /* Expansion connector: MOSI:pin19 MISO:pin21 SCK:pin22 nCS:pin24 */ + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&spi3_pins_a>; + pinctrl-1 = <&spi3_sleep_pins_a>; + cs-gpios = <&gpiof 3 0>; + status = "disabled"; +}; + +&timers5 { /* Expansion connector: CH3:pin31 */ + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; + + pwm { + pinctrl-0 = <&pwm5_pins_a>; + pinctrl-1 = <&pwm5_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@4 { + status = "okay"; + }; +}; + +&timers13 { /* Expansion connector: CH1:pin32 */ + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; + + pwm { + pinctrl-0 = <&pwm13_pins_a>; + pinctrl-1 = <&pwm13_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + status = "okay"; + }; + timer@12 { + status = "okay"; + }; +}; + +&usart1 { /* Expansion connector: RX:pin33 TX:pin37 */ + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart1_pins_b>; + pinctrl-1 = <&usart1_sleep_pins_b>; + pinctrl-2 = <&usart1_idle_pins_b>; + status = "okay"; +}; + +&usart2 { /* Expansion connector: RX:pin10 TX:pin8 RTS:pin11 CTS:pin36 */ + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart2_pins_b>; + pinctrl-1 = <&usart2_sleep_pins_b>; + pinctrl-2 = <&usart2_idle_pins_b>; + uart-has-rtscts; + status = "okay"; +}; + +&usbh_ehci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbh_ohci { + phys = <&usbphyc_port0>; + status = "okay"; +}; + +&usbotg_hs { + dr_mode = "peripheral"; + phys = <&usbphyc_port1 0>; + phy-names = "usb2-phy"; + usb33d-supply = <&usb33>; + status = "okay"; +}; + +&usbphyc { + status = "okay"; + vdda1v1-supply = <®11>; + vdda1v8-supply = <®18>; +}; + +&usbphyc_port0 { + phy-supply = <&vdd_usb>; + st,current-boost-microamp = <1000>; + st,decrease-hs-slew-rate; + st,tune-hs-dc-level = <2>; + st,enable-hs-rftime-reduction; + st,trim-hs-current = <11>; + st,trim-hs-impedance = <2>; + st,tune-squelch-level = <1>; + st,enable-hs-rx-gain-eq; + st,no-hs-ftime-ctrl; + st,no-lsfs-sc; + connector { + compatible = "usb-a-connector"; + vbus-supply = <&vbus_sw>; + }; +}; + +&usbphyc_port1 { + phy-supply = <&vdd_usb>; + st,current-boost-microamp = <1000>; + st,decrease-hs-slew-rate; + st,tune-hs-dc-level = <2>; + st,enable-hs-rftime-reduction; + st,trim-hs-current = <11>; + st,trim-hs-impedance = <2>; + st,tune-squelch-level = <1>; + st,enable-hs-rx-gain-eq; + st,no-hs-ftime-ctrl; + st,no-lsfs-sc; + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + vbus-gpios = <&gpioi 7 GPIO_ACTIVE_HIGH>; + label = "Type-C"; + self-powered; + type = "micro"; + }; +}; diff --git a/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi new file mode 100644 index 000000000000..ddad6497775b --- /dev/null +++ b/arch/arm/boot/dts/st/stm32mp13xx-dhcor-som.dtsi @@ -0,0 +1,308 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) 2024 Marek Vasut + */ + +#include +#include +#include +#include +#include +#include "stm32mp13-pinctrl.dtsi" + +/ { + model = "DH electronics STM32MP13xx DHCOR SoM"; + compatible = "dh,stm32mp131a-dhcor-som", + "st,stm32mp131"; + + aliases { + mmc0 = &sdmmc2; + mmc1 = &sdmmc1; + serial0 = &uart4; + serial1 = &uart7; + rtc0 = &rv3032; + spi0 = &qspi; + }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + optee@dd000000 { + reg = <0xdd000000 0x3000000>; + no-map; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpiof 12 GPIO_ACTIVE_LOW>; + }; + + vin: vin { + compatible = "regulator-fixed"; + regulator-name = "vin"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; +}; + +&i2c3 { + i2c-scl-rising-time-ns = <96>; + i2c-scl-falling-time-ns = <3>; + clock-frequency = <400000>; + status = "okay"; + /* spare dmas for other usage */ + /delete-property/dmas; + /delete-property/dma-names; + + pmic: stpmic@33 { + compatible = "st,stpmic1"; + reg = <0x33>; + interrupts-extended = <&gpioi 3 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + status = "okay"; + + regulators { + compatible = "st,stpmic1-regulators"; + + ldo1-supply = <&vin>; + ldo2-supply = <&vin>; + ldo3-supply = <&vin>; + ldo4-supply = <&vin>; + ldo5-supply = <&vin>; + ldo6-supply = <&vin>; + pwr_sw1-supply = <&bst_out>; + pwr_sw2-supply = <&bst_out>; + + vddcpu: buck1 { /* VDD_CPU_1V2 */ + regulator-name = "vddcpu"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_ddr: buck2 { /* VDD_DDR_1V35 */ + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd: buck3 { /* VDD_3V3_1V8 */ + regulator-name = "vdd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vddcore: buck4 { /* VDD_CORE_1V2 */ + regulator-name = "vddcore"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-initial-mode = <0>; + regulator-over-current-protection; + }; + + vdd_adc: ldo1 { /* VDD_ADC_1V8 */ + regulator-name = "vdd_adc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + interrupts = ; + }; + + vdd_ldo2: ldo2 { /* LDO2_OUT_1V8 */ + regulator-name = "vdd_ldo2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + interrupts = ; + }; + + vdd_ldo3: ldo3 { /* LDO3_OUT */ + regulator-name = "vdd_ldo3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + interrupts = ; + }; + + vdd_usb: ldo4 { /* VDD_USB_3V3 */ + regulator-name = "vdd_usb"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + interrupts = ; + }; + + vdd_sd: ldo5 { /* VDD_SD_3V3_1V8 */ + regulator-name = "vdd_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + interrupts = ; + }; + + vdd_sd2: ldo6 { /* VDD_SD2_3V3_1V8 */ + regulator-name = "vdd_sd2"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + interrupts = ; + }; + + vref_ddr: vref_ddr { /* VREF_DDR_0V675 */ + regulator-name = "vref_ddr"; + regulator-always-on; + }; + + bst_out: boost { /* BST_OUT_5V2 */ + regulator-name = "bst_out"; + }; + + vbus_otg: pwr_sw1 { + regulator-name = "vbus_otg"; + interrupts = ; + }; + + vbus_sw: pwr_sw2 { + regulator-name = "vbus_sw"; + interrupts = ; + regulator-active-discharge = <1>; + }; + }; + + onkey { + compatible = "st,stpmic1-onkey"; + interrupts = , ; + interrupt-names = "onkey-falling", "onkey-rising"; + status = "okay"; + }; + + watchdog { + compatible = "st,stpmic1-wdt"; + status = "disabled"; + }; + }; + + eeprom0: eeprom@50 { + compatible = "atmel,24c256"; /* ST M24256 */ + reg = <0x50>; + pagesize = <64>; + }; + + rv3032: rtc@51 { + compatible = "microcrystal,rv3032"; + reg = <0x51>; + interrupts-extended = <&gpioi 0 IRQ_TYPE_EDGE_FALLING>; + }; +}; + +&iwdg2 { + timeout-sec = <32>; + status = "okay"; +}; + +&qspi { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_clk_pins_a + &qspi_bk1_pins_a + &qspi_cs1_pins_a>; + pinctrl-1 = <&qspi_clk_sleep_pins_a + &qspi_bk1_sleep_pins_a + &qspi_cs1_sleep_pins_a>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-rx-bus-width = <4>; + spi-max-frequency = <108000000>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +/* Console UART */ +&uart4 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart4_pins_b>; + pinctrl-1 = <&uart4_sleep_pins_b>; + pinctrl-2 = <&uart4_idle_pins_b>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +/* Bluetooth */ +&uart7 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart7_pins_a>; + pinctrl-1 = <&uart7_sleep_pins_a>; + pinctrl-2 = <&uart7_idle_pins_a>; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt"; + max-speed = <3000000>; + device-wakeup-gpios = <&gpiog 9 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpioi 2 GPIO_ACTIVE_HIGH>; + }; +}; + +/* SDIO WiFi */ +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + bus-width = <4>; + cap-power-off-card; + keep-power-in-suspend; + non-removable; + st,neg-edge; + vmmc-supply = <&vdd>; + mmc-pwrseq = <&sdio_pwrseq>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + brcmf: bcrmf@1 { /* muRata 1YN */ + reg = <1>; + compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac"; + interrupt-parent = <&gpioe>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "host-wake"; + }; +}; + +/* eMMC */ +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>; + bus-width = <8>; + mmc-ddr-3_3v; + no-sd; + no-sdio; + non-removable; + st,neg-edge; + vmmc-supply = <&vdd>; + vqmmc-supply = <&vdd>; + status = "okay"; +}; -- cgit From 0fc78aa67b3f9a7cc6b67ddbc511e4a5022cfd01 Mon Sep 17 00:00:00 2001 From: Yanjun Yang Date: Fri, 14 Jun 2024 09:00:12 +0800 Subject: ARM: dts: stm32: Missing clocks for stm32f429's syscfg. Without clock definition, SYSCFG will not work, EXTI interrupt for port other than GPIOA will fail to operate. Signed-off-by: Yanjun Yang Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32f429.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32f429.dtsi b/arch/arm/boot/dts/st/stm32f429.dtsi index 8efcda9ef8ae..ad91b74ddd0d 100644 --- a/arch/arm/boot/dts/st/stm32f429.dtsi +++ b/arch/arm/boot/dts/st/stm32f429.dtsi @@ -579,6 +579,7 @@ syscfg: syscon@40013800 { compatible = "st,stm32-syscfg", "syscon"; reg = <0x40013800 0x400>; + clocks = <&rcc 0 STM32F4_APB2_CLOCK(SYSCFG)>; }; exti: interrupt-controller@40013c00 { -- cgit From 7852134db3c6fca65e6cbdf081e40113e9222997 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 31 May 2024 11:16:08 +1200 Subject: ARM: dts: marvell: Add 7-segment LED display on x530 The Allied Telesis x530 products have a 7-segment LED display which is used for node identification when the devices are stacked. Represent this as a gpio-7-segment device. Signed-off-by: Chris Packham Acked-by: Gregory CLEMENT Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/armada-385-atl-x530.dts | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/armada-385-atl-x530.dts b/arch/arm/boot/dts/marvell/armada-385-atl-x530.dts index 5a9ab8410b7b..2fb7304039be 100644 --- a/arch/arm/boot/dts/marvell/armada-385-atl-x530.dts +++ b/arch/arm/boot/dts/marvell/armada-385-atl-x530.dts @@ -43,6 +43,17 @@ }; }; }; + + led-7seg { + compatible = "gpio-7-segment"; + segment-gpios = <&led_7seg_gpio 0 GPIO_ACTIVE_LOW>, + <&led_7seg_gpio 1 GPIO_ACTIVE_LOW>, + <&led_7seg_gpio 2 GPIO_ACTIVE_LOW>, + <&led_7seg_gpio 3 GPIO_ACTIVE_LOW>, + <&led_7seg_gpio 4 GPIO_ACTIVE_LOW>, + <&led_7seg_gpio 5 GPIO_ACTIVE_LOW>, + <&led_7seg_gpio 6 GPIO_ACTIVE_LOW>; + }; }; &pciec { @@ -149,7 +160,7 @@ #size-cells = <0>; reg = <3>; - gpio@20 { + led_7seg_gpio: gpio@20 { compatible = "nxp,pca9554"; gpio-controller; #gpio-cells = <2>; -- cgit From e62f7f6b48e3473278edc18e439cd60b87ae2644 Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 24 Jun 2024 16:53:54 +0200 Subject: ARM: dts: armada-{370-xp,375,38x,39x}: Drop #size-cells from mpic node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The marvell,mpic interrupt controller has no children nodes. Drop the Signed-off-by: Marek Behún Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/armada-370-xp.dtsi | 1 - arch/arm/boot/dts/marvell/armada-375.dtsi | 1 - arch/arm/boot/dts/marvell/armada-38x.dtsi | 1 - arch/arm/boot/dts/marvell/armada-39x.dtsi | 1 - 4 files changed, 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/armada-370-xp.dtsi b/arch/arm/boot/dts/marvell/armada-370-xp.dtsi index 0b8c2a64b36f..954c891e5aee 100644 --- a/arch/arm/boot/dts/marvell/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/marvell/armada-370-xp.dtsi @@ -168,7 +168,6 @@ mpic: interrupt-controller@20a00 { compatible = "marvell,mpic"; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; }; diff --git a/arch/arm/boot/dts/marvell/armada-375.dtsi b/arch/arm/boot/dts/marvell/armada-375.dtsi index ddc49547d786..99778b4b7e7b 100644 --- a/arch/arm/boot/dts/marvell/armada-375.dtsi +++ b/arch/arm/boot/dts/marvell/armada-375.dtsi @@ -376,7 +376,6 @@ compatible = "marvell,mpic"; reg = <0x20a00 0x2d0>, <0x21070 0x58>; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; interrupts = ; diff --git a/arch/arm/boot/dts/marvell/armada-38x.dtsi b/arch/arm/boot/dts/marvell/armada-38x.dtsi index 446861b6b17b..1181b13deabc 100644 --- a/arch/arm/boot/dts/marvell/armada-38x.dtsi +++ b/arch/arm/boot/dts/marvell/armada-38x.dtsi @@ -408,7 +408,6 @@ compatible = "marvell,mpic"; reg = <0x20a00 0x2d0>, <0x21070 0x58>; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; interrupts = ; diff --git a/arch/arm/boot/dts/marvell/armada-39x.dtsi b/arch/arm/boot/dts/marvell/armada-39x.dtsi index 9d1cac49c022..6d05835efb42 100644 --- a/arch/arm/boot/dts/marvell/armada-39x.dtsi +++ b/arch/arm/boot/dts/marvell/armada-39x.dtsi @@ -268,7 +268,6 @@ compatible = "marvell,mpic"; reg = <0x20a00 0x2d0>, <0x21070 0x58>; #interrupt-cells = <1>; - #size-cells = <1>; interrupt-controller; msi-controller; interrupts = ; -- cgit From b98a91911d24babe20600ad19697570ea335356f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 16:56:34 +0200 Subject: ARM: dts: marvell: kirkwood: align GPIO keys node name with bindings Bindings expect the GPIO key node names to follow certain pattern, see dtbs_check warnings: kirkwood-laplug.dtb: gpio_keys: 'power' does not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)... Signed-off-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts | 8 ++++---- arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-dir665.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi | 6 +++--- arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-iconnect.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts | 6 +++--- arch/arm/boot/dts/marvell/kirkwood-l-50.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-laplug.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi | 6 +++--- arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi | 6 +++--- arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi | 2 +- arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts | 6 +++--- arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi | 6 +++--- arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-t5325.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts | 4 ++-- arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi | 4 ++-- 23 files changed, 47 insertions(+), 47 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts b/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts index 07fbfca444d5..f34c3897ff48 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts @@ -35,13 +35,13 @@ gpio_keys { compatible = "gpio-keys"; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; }; - button { + button-power { label = "Power"; linux,code = ; gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts b/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts index f59ff7578dfc..7e3ee64d4bdf 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-c200-v1.dts @@ -29,25 +29,25 @@ pinctrl-0 = <&pmx_buttons>; pinctrl-names = "default"; - power { + button-power { label = "Power Button"; linux,code = ; gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; }; - reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; }; - usb1 { + button-usb1 { label = "USB1 Button"; linux,code = ; gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; }; - usb2 { + button-usb2 { label = "USB2 Button"; linux,code = ; gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts b/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts index 448b0cd23b5f..2582b84d8415 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts @@ -61,7 +61,7 @@ #address-cells = <1>; #size-cells = <0>; - power { + key-power { label = "Power push button"; linux,code = ; gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dir665.dts b/arch/arm/boot/dts/marvell/kirkwood-dir665.dts index 0c0851cd9bec..e8eff0ba1c99 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dir665.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-dir665.dts @@ -179,12 +179,12 @@ #address-cells = <1>; #size-cells = <0>; - reset { + button-reset { label = "reset"; linux,code = ; gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "wps"; linux,code = ; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi index 0738eb679fcd..baea14c68520 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi @@ -14,17 +14,17 @@ &pmx_button_reset>; pinctrl-names = "default"; - power { + button-power { label = "Power button"; linux,code = ; gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; }; - eject { + button-eject { label = "USB unmount button"; linux,code = ; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset button"; linux,code = ; gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts index 962a910a6f5c..d76dbbce16f1 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts @@ -63,12 +63,12 @@ pinctrl-0 = <&pmx_button_reset &pmx_button_usb_copy>; pinctrl-names = "default"; - copy { + button-copy { label = "USB Copy"; linux,code = ; gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts index aed20185fd7a..ea98ff13700e 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts @@ -127,13 +127,13 @@ pinctrl-0 = < &pmx_button_reset &pmx_button_otb >; pinctrl-names = "default"; - otb { + button-otb { label = "OTB Button"; linux,code = ; gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; debounce-interval = <100>; }; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts index 2338f495d517..fa7ace071de8 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts @@ -154,17 +154,17 @@ pinctrl-names = "default"; - Power { + button-power { label = "Power Button"; linux,code = ; gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; }; - Reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; }; - OTB { + button-otb { label = "OTB Button"; linux,code = ; gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts index c841eb8e7fb1..094854743dde 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts @@ -193,7 +193,7 @@ keys { compatible = "gpio-keys"; - factory_defaults { + button-factory-defaults { label = "factory_defaults"; gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; linux,code = ; diff --git a/arch/arm/boot/dts/marvell/kirkwood-laplug.dts b/arch/arm/boot/dts/marvell/kirkwood-laplug.dts index 8c2b540eaf4f..8296486a5931 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-laplug.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-laplug.dts @@ -51,7 +51,7 @@ gpio_keys { compatible = "gpio-keys"; - power { + button-power { label = "Power push button"; linux,code = ; gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts index 27fd6e2337d5..3f97240fda74 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts @@ -38,13 +38,13 @@ pinctrl-0 = < &pmx_btn_wps &pmx_btn_reset >; pinctrl-names = "default"; - wps { + button-wps { label = "WPS Button"; linux,code = ; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi index f80af24b9e90..a86dbc490600 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi @@ -113,18 +113,18 @@ &pmx_power_auto_switch>; pinctrl-names = "default"; - option { + button-option { label = "Function Button"; linux,code = ; gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; }; - reserved { + button-reserved { label = "Power-on Switch"; linux,code = ; linux,input-type = <5>; gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; }; - power { + button-power { label = "Power-auto Switch"; linux,code = ; linux,input-type = <5>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts index 5a77286136c7..0d5d85c873b5 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts @@ -96,12 +96,12 @@ pinctrl-0 = <&pmx_keys>; pinctrl-names = "default"; - restart { + button-restart { label = "SWR Button"; linux,code = ; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; - wps { + button-wps { label = "WPS Button"; linux,code = ; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi b/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi index b5737026e244..d0f85893aeca 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi @@ -60,19 +60,19 @@ * esc and power represent a three position rocker * switch. Thus the conventional KEY_POWER does not fit */ - exc { + button-exc { label = "Back power switch (on|auto)"; linux,code = ; linux,input-type = <5>; gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; }; - power { + button-power { label = "Back power switch (auto|off)"; linux,code = ; linux,input-type = <5>; gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; }; - option { + button-option { label = "Function button"; linux,code = ; gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi index 51530ea86622..6cc068a05673 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi @@ -58,7 +58,7 @@ #address-cells = <1>; #size-cells = <0>; - power { + button-power { label = "Power push button"; linux,code = ; gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts b/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts index 49da633a1bc0..767f34ab434e 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts @@ -40,19 +40,19 @@ pinctrl-0 = <&pmx_buttons>; pinctrl-names = "default"; - power { + button-power { label = "Power Button"; linux,code = ; gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>; }; - copy { + button-copy { label = "Copy Button"; linux,code = ; gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi b/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi index ea3d36512e9f..bdce8a86ce51 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi @@ -68,17 +68,17 @@ pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>; pinctrl-names = "default"; - power { + button-power { label = "Power Button"; linux,code = ; gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; }; - copy { + button-copy { label = "Copy Button"; linux,code = ; gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts index 8ea430168ea5..ef6d6d7a4008 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts @@ -118,7 +118,7 @@ #address-cells = <1>; #size-cells = <0>; - power { + button-power { label = "Init Button"; linux,code = ; gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts index 5aa4669ae254..601760041c99 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts @@ -34,7 +34,7 @@ pinctrl-0 = <&pmx_button_eject>; pinctrl-names = "default"; - eject { + button-eject { debounce-interval = <50>; wakeup-source; linux,code = ; diff --git a/arch/arm/boot/dts/marvell/kirkwood-t5325.dts b/arch/arm/boot/dts/marvell/kirkwood-t5325.dts index ad093324e075..6703e412c8e2 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-t5325.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-t5325.dts @@ -161,7 +161,7 @@ pinctrl-0 = <&pmx_button_power>; pinctrl-names = "default"; - power { + button-power { label = "Power Button"; linux,code = ; gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts index 30892c19aceb..859521b5b84e 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts @@ -40,12 +40,12 @@ pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>; pinctrl-names = "default"; - copy { + button-copy { label = "USB Copy"; linux,code = ; gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts index aba1205981f1..3b0a4ed588e8 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts @@ -40,12 +40,12 @@ pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>; pinctrl-names = "default"; - copy { + button-copy { label = "USB Copy"; linux,code = ; gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi b/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi index 717236853e45..126db753c8fe 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi @@ -41,12 +41,12 @@ pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>; pinctrl-names = "default"; - copy { + button-copy { label = "USB Copy"; linux,code = ; gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; }; - reset { + button-reset { label = "Reset"; linux,code = ; gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; -- cgit From 28be5af95a79c841e8dee5ec2cde990519c8df73 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 16:56:35 +0200 Subject: ARM: dts: marvell: kirkwood: drop incorrect address/size-cells in GPIO keys Bindings do not allow address/size-cells in GPIO keys and the GPIO keys is not a bus, see dtbs_check warnings: kirkwood-openblocks_a7.dtb: gpio_keys: '#address-cells', '#size-cells' do not match any of the regexes: '^(button|event|key|switch|(button|event|key|switch)... Signed-off-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-dir665.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi | 2 -- arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-iconnect.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-linkstation.dtsi | 2 -- arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi | 2 -- arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi | 2 -- arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi | 2 -- arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi | 2 -- arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-t5325.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts | 2 -- arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi | 2 -- 21 files changed, 42 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts b/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts index 2582b84d8415..92897f8b637b 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts @@ -58,8 +58,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; key-power { label = "Power push button"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dir665.dts b/arch/arm/boot/dts/marvell/kirkwood-dir665.dts index e8eff0ba1c99..1d1f4cdedab2 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dir665.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-dir665.dts @@ -176,8 +176,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-reset { label = "reset"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi index baea14c68520..20bcd031f3f5 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-dnskw.dtsi @@ -8,8 +8,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_button_power &pmx_button_unmount &pmx_button_reset>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts index d76dbbce16f1..0f50eb2d5931 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts @@ -58,8 +58,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_button_reset &pmx_button_usb_copy>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts index ea98ff13700e..a2782fe3d379 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts @@ -122,8 +122,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = < &pmx_button_reset &pmx_button_otb >; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts index fa7ace071de8..91409ae949c4 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts @@ -147,8 +147,6 @@ }; gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_button_reset &pmx_button_power &pmx_button_otb>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-linkstation.dtsi b/arch/arm/boot/dts/marvell/kirkwood-linkstation.dtsi index b54c9980f636..8a11d2b9d449 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-linkstation.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-linkstation.dtsi @@ -88,8 +88,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_button_function &pmx_power_switch &pmx_power_auto_switch>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts index 3f97240fda74..ddefaf628501 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts @@ -33,8 +33,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = < &pmx_btn_wps &pmx_btn_reset >; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi index a86dbc490600..c0f80146706d 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi @@ -107,8 +107,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_button_function &pmx_power_switch &pmx_power_auto_switch>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts index 0d5d85c873b5..fd3813ace0c1 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts @@ -91,8 +91,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_keys>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi b/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi index d0f85893aeca..d4edf2727388 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-netxbig.dtsi @@ -53,8 +53,6 @@ gpio-keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; /* * esc and power represent a three position rocker diff --git a/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi index 6cc068a05673..28f09f71b24d 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi @@ -55,8 +55,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; button-power { label = "Power push button"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts b/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts index 767f34ab434e..47deb93c90a5 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa310s.dts @@ -35,8 +35,6 @@ keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_buttons>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi b/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi index bdce8a86ce51..e9bd9c551af5 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa3x0-common.dtsi @@ -63,8 +63,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts b/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts index ef6d6d7a4008..20c6290d2037 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-openblocks_a6.dts @@ -115,8 +115,6 @@ compatible = "gpio-keys"; pinctrl-0 = <&pmx_gpio_init>; pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; button-power { label = "Init Button"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts b/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts index 946f0f453dd1..9c438f10f737 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-openblocks_a7.dts @@ -136,8 +136,6 @@ compatible = "gpio-keys"; pinctrl-0 = <&pmx_gpio_init>; pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; button { label = "Init Button"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts index 601760041c99..b66fc4d57410 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts @@ -29,8 +29,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_button_eject>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-t5325.dts b/arch/arm/boot/dts/marvell/kirkwood-t5325.dts index 6703e412c8e2..a6e77a487d00 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-t5325.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-t5325.dts @@ -156,8 +156,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_button_power>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts index 859521b5b84e..a2e0ad4b84d8 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ts219-6281.dts @@ -35,8 +35,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts index 3b0a4ed588e8..35be6bce1dba 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ts219-6282.dts @@ -35,8 +35,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi b/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi index 126db753c8fe..f136059607b7 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-ts419.dtsi @@ -36,8 +36,6 @@ gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_reset_button &pmx_USB_copy_button>; pinctrl-names = "default"; -- cgit From 9d0120b72b972fb564940a252d994864fb9d6524 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 16:56:36 +0200 Subject: ARM: dts: marvell: kirkwood: align LED node name with bindings Bindings expect the LED node names to follow certain pattern, see dtbs_check warnings: kirkwood-ds409slim.dtb: gpio-leds-alarm-12: 'hdd1-green' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- .../dts/marvell/kirkwood-blackarmor-nas220.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts | 4 +- arch/arm/boot/dts/marvell/kirkwood-d2net.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-dir665.dts | 16 +++--- arch/arm/boot/dts/marvell/kirkwood-dns320.dts | 10 ++-- arch/arm/boot/dts/marvell/kirkwood-dns325.dts | 10 ++-- arch/arm/boot/dts/marvell/kirkwood-dockstar.dts | 4 +- arch/arm/boot/dts/marvell/kirkwood-dreamplug.dts | 6 +-- arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts | 20 ++++---- .../dts/marvell/kirkwood-guruplug-server-plus.dts | 8 +-- arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts | 6 +-- arch/arm/boot/dts/marvell/kirkwood-iconnect.dts | 14 +++--- .../boot/dts/marvell/kirkwood-iomega_ix2_200.dts | 8 +-- arch/arm/boot/dts/marvell/kirkwood-l-50.dts | 18 +++---- arch/arm/boot/dts/marvell/kirkwood-laplug.dts | 4 +- .../boot/dts/marvell/kirkwood-linksys-viper.dts | 4 +- arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi | 10 ++-- arch/arm/boot/dts/marvell/kirkwood-mplcec4.dts | 12 ++--- .../boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts | 6 +-- arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi | 2 +- arch/arm/boot/dts/marvell/kirkwood-ns2lite.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-nsa310.dts | 20 ++++---- arch/arm/boot/dts/marvell/kirkwood-nsa310a.dts | 18 +++---- arch/arm/boot/dts/marvell/kirkwood-nsa320.dts | 18 +++---- arch/arm/boot/dts/marvell/kirkwood-nsa325.dts | 18 +++---- arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts | 4 +- .../dts/marvell/kirkwood-pogoplug-series-4.dts | 4 +- .../boot/dts/marvell/kirkwood-sheevaplug-esata.dts | 2 +- arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts | 4 +- arch/arm/boot/dts/marvell/kirkwood-synology.dtsi | 58 +++++++++++----------- 30 files changed, 157 insertions(+), 157 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts b/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts index f34c3897ff48..36b90c632fd6 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-blackarmor-nas220.dts @@ -51,7 +51,7 @@ gpio-leds { compatible = "gpio-leds"; - blue-power { + led-blue-power { label = "nas220:blue:power"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; linux,default-trigger = "default-on"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts b/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts index 92897f8b637b..151edcd140a0 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-cloudbox.dts @@ -69,11 +69,11 @@ gpio-leds { compatible = "gpio-leds"; - red-fail { + led-red-fail { label = "cloudbox:red:fail"; gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; }; - blue-sata { + led-blue-sata { label = "cloudbox:blue:sata"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-d2net.dts b/arch/arm/boot/dts/marvell/kirkwood-d2net.dts index bd3b266dd766..fcce8730d3e3 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-d2net.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-d2net.dts @@ -37,7 +37,7 @@ gpio-leds { compatible = "gpio-leds"; - red-fail { + led-red-fail { label = "d2net_v2:red:fail"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dir665.dts b/arch/arm/boot/dts/marvell/kirkwood-dir665.dts index 1d1f4cdedab2..2f6793f794cd 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dir665.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-dir665.dts @@ -137,38 +137,38 @@ gpio-leds { compatible = "gpio-leds"; - blue-usb { + led-blue-usb { label = "dir665:blue:usb"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; - blue-internet { + led-blue-internet { /* Can only be turned on if the Internet * Ethernet port has Link */ label = "dir665:blue:internet"; gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; }; - amber-internet { + led-amber-internet { label = "dir665:amber:internet"; gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; }; - blue-wifi5g { + led-blue-wifi5g { label = "dir665:blue:5g"; gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; }; - blue-status { + led-blue-status { label = "dir665:blue:status"; gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; }; - blue-wps { + led-blue-wps { label = "dir665:blue:wps"; gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; }; - amber-status { + led-amber-status { label = "dir665:amber:status"; gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; }; - blue-24g { + led-blue-24g { label = "dir665:blue:24g"; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dns320.dts b/arch/arm/boot/dts/marvell/kirkwood-dns320.dts index d6b0f418fd01..d8279e0c4c4f 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dns320.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-dns320.dts @@ -24,24 +24,24 @@ &pmx_led_white_usb>; pinctrl-names = "default"; - blue-power { + led-blue-power { label = "dns320:blue:power"; gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; default-state = "keep"; }; - blue-usb { + led-blue-usb { label = "dns320:blue:usb"; gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; }; - orange-l_hdd { + led-orange-l_hdd { label = "dns320:orange:l_hdd"; gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; }; - orange-r_hdd { + led-orange-r_hdd { label = "dns320:orange:r_hdd"; gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; }; - orange-usb { + led-orange-usb { label = "dns320:orange:usb"; gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; /* GPIO 35 */ }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dns325.dts b/arch/arm/boot/dts/marvell/kirkwood-dns325.dts index 94d9c06cbbf5..7f396195e977 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dns325.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-dns325.dts @@ -24,24 +24,24 @@ &pmx_led_white_usb>; pinctrl-names = "default"; - white-power { + led-white-power { label = "dns325:white:power"; gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; default-state = "keep"; }; - white-usb { + led-white-usb { label = "dns325:white:usb"; gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO 43 */ }; - red-l_hdd { + led-red-l_hdd { label = "dns325:red:l_hdd"; gpios = <&gpio0 28 GPIO_ACTIVE_LOW>; }; - red-r_hdd { + led-red-r_hdd { label = "dns325:red:r_hdd"; gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; }; - red-usb { + led-red-usb { label = "dns325:red:usb"; gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts b/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts index 264938dfa4d9..090f1e2e5bb6 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-dockstar.dts @@ -42,12 +42,12 @@ pinctrl-0 = <&pmx_led_green &pmx_led_orange>; pinctrl-names = "default"; - health { + led-health { label = "status:green:health"; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; default-state = "keep"; }; - fault { + led-fault { label = "status:orange:fault"; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-dreamplug.dts b/arch/arm/boot/dts/marvell/kirkwood-dreamplug.dts index 328516351e84..590bee3c561c 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-dreamplug.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-dreamplug.dts @@ -85,15 +85,15 @@ &pmx_led_wifi_ap >; pinctrl-names = "default"; - bluetooth { + led-bluetooth { label = "dreamplug:blue:bluetooth"; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; - wifi { + led-wifi { label = "dreamplug:green:wifi"; gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; }; - wifi-ap { + led-wifi-ap { label = "dreamplug:green:wifi_ap"; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts b/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts index d4cb3cd3e2a2..d5ac4e3974da 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-goflexnet.dts @@ -85,44 +85,44 @@ >; pinctrl-names = "default"; - health { + led-health { label = "status:green:health"; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; default-state = "keep"; }; - fault { + led-fault { label = "status:orange:fault"; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; - left0 { + led-left0 { label = "status:white:left0"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; }; - left1 { + led-left1 { label = "status:white:left1"; gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; }; - left2 { + led-left2 { label = "status:white:left2"; gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; }; - left3 { + led-left3 { label = "status:white:left3"; gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; }; - right0 { + led-right0 { label = "status:white:right0"; gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; }; - right1 { + led-right1 { label = "status:white:right1"; gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; }; - right2 { + led-right2 { label = "status:white:right2"; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; }; - right3 { + led-right3 { label = "status:white:right3"; gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts index dfb41393941d..d5aa8b505cc0 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-guruplug-server-plus.dts @@ -59,19 +59,19 @@ &pmx_led_wmode_r &pmx_led_wmode_g >; pinctrl-names = "default"; - health-r { + led-health-r { label = "guruplug:red:health"; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; }; - health-g { + led-health-g { label = "guruplug:green:health"; gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; }; - wmode-r { + led-wmode-r { label = "guruplug:red:wmode"; gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; }; - wmode-g { + led-wmode-g { label = "guruplug:green:wmode"; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts index 0f50eb2d5931..018c6b8f3e8a 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ib62x0.dts @@ -79,16 +79,16 @@ &pmx_led_usb_transfer>; pinctrl-names = "default"; - green-os { + led-green-os { label = "ib62x0:green:os"; gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; default-state = "keep"; }; - red-os { + led-red-os { label = "ib62x0:red:os"; gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; }; - usb-copy { + led-usb-copy { label = "ib62x0:red:usb_copy"; gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts index a2782fe3d379..91b46e77e0b6 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-iconnect.dts @@ -89,32 +89,32 @@ gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; default-state = "on"; }; - power-blue { + led-power-blue { label = "power:blue"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; default-state = "keep"; }; - power-red { + led-power-red { label = "power:red"; gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; }; - usb1 { + led-usb1 { label = "usb1:blue"; gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; }; - usb2 { + led-usb2 { label = "usb2:blue"; gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; }; - usb3 { + led-usb3 { label = "usb3:blue"; gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; }; - usb4 { + led-usb4 { label = "usb4:blue"; gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; }; - otb { + led-otb { label = "otb:blue"; gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts index 91409ae949c4..039362152650 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-iomega_ix2_200.dts @@ -127,20 +127,20 @@ &pmx_led_rebuild &pmx_led_health >; pinctrl-names = "default"; - power_led { + led-power-led { label = "status:white:power_led"; gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; default-state = "keep"; }; - rebuild_led { + led-rebuild-led { label = "status:white:rebuild_led"; gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; }; - health_led { + led-health-led { label = "status:red:health_led"; gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; }; - backup_led { + led-backup-led { label = "status:blue:backup_led"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts index 094854743dde..974bc9de4702 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-l-50.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-l-50.dts @@ -97,52 +97,52 @@ leds { compatible = "gpio-leds"; - status_green { + led-status-green { label = "l-50:green:status"; gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; }; - status_red { + led-status-red { label = "l-50:red:status"; gpios = <&gpio3 2 GPIO_ACTIVE_LOW>; }; - wifi { + led-wifi { label = "l-50:green:wifi"; gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; linux,default-trigger = "phy0tpt"; }; - internet_green { + led-internet-green { label = "l-50:green:internet"; gpios = <&gpio2 3 GPIO_ACTIVE_LOW>; }; - internet_red { + led-internet-red { label = "l-50:red:internet"; gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; }; - usb1_green { + led-usb1-green { label = "l-50:green:usb1"; gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; linux,default-trigger = "usbport"; trigger-sources = <&hub_port3>; }; - usb1_red { + led-usb1-red { label = "l-50:red:usb1"; gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; }; - usb2_green { + led-usb2-green { label = "l-50:green:usb2"; gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; linux,default-trigger = "usbport"; trigger-sources = <&hub_port1>; }; - usb2_red { + led-usb2-red { label = "l-50:red:usb2"; gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-laplug.dts b/arch/arm/boot/dts/marvell/kirkwood-laplug.dts index 8296486a5931..90ea6cdee8e0 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-laplug.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-laplug.dts @@ -61,11 +61,11 @@ gpio-leds { compatible = "gpio-leds"; - red-fail { + led-red-fail { label = "laplug_v2:red:power"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; - blue-power { + led-blue-power { label = "laplug_v2:blue:power"; gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; linux,default-trigger = "default-on"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts index ddefaf628501..8a1c38ab6111 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-linksys-viper.dts @@ -54,12 +54,12 @@ pinctrl-0 = < &pmx_led_white_health &pmx_led_white_pulse >; pinctrl-names = "default"; - white-health { + led-white-health { label = "viper:white:health"; gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; }; - white-pulse { + led-white-pulse { label = "viper:white:pulse"; gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi index c0f80146706d..5e0b139dd4fb 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-lsxl.dtsi @@ -137,28 +137,28 @@ &pmx_led_function_blue>; pinctrl-names = "default"; - func_blue { + led-func-blue { label = "lsxl:blue:func"; gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; }; - alarm { + led-alarm { label = "lsxl:red:alarm"; gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; }; - info { + led-info { label = "lsxl:amber:info"; gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; }; - power { + led-power { label = "lsxl:blue:power"; gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; default-state = "keep"; }; - func_red { + led-func-red { label = "lsxl:red:func"; gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-mplcec4.dts b/arch/arm/boot/dts/marvell/kirkwood-mplcec4.dts index e87ea7146546..6533b49a15b2 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-mplcec4.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-mplcec4.dts @@ -114,36 +114,36 @@ >; pinctrl-names = "default"; - health { + led-health { label = "status:green:health"; gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; }; - user1o { + led-user1o { label = "user1:orange"; gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; default-state = "on"; }; - user1g { + led-user1g { label = "user1:green"; gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; default-state = "on"; }; - user0o { + led-user0o { label = "user0:orange"; gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; default-state = "on"; }; - user0g { + led-user0g { label = "user0:green"; gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; default-state = "on"; }; - misc { + led-misc { label = "status:orange:misc"; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; default-state = "on"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts b/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts index fd3813ace0c1..e3b41784c876 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-mv88f6281gtw-ge.dts @@ -73,17 +73,17 @@ pinctrl-0 = <&pmx_leds &pmx_usb_led>; pinctrl-names = "default"; - green-status { + led-green-status { label = "gtw:green:Status"; gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; }; - red-status { + led-red-status { label = "gtw:red:Status"; gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>; }; - green-usb { + led-green-usb { label = "gtw:green:USB"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi b/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi index 28f09f71b24d..d6b615cf6390 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-ns2-common.dtsi @@ -66,7 +66,7 @@ gpio-leds { compatible = "gpio-leds"; - red-fail { + led-red-fail { label = "ns2:red:fail"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-ns2lite.dts b/arch/arm/boot/dts/marvell/kirkwood-ns2lite.dts index b0cb5907ed63..686bcd6f0f3c 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-ns2lite.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-ns2lite.dts @@ -24,7 +24,7 @@ gpio-leds { compatible = "gpio-leds"; - blue-sata { + led-blue-sata { label = "ns2:blue:sata"; gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; linux,default-trigger = "disk-activity"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa310.dts b/arch/arm/boot/dts/marvell/kirkwood-nsa310.dts index c1799a07816e..3555ac1c3b15 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa310.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa310.dts @@ -87,43 +87,43 @@ &pmx_led_hdd_green &pmx_led_hdd_red>; pinctrl-names = "default"; - green-sys { + led-green-sys { label = "nsa310:green:sys"; gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; }; - red-sys { + led-red-sys { label = "nsa310:red:sys"; gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; }; - green-hdd { + led-green-hdd { label = "nsa310:green:hdd"; gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; }; - red-hdd { + led-red-hdd { label = "nsa310:red:hdd"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; }; - green-esata { + led-green-esata { label = "nsa310:green:esata"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; - red-esata { + led-red-esata { label = "nsa310:red:esata"; gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; }; - green-usb { + led-green-usb { label = "nsa310:green:usb"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; }; - red-usb { + led-red-usb { label = "nsa310:red:usb"; gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; }; - green-copy { + led-green-copy { label = "nsa310:green:copy"; gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; }; - red-copy { + led-red-copy { label = "nsa310:red:copy"; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa310a.dts b/arch/arm/boot/dts/marvell/kirkwood-nsa310a.dts index b85e314f045a..ddf84092aade 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa310a.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa310a.dts @@ -75,39 +75,39 @@ gpio-leds { compatible = "gpio-leds"; - green-sys { + led-green-sys { label = "nsa310:green:sys"; gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; }; - red-sys { + led-red-sys { label = "nsa310:red:sys"; gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; }; - green-hdd { + led-green-hdd { label = "nsa310:green:hdd"; gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; }; - red-hdd { + led-red-hdd { label = "nsa310:red:hdd"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; }; - green-esata { + led-green-esata { label = "nsa310:green:esata"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; - red-esata { + led-red-esata { label = "nsa310:red:esata"; gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; }; - green-usb { + led-green-usb { label = "nsa310:green:usb"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; }; - green-copy { + led-green-copy { label = "nsa310:green:copy"; gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; }; - red-copy { + led-red-copy { label = "nsa310:red:copy"; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa320.dts b/arch/arm/boot/dts/marvell/kirkwood-nsa320.dts index 652405e65006..dd5c8ffc8781 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa320.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa320.dts @@ -142,39 +142,39 @@ &pmx_led_hdd1_green &pmx_led_hdd1_red>; pinctrl-names = "default"; - green-sys { + led-green-sys { label = "nsa320:green:sys"; gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; }; - orange-sys { + led-orange-sys { label = "nsa320:orange:sys"; gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; }; - green-hdd1 { + led-green-hdd1 { label = "nsa320:green:hdd1"; gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; }; - red-hdd1 { + led-red-hdd1 { label = "nsa320:red:hdd1"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; }; - green-hdd2 { + led-green-hdd2 { label = "nsa320:green:hdd2"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; - red-hdd2 { + led-red-hdd2 { label = "nsa320:red:hdd2"; gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; }; - green-usb { + led-green-usb { label = "nsa320:green:usb"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; }; - green-copy { + led-green-copy { label = "nsa320:green:copy"; gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; }; - red-copy { + led-red-copy { label = "nsa320:red:copy"; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts b/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts index 371456de34b2..f0786a5f2ce6 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-nsa325.dts @@ -162,39 +162,39 @@ &pmx_led_hdd1_green &pmx_led_hdd1_red>; pinctrl-names = "default"; - green-sys { + led-green-sys { label = "nsa325:green:sys"; gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; }; - orange-sys { + led-orange-sys { label = "nsa325:orange:sys"; gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; }; - green-hdd1 { + led-green-hdd1 { label = "nsa325:green:hdd1"; gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; }; - red-hdd1 { + led-red-hdd1 { label = "nsa325:red:hdd1"; gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; }; - green-hdd2 { + led-green-hdd2 { label = "nsa325:green:hdd2"; gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; }; - red-hdd2 { + led-red-hdd2 { label = "nsa325:red:hdd2"; gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; }; - green-usb { + led-green-usb { label = "nsa325:green:usb"; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; }; - green-copy { + led-green-copy { label = "nsa325:green:copy"; gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; }; - red-copy { + led-red-copy { label = "nsa325:red:copy"; gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts b/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts index f9e95e55f36d..39a5345332da 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-pogo_e02.dts @@ -33,12 +33,12 @@ gpio-leds { compatible = "gpio-leds"; - health { + led-health { label = "pogo_e02:green:health"; gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; default-state = "keep"; }; - fault { + led-fault { label = "pogo_e02:orange:fault"; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts index b66fc4d57410..0e9c4cf79822 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-pogoplug-series-4.dts @@ -46,12 +46,12 @@ pinctrl-0 = <&pmx_led_green &pmx_led_red>; pinctrl-names = "default"; - health { + led-health { label = "pogoplugv4:green:health"; gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; default-state = "on"; }; - fault { + led-fault { label = "pogoplugv4:red:fault"; gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-esata.dts b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-esata.dts index ae8f493c9a0f..eb185273376e 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-esata.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug-esata.dts @@ -33,7 +33,7 @@ pinctrl-0 = <&pmx_led_blue>; pinctrl-names = "default"; - health { + led-health { label = "sheevaplug:blue:health"; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; default-state = "keep"; diff --git a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts index c73cc904e5c4..ce73fcf2255f 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts +++ b/arch/arm/boot/dts/marvell/kirkwood-sheevaplug.dts @@ -28,13 +28,13 @@ pinctrl-0 = <&pmx_led_blue &pmx_led_red>; pinctrl-names = "default"; - health { + led-health { label = "sheevaplug:blue:health"; gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; default-state = "keep"; }; - misc { + led-misc { label = "sheevaplug:red:misc"; gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi b/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi index 20964eb48fd7..6b7c5218b1fb 100644 --- a/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi +++ b/arch/arm/boot/dts/marvell/kirkwood-synology.dtsi @@ -410,7 +410,7 @@ pinctrl-0 = <&pmx_alarmled_12>; pinctrl-names = "default"; - hdd1-green { + led-hdd1-green { label = "synology:alarm"; gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; }; @@ -424,42 +424,42 @@ &pmx_hddled_26 &pmx_hddled_27>; pinctrl-names = "default"; - hdd1-green { + led-hdd1-green { label = "synology:green:hdd1"; gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; }; - hdd1-amber { + led-hdd1-amber { label = "synology:amber:hdd1"; gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; }; - hdd2-green { + led-hdd2-green { label = "synology:green:hdd2"; gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; }; - hdd2-amber { + led-hdd2-amber { label = "synology:amber:hdd2"; gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; }; - hdd3-green { + led-hdd3-green { label = "synology:green:hdd3"; gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; }; - hdd3-amber { + led-hdd3-amber { label = "synology:amber:hdd3"; gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; }; - hdd4-green { + led-hdd4-green { label = "synology:green:hdd4"; gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; }; - hdd4-amber { + led-hdd4-amber { label = "synology:amber:hdd4"; gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; }; @@ -471,12 +471,12 @@ pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23>; pinctrl-names = "default"; - hdd1-green { + led-hdd1-green { label = "synology:green:hdd1"; gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; }; - hdd1-amber { + led-hdd1-amber { label = "synology:amber:hdd1"; gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; }; @@ -488,22 +488,22 @@ pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23 &pmx_hddled_20 &pmx_hddled_22>; pinctrl-names = "default"; - hdd1-green { + led-hdd1-green { label = "synology:green:hdd1"; gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; }; - hdd1-amber { + led-hdd1-amber { label = "synology:amber:hdd1"; gpios = <&gpio0 23 GPIO_ACTIVE_LOW>; }; - hdd2-green { + led-hdd2-green { label = "synology:green:hdd2"; gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; }; - hdd2-amber { + led-hdd2-amber { label = "synology:amber:hdd2"; gpios = <&gpio0 22 GPIO_ACTIVE_LOW>; }; @@ -518,52 +518,52 @@ &pmx_hddled_45>; pinctrl-names = "default"; - hdd1-green { + led-hdd1-green { label = "synology:green:hdd1"; gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; }; - hdd1-amber { + led-hdd1-amber { label = "synology:amber:hdd1"; gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; }; - hdd2-green { + led-hdd2-green { label = "synology:green:hdd2"; gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; }; - hdd2-amber { + led-hdd2-amber { label = "synology:amber:hdd2"; gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; }; - hdd3-green { + led-hdd3-green { label = "synology:green:hdd3"; gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; }; - hdd3-amber { + led-hdd3-amber { label = "synology:amber:hdd3"; gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; }; - hdd4-green { + led-hdd4-green { label = "synology:green:hdd4"; gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; }; - hdd4-amber { + led-hdd4-amber { label = "synology:amber:hdd4"; gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; }; - hdd5-green { + led-hdd5-green { label = "synology:green:hdd5"; gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; }; - hdd5-amber { + led-hdd5-amber { label = "synology:amber:hdd5"; gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; }; @@ -575,22 +575,22 @@ pinctrl-0 = <&pmx_hddled_38 &pmx_hddled_39 &pmx_hddled_36 &pmx_hddled_37>; pinctrl-names = "default"; - hdd1-green { + led-hdd1-green { label = "synology:green:hdd1"; gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; }; - hdd1-amber { + led-hdd1-amber { label = "synology:amber:hdd1"; gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; }; - hdd2-green { + led-hdd2-green { label = "synology:green:hdd2"; gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; }; - hdd2-amber { + led-hdd2-amber { label = "synology:amber:hdd2"; gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; }; -- cgit From 85860863a4b2c216f399896d4fb1ec75b2dea64f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 16:56:37 +0200 Subject: ARM: dts: marvell: orion: align GPIO keys node name with bindings Bindings expect the GPIO key node names to follow certain pattern, see dtbs_check warnings: orion5x-lacie-d2-network.dtb: gpio-keys: 'front_button', 'power_rocker_sw_off', 'power_rocker_sw_on' do not match any of the regexes: '^(button|event|key|switch| ... Signed-off-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts | 7 ++++--- arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts | 2 +- arch/arm/boot/dts/marvell/orion5x-lswsgl.dts | 7 ++++--- arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts | 5 +++-- arch/arm/boot/dts/marvell/orion5x-netgear-wnr854t.dts | 2 +- 5 files changed, 13 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts b/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts index 03471d30bfd9..3d6c5af0e843 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts @@ -37,20 +37,21 @@ pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; - front_button { + + button-front { label = "Front Push Button"; linux,code = ; gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; }; - power_rocker_sw_on { + switch-power-rocker-sw-on { label = "Power rocker switch (on|auto)"; linux,input-type = <5>; /* EV_SW */ linux,code = <1>; /* D2NET_SWITCH_POWER_ON */ gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; }; - power_rocker_sw_off { + switch-power-rocker-sw-off { label = "Power rocker switch (auto|off)"; linux,input-type = <5>; /* EV_SW */ linux,code = <2>; /* D2NET_SWITCH_POWER_OFF */ diff --git a/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts b/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts index ee751995c8d0..624b737a8be4 100644 --- a/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts +++ b/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts @@ -61,7 +61,7 @@ }; gpio_keys { - func { + func-button { label = "Function Button"; linux,code = ; gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts index 2fbc17d6dfa4..e2829fb0c8b2 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts @@ -76,20 +76,21 @@ pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; - func { + + key-func { label = "Function Button"; linux,code = ; gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; }; - power { + key-power { label = "Power-on Switch"; linux,input-type = <5>; /* EV_SW */ linux,code = ; /* LSMINI_SW_POWER */ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; }; - autopower { + key-autopower { label = "Power-auto Switch"; linux,input-type = <5>; /* EV_SW */ linux,code = ; /* LSMINI_SW_AUTOPOWER */ diff --git a/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts b/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts index d57859998350..90ce5fa883a4 100644 --- a/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts +++ b/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts @@ -37,13 +37,14 @@ pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; - power { + + key-power { label = "Power"; linux,code = ; gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; }; - reset { + key-reset { label = "Reset"; linux,code = ; gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/marvell/orion5x-netgear-wnr854t.dts b/arch/arm/boot/dts/marvell/orion5x-netgear-wnr854t.dts index fb203e7d37f5..d63ea15539aa 100644 --- a/arch/arm/boot/dts/marvell/orion5x-netgear-wnr854t.dts +++ b/arch/arm/boot/dts/marvell/orion5x-netgear-wnr854t.dts @@ -35,7 +35,7 @@ pinctrl-0 = <&pmx_reset_button>; pinctrl-names = "default"; - reset { + key-reset { label = "Reset Button"; linux,code = ; gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; -- cgit From 7d751583a086123768be06ef8acdec7a516ffcbc Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 16:56:38 +0200 Subject: ARM: dts: marvell: orion: drop incorrect address/size-cells in GPIO keys Bindings do not allow address/size-cells in GPIO keys and the GPIO keys is not a bus, see dtbs_check warnings: orion5x-lacie-ethernet-disk-mini-v2.dtb: gpio-keys: '#address-cells', '#size-cells' do not match any of the regexes: '^(button|event|key|switch|... Signed-off-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/mvebu-linkstation-gpio-simple.dtsi | 2 -- arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts | 2 -- arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts | 5 ++--- arch/arm/boot/dts/marvell/orion5x-lswsgl.dts | 2 -- arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts | 2 -- 5 files changed, 2 insertions(+), 11 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/mvebu-linkstation-gpio-simple.dtsi b/arch/arm/boot/dts/marvell/mvebu-linkstation-gpio-simple.dtsi index c2d87ba6190a..055ac754c5fd 100644 --- a/arch/arm/boot/dts/marvell/mvebu-linkstation-gpio-simple.dtsi +++ b/arch/arm/boot/dts/marvell/mvebu-linkstation-gpio-simple.dtsi @@ -48,8 +48,6 @@ / { gpio_keys { compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; pinctrl-0 = <&pmx_power_switch>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts b/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts index 3d6c5af0e843..12a4aac2633e 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lacie-d2-network.dts @@ -35,8 +35,6 @@ compatible = "gpio-keys"; pinctrl-0 = <&pmx_buttons>; pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; button-front { label = "Front Push Button"; diff --git a/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts index f17e25ac98dd..a7586370b1d5 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts @@ -39,9 +39,8 @@ compatible = "gpio-keys"; pinctrl-0 = <&pmx_power_button>; pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - button@1 { + + button-1 { label = "Power-on Switch"; linux,code = ; gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts index e2829fb0c8b2..35dffb24b8b5 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts @@ -74,8 +74,6 @@ compatible = "gpio-keys"; pinctrl-0 = <&pmx_buttons>; pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; key-func { label = "Function Button"; diff --git a/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts b/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts index 90ce5fa883a4..cb1bd24b7ae3 100644 --- a/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts +++ b/arch/arm/boot/dts/marvell/orion5x-maxtor-shared-storage-2.dts @@ -35,8 +35,6 @@ compatible = "gpio-keys"; pinctrl-0 = <&pmx_buttons>; pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; key-power { label = "Power"; -- cgit From d8fff5ef3ef5345cc68b470e59832339890d2fd3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 16:56:39 +0200 Subject: ARM: dts: marvell: orion5x-lswsgl: use 'gpios' property for LEDs The 'gpio' property in GPIO LEDs is deprecated, as reported by dtbs_check: orion5x-lswsgl.dtb: gpio-leds: led-alarm: Unevaluated properties are not allowed ('gpio' was unexpected) Signed-off-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/orion5x-lswsgl.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts index 35dffb24b8b5..802cd6ff6169 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts @@ -104,22 +104,22 @@ alarm { label = "lswsgl:alarm:red"; - gpio = <&gpio0 2 GPIO_ACTIVE_LOW>; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; }; info { label = "lswsgl:info:amber"; - gpio = <&gpio0 3 GPIO_ACTIVE_LOW>; + gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; }; func { label = "lswsgl:func:blue:top"; - gpio = <&gpio0 9 GPIO_ACTIVE_LOW>; + gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; }; power { label = "lswsgl:power:blue:bottom"; - gpio = <&gpio0 14 GPIO_ACTIVE_LOW>; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; default-state = "on"; }; }; -- cgit From 5b3566a75f2d749fbfef5fb4f5acfd1754333252 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 1 Jul 2024 16:56:40 +0200 Subject: ARM: dts: marvell: orion: align LED node name with bindings Bindings expect the LED node names to follow certain pattern, see dtbs_check warnings: orion5x-lswsgl.dtb: gpio-leds: led-alarm: Unevaluated properties are not allowed ('gpio' was unexpected) Signed-off-by: Krzysztof Kozlowski Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts | 2 +- arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts | 2 +- arch/arm/boot/dts/marvell/orion5x-lswsgl.dts | 8 ++++---- arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts b/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts index a7586370b1d5..f81acb9b7223 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lacie-ethernet-disk-mini-v2.dts @@ -52,7 +52,7 @@ pinctrl-0 = <&pmx_power_led>; pinctrl-names = "default"; - led@1 { + led-1 { label = "power:blue"; gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts b/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts index 624b737a8be4..79fee048c900 100644 --- a/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts +++ b/arch/arm/boot/dts/marvell/orion5x-linkstation-lschl.dts @@ -90,7 +90,7 @@ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; }; - func { + func-led { label = "lschl:func:blue:top"; gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts index 802cd6ff6169..e0da406c430f 100644 --- a/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts +++ b/arch/arm/boot/dts/marvell/orion5x-lswsgl.dts @@ -102,22 +102,22 @@ &pmx_led_power>; pinctrl-names = "default"; - alarm { + led-alarm { label = "lswsgl:alarm:red"; gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; }; - info { + led-info { label = "lswsgl:info:amber"; gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; }; - func { + led-func { label = "lswsgl:func:blue:top"; gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; }; - power { + led-power { label = "lswsgl:power:blue:bottom"; gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; default-state = "on"; diff --git a/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts b/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts index fd78aa02a3c5..75ab913b21e5 100644 --- a/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts +++ b/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts @@ -32,7 +32,7 @@ pinctrl-0 = <&pmx_debug_led>; pinctrl-names = "default"; - led@0 { + led-0 { label = "rd88f5182:cpu"; linux,default-trigger = "heartbeat"; gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; -- cgit From 3333d21af6fade5215bf0803fd8ef3c4c9d46fd4 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Mon, 17 Jun 2024 11:14:18 +0200 Subject: ARM: dts: stm32: OP-TEE async notif interrupt for ST STM32MP15x boards Define the GIC interrupt (PPI 15) to be used on ST STM32MP15x boards for OP-TEE async notif. Signed-off-by: Etienne Carriere Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts | 5 +++++ arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts | 5 +++++ arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts | 5 +++++ arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts | 5 +++++ 4 files changed, 20 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts index 306e1bc2a514..847b360f02fc 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts @@ -62,6 +62,11 @@ reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts index 956da5f26c1c..43280289759d 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts @@ -68,6 +68,11 @@ reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts index 8e4b0db198c2..6f27d794d270 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts @@ -67,6 +67,11 @@ reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts index 72b9cab2d990..6ae391bffee5 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts @@ -72,6 +72,11 @@ reset-names = "mcu_rst", "hold_boot"; }; +&optee { + interrupt-parent = <&intc>; + interrupts = ; +}; + &rcc { compatible = "st,stm32mp1-rcc-secure", "syscon"; clock-names = "hse", "hsi", "csi", "lse", "lsi"; -- cgit From 710d4f79bd430aec8c2b1edbd54b4370ac0b5f1b Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 13 Jun 2024 10:02:28 +0200 Subject: ARM: dts: stm32: Document output pins for PWMs on stm32mp135f-dk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To simplify identifying the pins where the PWM output is routed to, add a comment to each PWM device about the respective pin on the expansion connector. Signed-off-by: Uwe Kleine-König Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index 970de441fbaa..faccdda588e5 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -374,6 +374,7 @@ /delete-property/dma-names; status = "disabled"; pwm { + /* PWM output on pin 7 of the expansion connector (CN8.7) using TIM3_CH4 func */ pinctrl-0 = <&pwm3_pins_a>; pinctrl-1 = <&pwm3_sleep_pins_a>; pinctrl-names = "default", "sleep"; @@ -389,6 +390,7 @@ /delete-property/dma-names; status = "disabled"; pwm { + /* PWM output on pin 31 of the expansion connector (CN8.31) using TIM4_CH2 func */ pinctrl-0 = <&pwm4_pins_a>; pinctrl-1 = <&pwm4_sleep_pins_a>; pinctrl-names = "default", "sleep"; @@ -404,6 +406,7 @@ /delete-property/dma-names; status = "disabled"; pwm { + /* PWM output on pin 32 of the expansion connector (CN8.32) using TIM8_CH3 func */ pinctrl-0 = <&pwm8_pins_a>; pinctrl-1 = <&pwm8_sleep_pins_a>; pinctrl-names = "default", "sleep"; @@ -417,6 +420,7 @@ &timers14 { status = "disabled"; pwm { + /* PWM output on pin 33 of the expansion connector (CN8.33) using TIM14_CH1 func */ pinctrl-0 = <&pwm14_pins_a>; pinctrl-1 = <&pwm14_sleep_pins_a>; pinctrl-names = "default", "sleep"; -- cgit From 0872f840edc9a163a9be46760f81631a8c7efa0f Mon Sep 17 00:00:00 2001 From: Christophe Roullier Date: Mon, 10 Jun 2024 10:03:07 +0200 Subject: ARM: dts: stm32: add ethernet1 and ethernet2 support on stm32mp13 Both instances ethernet based on GMAC SNPS IP on stm32mp13. GMAC IP version is SNPS 4.20. Signed-off-by: Christophe Roullier Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp131.dtsi | 38 ++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/st/stm32mp133.dtsi | 31 +++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index 6704ceef284d..e1a764d269d2 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -979,6 +979,12 @@ ts_cal2: calib@5e { reg = <0x5e 0x2>; }; + ethernet_mac1_address: mac1@e4 { + reg = <0xe4 0x6>; + }; + ethernet_mac2_address: mac2@ea { + reg = <0xea 0x6>; + }; }; etzpc: bus@5c007000 { @@ -1505,6 +1511,38 @@ status = "disabled"; }; + ethernet1: ethernet@5800a000 { + compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a"; + reg = <0x5800a000 0x2000>; + reg-names = "stmmaceth"; + interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, + <&exti 68 1>; + interrupt-names = "macirq", "eth_wake_irq"; + clock-names = "stmmaceth", + "mac-clk-tx", + "mac-clk-rx", + "ethstp", + "eth-ck"; + clocks = <&rcc ETH1MAC>, + <&rcc ETH1TX>, + <&rcc ETH1RX>, + <&rcc ETH1STP>, + <&rcc ETH1CK_K>; + st,syscon = <&syscfg 0x4 0xff0000>; + snps,mixed-burst; + snps,pbl = <2>; + snps,axi-config = <&stmmac_axi_config_1>; + snps,tso; + access-controllers = <&etzpc 48>; + status = "disabled"; + + stmmac_axi_config_1: stmmac-axi-config { + snps,blen = <0 0 0 0 16 8 4>; + snps,rd_osr_lmt = <0x7>; + snps,wr_osr_lmt = <0x7>; + }; + }; + usbphyc: usbphyc@5a006000 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi index 3e394c8e58b9..73e470019ce4 100644 --- a/arch/arm/boot/dts/st/stm32mp133.dtsi +++ b/arch/arm/boot/dts/st/stm32mp133.dtsi @@ -68,4 +68,35 @@ }; }; }; + + ethernet2: ethernet@5800e000 { + compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a"; + reg = <0x5800e000 0x2000>; + reg-names = "stmmaceth"; + interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clock-names = "stmmaceth", + "mac-clk-tx", + "mac-clk-rx", + "ethstp", + "eth-ck"; + clocks = <&rcc ETH2MAC>, + <&rcc ETH2TX>, + <&rcc ETH2RX>, + <&rcc ETH2STP>, + <&rcc ETH2CK_K>; + st,syscon = <&syscfg 0x4 0xff000000>; + snps,mixed-burst; + snps,pbl = <2>; + snps,axi-config = <&stmmac_axi_config_2>; + snps,tso; + access-controllers = <&etzpc 49>; + status = "disabled"; + + stmmac_axi_config_2: stmmac-axi-config { + snps,blen = <0 0 0 0 16 8 4>; + snps,rd_osr_lmt = <0x7>; + snps,wr_osr_lmt = <0x7>; + }; + }; }; -- cgit From fbbfbdfe03522c72f22cb79b7bd920b99bc7c674 Mon Sep 17 00:00:00 2001 From: Christophe Roullier Date: Mon, 10 Jun 2024 10:03:08 +0200 Subject: ARM: dts: stm32: add ethernet1/2 RMII pins for STM32MP13F-DK board Those pins are used for Ethernet 1 and 2 on STM32MP13F-DK board. ethernet1: RMII with crystal. ethernet2: RMII without crystal. Add analog gpio pin configuration ("sleep") to manage power mode on stm32mp13. Signed-off-by: Christophe Roullier Reviewed-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 71 +++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index 22cd07196499..fc56be60cfcd 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -172,6 +172,77 @@ }; }; + eth1_rmii_pins_a: eth1-rmii-0 { + pins1 { + pinmux = , /* ETH_RMII_TXD0 */ + , /* ETH_RMII_TXD1 */ + , /* ETH_RMII_TX_EN */ + , /* ETH_RMII_REF_CLK */ + , /* ETH_MDIO */ + ; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = , /* ETH_RMII_RXD0 */ + , /* ETH_RMII_RXD1 */ + ; /* ETH_RMII_CRS_DV */ + bias-disable; + }; + + }; + + eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 { + pins1 { + pinmux = , /* ETH_RMII_TXD0 */ + , /* ETH_RMII_TXD1 */ + , /* ETH_RMII_TX_EN */ + , /* ETH_RMII_REF_CLK */ + , /* ETH_MDIO */ + , /* ETH_MDC */ + , /* ETH_RMII_RXD0 */ + , /* ETH_RMII_RXD1 */ + ; /* ETH_RMII_CRS_DV */ + }; + }; + + eth2_rmii_pins_a: eth2-rmii-0 { + pins1 { + pinmux = , /* ETH_RMII_TXD0 */ + , /* ETH_RMII_TXD1 */ + , /* ETH_RMII_ETHCK */ + , /* ETH_RMII_TX_EN */ + , /* ETH_MDIO */ + ; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = , /* ETH_RMII_RXD0 */ + , /* ETH_RMII_RXD1 */ + ; /* ETH_RMII_CRS_DV */ + bias-disable; + }; + }; + + eth2_rmii_sleep_pins_a: eth2-rmii-sleep-0 { + pins1 { + pinmux = , /* ETH_RMII_TXD0 */ + , /* ETH_RMII_TXD1 */ + , /* ETH_RMII_ETHCK */ + , /* ETH_RMII_TX_EN */ + , /* ETH_MDIO */ + , /* ETH_MDC */ + , /* ETH_RMII_RXD0 */ + , /* ETH_RMII_RXD1 */ + ; /* ETH_RMII_CRS_DV */ + }; + }; + i2c1_pins_a: i2c1-0 { pins { pinmux = , /* I2C1_SCL */ -- cgit From e9442f1fa4d2545dd6c0aaf7cb7a125cb04f8f2f Mon Sep 17 00:00:00 2001 From: Christophe Roullier Date: Mon, 10 Jun 2024 10:03:09 +0200 Subject: ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board Ethernet1: RMII with crystal Ethernet2: RMII with no cristal, need "phy-supply" property to work, today this property was managed by Ethernet glue, but should be present and managed in PHY node. So I will push second Ethernet in next step. PHYs used are SMSC (LAN8742A) Signed-off-by: Christophe Roullier Reviewed-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp135f-dk.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts index faccdda588e5..1af335a39993 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts @@ -19,6 +19,7 @@ compatible = "st,stm32mp135f-dk", "st,stm32mp135"; aliases { + ethernet0 = ðernet1; serial0 = &uart4; serial1 = &usart1; serial2 = &uart8; @@ -172,6 +173,28 @@ }; }; +ðernet1 { + status = "okay"; + pinctrl-0 = <ð1_rmii_pins_a>; + pinctrl-1 = <ð1_rmii_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + phy-mode = "rmii"; + phy-handle = <&phy0_eth1>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy0_eth1: ethernet-phy@0 { + compatible = "ethernet-phy-id0007.c131"; + reg = <0>; + reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + }; +}; + &i2c1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&i2c1_pins_a>; -- cgit From bf016e1db918ae5574b1f0e6d1fe844f9f125498 Mon Sep 17 00:00:00 2001 From: Alexandre Torgue Date: Thu, 27 Jun 2024 14:27:49 +0200 Subject: ARM: dts: stm32: order stm32mp13-pinctrl nodes Keep alphabetic order for pins definition nodes for a better read. Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 130 ++++++++++++++-------------- 1 file changed, 65 insertions(+), 65 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index fc56be60cfcd..0f3b752620bb 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -19,6 +19,13 @@ }; }; + adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 { + pins { + pinmux = , /* ADC1_INP2 */ + ; /* ADC1_INP11 */ + }; + }; + dcmipp_pins_a: dcmi-0 { pins1 { pinmux = ,/* DCMI_HSYNC */ @@ -52,35 +59,6 @@ }; }; - goodix_pins_a: goodix-0 { - /* - * touchscreen reset needs to be configured - * via the pinctrl not the driver (a pull-down resistor - * has been soldered onto the reset line which forces - * the touchscreen to reset state). - */ - pins1 { - pinmux = ; - output-high; - bias-pull-up; - }; - /* - * Interrupt line must have a pull-down resistor - * in order to freeze the i2c address at 0x5D - */ - pins2 { - pinmux = ; - bias-pull-down; - }; - }; - - adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 { - pins { - pinmux = , /* ADC1_INP2 */ - ; /* ADC1_INP11 */ - }; - }; - eth1_rgmii_pins_a: eth1-rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_TXD0 */ @@ -127,6 +105,42 @@ }; }; + eth1_rmii_pins_a: eth1-rmii-0 { + pins1 { + pinmux = , /* ETH_RMII_TXD0 */ + , /* ETH_RMII_TXD1 */ + , /* ETH_RMII_TX_EN */ + , /* ETH_RMII_REF_CLK */ + , /* ETH_MDIO */ + ; /* ETH_MDC */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = , /* ETH_RMII_RXD0 */ + , /* ETH_RMII_RXD1 */ + ; /* ETH_RMII_CRS_DV */ + bias-disable; + }; + + }; + + eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 { + pins1 { + pinmux = , /* ETH_RMII_TXD0 */ + , /* ETH_RMII_TXD1 */ + , /* ETH_RMII_TX_EN */ + , /* ETH_RMII_REF_CLK */ + , /* ETH_MDIO */ + , /* ETH_MDC */ + , /* ETH_RMII_RXD0 */ + , /* ETH_RMII_RXD1 */ + ; /* ETH_RMII_CRS_DV */ + }; + }; + eth2_rgmii_pins_a: eth2-rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_TXD0 */ @@ -172,42 +186,6 @@ }; }; - eth1_rmii_pins_a: eth1-rmii-0 { - pins1 { - pinmux = , /* ETH_RMII_TXD0 */ - , /* ETH_RMII_TXD1 */ - , /* ETH_RMII_TX_EN */ - , /* ETH_RMII_REF_CLK */ - , /* ETH_MDIO */ - ; /* ETH_MDC */ - bias-disable; - drive-push-pull; - slew-rate = <1>; - }; - - pins2 { - pinmux = , /* ETH_RMII_RXD0 */ - , /* ETH_RMII_RXD1 */ - ; /* ETH_RMII_CRS_DV */ - bias-disable; - }; - - }; - - eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 { - pins1 { - pinmux = , /* ETH_RMII_TXD0 */ - , /* ETH_RMII_TXD1 */ - , /* ETH_RMII_TX_EN */ - , /* ETH_RMII_REF_CLK */ - , /* ETH_MDIO */ - , /* ETH_MDC */ - , /* ETH_RMII_RXD0 */ - , /* ETH_RMII_RXD1 */ - ; /* ETH_RMII_CRS_DV */ - }; - }; - eth2_rmii_pins_a: eth2-rmii-0 { pins1 { pinmux = , /* ETH_RMII_TXD0 */ @@ -243,6 +221,28 @@ }; }; + goodix_pins_a: goodix-0 { + /* + * touchscreen reset needs to be configured + * via the pinctrl not the driver (a pull-down resistor + * has been soldered onto the reset line which forces + * the touchscreen to reset state). + */ + pins1 { + pinmux = ; + output-high; + bias-pull-up; + }; + /* + * Interrupt line must have a pull-down resistor + * in order to freeze the i2c address at 0x5D + */ + pins2 { + pinmux = ; + bias-pull-down; + }; + }; + i2c1_pins_a: i2c1-0 { pins { pinmux = , /* I2C1_SCL */ -- cgit From 1b02383c385b16b4b275e30a3dd5860c0fd95c4a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 23 Jun 2024 21:51:56 +0200 Subject: ARM: dts: stm32: Add ethernet support for DH STM32MP13xx DHCOR DHSBC board Add ethernet support for the DH STM32MP13xx DHCOR DHSBC carrier board. This carrier board is populated with two gigabit ethernet ports and two Realtek RTL8211F PHYs, both are described in this DT patch. Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts | 56 ++++++++++++++++++++++++ 1 file changed, 56 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts index 5f4f6b6e427a..bacb70b4256b 100644 --- a/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts +++ b/arch/arm/boot/dts/st/stm32mp135f-dhcor-dhsbc.dts @@ -22,6 +22,8 @@ "st,stm32mp135"; aliases { + ethernet0 = ðernet1; + ethernet1 = ðernet2; serial2 = &usart1; serial3 = &usart2; }; @@ -72,6 +74,60 @@ }; }; +ðernet1 { + phy-handle = <ðphy1>; + phy-mode = "rgmii-id"; + pinctrl-0 = <ð1_rgmii_pins_a>; + pinctrl-1 = <ð1_rgmii_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + st,ext-phyclk; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + ethphy1: ethernet-phy@1 { + /* RTL8211F */ + compatible = "ethernet-phy-id001c.c916"; + interrupt-parent = <&gpiog>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + reg = <1>; + reset-assert-us = <15000>; + reset-deassert-us = <55000>; + reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ðernet2 { + phy-handle = <ðphy2>; + phy-mode = "rgmii-id"; + pinctrl-0 = <ð2_rgmii_pins_a>; + pinctrl-1 = <ð2_rgmii_sleep_pins_a>; + pinctrl-names = "default", "sleep"; + st,ext-phyclk; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + ethphy2: ethernet-phy@1 { + /* RTL8211F */ + compatible = "ethernet-phy-id001c.c916"; + interrupt-parent = <&gpiog>; + interrupts = <15 IRQ_TYPE_LEVEL_LOW>; + reg = <1>; + reset-assert-us = <15000>; + reset-deassert-us = <55000>; + reset-gpios = <&gpiog 8 GPIO_ACTIVE_LOW>; + }; + }; +}; + &gpioa { gpio-line-names = "", "", "", "", "", "DHSBC_USB_PWR_CC1", "", "", -- cgit From 81e7b432f144155d791ae4ed8cb0ef78ddb532cf Mon Sep 17 00:00:00 2001 From: Alexandre Torgue Date: Fri, 5 Jul 2024 11:36:35 +0200 Subject: ARM: dts: stm32: omit unused pinctrl groups from stm32mp13 dtb files stm32mp13-pinctrl.dtsi contains nearly all pinctrl groups collected from all boards. Most of them end up unused by a board and only waste binary space. Add /omit-if-no-ref/ to the groups to scrub the unused groups from the dtbs. Use the following regex to update the file and drop two useless newlines too: s@^\t[^:]\+: [^ ]\+ {$@\t/omit-if-no-ref/\r&@ Signed-off-by: Marek Vasut Signed-off-by: Alexandre Torgue --- arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 92 ++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi index 0f3b752620bb..c9f588a65094 100644 --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi @@ -6,12 +6,14 @@ #include &pinctrl { + /omit-if-no-ref/ adc1_pins_a: adc1-pins-0 { pins { pinmux = ; /* ADC1 in12 */ }; }; + /omit-if-no-ref/ adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 { pins { pinmux = , /* ADC1 in6 */ @@ -19,6 +21,7 @@ }; }; + /omit-if-no-ref/ adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 { pins { pinmux = , /* ADC1_INP2 */ @@ -26,6 +29,7 @@ }; }; + /omit-if-no-ref/ dcmipp_pins_a: dcmi-0 { pins1 { pinmux = ,/* DCMI_HSYNC */ @@ -43,6 +47,7 @@ }; }; + /omit-if-no-ref/ dcmipp_sleep_pins_a: dcmi-sleep-0 { pins1 { pinmux = ,/* DCMI_HSYNC */ @@ -59,6 +64,7 @@ }; }; + /omit-if-no-ref/ eth1_rgmii_pins_a: eth1-rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_TXD0 */ @@ -83,9 +89,9 @@ ; /* ETH_RGMII_RX_CLK */ bias-disable; }; - }; + /omit-if-no-ref/ eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 { pins1 { pinmux = , /* ETH_RGMII_TXD0 */ @@ -105,6 +111,7 @@ }; }; + /omit-if-no-ref/ eth1_rmii_pins_a: eth1-rmii-0 { pins1 { pinmux = , /* ETH_RMII_TXD0 */ @@ -124,9 +131,9 @@ ; /* ETH_RMII_CRS_DV */ bias-disable; }; - }; + /omit-if-no-ref/ eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 { pins1 { pinmux = , /* ETH_RMII_TXD0 */ @@ -141,6 +148,7 @@ }; }; + /omit-if-no-ref/ eth2_rgmii_pins_a: eth2-rgmii-0 { pins1 { pinmux = , /* ETH_RGMII_TXD0 */ @@ -167,6 +175,7 @@ }; }; + /omit-if-no-ref/ eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 { pins1 { pinmux = , /* ETH_RGMII_TXD0 */ @@ -186,6 +195,7 @@ }; }; + /omit-if-no-ref/ eth2_rmii_pins_a: eth2-rmii-0 { pins1 { pinmux = , /* ETH_RMII_TXD0 */ @@ -207,6 +217,7 @@ }; }; + /omit-if-no-ref/ eth2_rmii_sleep_pins_a: eth2-rmii-sleep-0 { pins1 { pinmux = , /* ETH_RMII_TXD0 */ @@ -221,6 +232,7 @@ }; }; + /omit-if-no-ref/ goodix_pins_a: goodix-0 { /* * touchscreen reset needs to be configured @@ -243,6 +255,7 @@ }; }; + /omit-if-no-ref/ i2c1_pins_a: i2c1-0 { pins { pinmux = , /* I2C1_SCL */ @@ -253,6 +266,7 @@ }; }; + /omit-if-no-ref/ i2c1_sleep_pins_a: i2c1-sleep-0 { pins { pinmux = , /* I2C1_SCL */ @@ -260,6 +274,7 @@ }; }; + /omit-if-no-ref/ i2c5_pins_a: i2c5-0 { pins { pinmux = , /* I2C5_SCL */ @@ -270,6 +285,7 @@ }; }; + /omit-if-no-ref/ i2c5_sleep_pins_a: i2c5-sleep-0 { pins { pinmux = , /* I2C5_SCL */ @@ -277,6 +293,7 @@ }; }; + /omit-if-no-ref/ i2c5_pins_b: i2c5-1 { pins { pinmux = , /* I2C5_SCL */ @@ -287,6 +304,7 @@ }; }; + /omit-if-no-ref/ i2c5_sleep_pins_b: i2c5-sleep-1 { pins { pinmux = , /* I2C5_SCL */ @@ -294,6 +312,7 @@ }; }; + /omit-if-no-ref/ ltdc_pins_a: ltdc-0 { pins { pinmux = , /* LCD_CLK */ @@ -324,6 +343,7 @@ }; }; + /omit-if-no-ref/ ltdc_sleep_pins_a: ltdc-sleep-0 { pins { pinmux = , /* LCD_CLK */ @@ -351,6 +371,7 @@ }; }; + /omit-if-no-ref/ m_can1_pins_a: m-can1-0 { pins1 { pinmux = ; /* CAN1_TX */ @@ -364,6 +385,7 @@ }; }; + /omit-if-no-ref/ m_can1_sleep_pins_a: m_can1-sleep-0 { pins { pinmux = , /* CAN1_TX */ @@ -371,6 +393,7 @@ }; }; + /omit-if-no-ref/ m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */ @@ -384,6 +407,7 @@ }; }; + /omit-if-no-ref/ m_can2_sleep_pins_a: m_can2-sleep-0 { pins { pinmux = , /* CAN2_TX */ @@ -391,6 +415,7 @@ }; }; + /omit-if-no-ref/ mcp23017_pins_a: mcp23017-0 { pins { pinmux = ; @@ -398,6 +423,7 @@ }; }; + /omit-if-no-ref/ pwm3_pins_a: pwm3-0 { pins { pinmux = ; /* TIM3_CH4 */ @@ -407,12 +433,14 @@ }; }; + /omit-if-no-ref/ pwm3_sleep_pins_a: pwm3-sleep-0 { pins { pinmux = ; /* TIM3_CH4 */ }; }; + /omit-if-no-ref/ pwm4_pins_a: pwm4-0 { pins { pinmux = ; /* TIM4_CH2 */ @@ -422,12 +450,14 @@ }; }; + /omit-if-no-ref/ pwm4_sleep_pins_a: pwm4-sleep-0 { pins { pinmux = ; /* TIM4_CH2 */ }; }; + /omit-if-no-ref/ pwm5_pins_a: pwm5-0 { pins { pinmux = ; /* TIM5_CH3 */ @@ -437,12 +467,14 @@ }; }; + /omit-if-no-ref/ pwm5_sleep_pins_a: pwm5-sleep-0 { pins { pinmux = ; /* TIM5_CH3 */ }; }; + /omit-if-no-ref/ pwm8_pins_a: pwm8-0 { pins { pinmux = ; /* TIM8_CH3 */ @@ -452,12 +484,14 @@ }; }; + /omit-if-no-ref/ pwm8_sleep_pins_a: pwm8-sleep-0 { pins { pinmux = ; /* TIM8_CH3 */ }; }; + /omit-if-no-ref/ pwm13_pins_a: pwm13-0 { pins { pinmux = ; /* TIM13_CH1 */ @@ -467,12 +501,14 @@ }; }; + /omit-if-no-ref/ pwm13_sleep_pins_a: pwm13-sleep-0 { pins { pinmux = ; /* TIM13_CH1 */ }; }; + /omit-if-no-ref/ pwm14_pins_a: pwm14-0 { pins { pinmux = ; /* TIM14_CH1 */ @@ -482,12 +518,14 @@ }; }; + /omit-if-no-ref/ pwm14_sleep_pins_a: pwm14-sleep-0 { pins { pinmux = ; /* TIM14_CH1 */ }; }; + /omit-if-no-ref/ qspi_clk_pins_a: qspi-clk-0 { pins { pinmux = ; /* QSPI_CLK */ @@ -497,12 +535,14 @@ }; }; + /omit-if-no-ref/ qspi_clk_sleep_pins_a: qspi-clk-sleep-0 { pins { pinmux = ; /* QSPI_CLK */ }; }; + /omit-if-no-ref/ qspi_bk1_pins_a: qspi-bk1-0 { pins { pinmux = , /* QSPI_BK1_IO0 */ @@ -515,6 +555,7 @@ }; }; + /omit-if-no-ref/ qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 { pins { pinmux = , /* QSPI_BK1_IO0 */ @@ -524,6 +565,7 @@ }; }; + /omit-if-no-ref/ qspi_cs1_pins_a: qspi-cs1-0 { pins { pinmux = ; /* QSPI_BK1_NCS */ @@ -533,12 +575,14 @@ }; }; + /omit-if-no-ref/ qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 { pins { pinmux = ; /* QSPI_BK1_NCS */ }; }; + /omit-if-no-ref/ sai1a_pins_a: sai1a-0 { pins { pinmux = , /* SAI1_SCK_A */ @@ -550,6 +594,7 @@ }; }; + /omit-if-no-ref/ sai1a_sleep_pins_a: sai1a-sleep-0 { pins { pinmux = , /* SAI1_SCK_A */ @@ -558,6 +603,7 @@ }; }; + /omit-if-no-ref/ sai1b_pins_a: sai1b-0 { pins { pinmux = ; /* SAI1_SD_B */ @@ -565,12 +611,14 @@ }; }; + /omit-if-no-ref/ sai1b_sleep_pins_a: sai1b-sleep-0 { pins { pinmux = ; /* SAI1_SD_B */ }; }; + /omit-if-no-ref/ sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins { pinmux = , /* SDMMC1_D0 */ @@ -584,6 +632,7 @@ }; }; + /omit-if-no-ref/ sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { pins1 { pinmux = , /* SDMMC1_D0 */ @@ -602,6 +651,7 @@ }; }; + /omit-if-no-ref/ sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { pins { pinmux = , /* SDMMC1_D0 */ @@ -613,6 +663,7 @@ }; }; + /omit-if-no-ref/ sdmmc1_clk_pins_a: sdmmc1-clk-0 { pins { pinmux = ; /* SDMMC1_CK */ @@ -622,6 +673,7 @@ }; }; + /omit-if-no-ref/ sdmmc2_b4_pins_a: sdmmc2-b4-0 { pins { pinmux = , /* SDMMC2_D0 */ @@ -635,6 +687,7 @@ }; }; + /omit-if-no-ref/ sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { pins1 { pinmux = , /* SDMMC2_D0 */ @@ -653,6 +706,7 @@ }; }; + /omit-if-no-ref/ sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { pins { pinmux = , /* SDMMC2_D0 */ @@ -664,6 +718,7 @@ }; }; + /omit-if-no-ref/ sdmmc2_clk_pins_a: sdmmc2-clk-0 { pins { pinmux = ; /* SDMMC2_CK */ @@ -673,6 +728,7 @@ }; }; + /omit-if-no-ref/ sdmmc2_d47_pins_a: sdmmc2-d47-0 { pins { pinmux = , /* SDMMC2_D4 */ @@ -685,6 +741,7 @@ }; }; + /omit-if-no-ref/ sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 { pins { pinmux = , /* SDMMC2_D4 */ @@ -694,6 +751,7 @@ }; }; + /omit-if-no-ref/ spi2_pins_a: spi2-0 { pins1 { pinmux = , /* SPI2_SCK */ @@ -709,6 +767,7 @@ }; }; + /omit-if-no-ref/ spi2_sleep_pins_a: spi2-sleep-0 { pins { pinmux = , /* SPI2_SCK */ @@ -717,6 +776,7 @@ }; }; + /omit-if-no-ref/ spi3_pins_a: spi3-0 { pins1 { pinmux = , /* SPI3_SCK */ @@ -732,6 +792,7 @@ }; }; + /omit-if-no-ref/ spi3_sleep_pins_a: spi3-sleep-0 { pins { pinmux = , /* SPI3_SCK */ @@ -740,6 +801,7 @@ }; }; + /omit-if-no-ref/ spi5_pins_a: spi5-0 { pins1 { pinmux = , /* SPI5_SCK */ @@ -755,6 +817,7 @@ }; }; + /omit-if-no-ref/ spi5_sleep_pins_a: spi5-sleep-0 { pins { pinmux = , /* SPI5_SCK */ @@ -763,6 +826,7 @@ }; }; + /omit-if-no-ref/ stm32g0_intn_pins_a: stm32g0-intn-0 { pins { pinmux = ; @@ -770,6 +834,7 @@ }; }; + /omit-if-no-ref/ uart4_pins_a: uart4-0 { pins1 { pinmux = ; /* UART4_TX */ @@ -783,6 +848,7 @@ }; }; + /omit-if-no-ref/ uart4_idle_pins_a: uart4-idle-0 { pins1 { pinmux = ; /* UART4_TX */ @@ -793,6 +859,7 @@ }; }; + /omit-if-no-ref/ uart4_sleep_pins_a: uart4-sleep-0 { pins { pinmux = , /* UART4_TX */ @@ -800,6 +867,7 @@ }; }; + /omit-if-no-ref/ uart4_pins_b: uart4-1 { pins1 { pinmux = ; /* UART4_TX */ @@ -813,6 +881,7 @@ }; }; + /omit-if-no-ref/ uart4_idle_pins_b: uart4-idle-1 { pins1 { pinmux = ; /* UART4_TX */ @@ -823,6 +892,7 @@ }; }; + /omit-if-no-ref/ uart4_sleep_pins_b: uart4-sleep-1 { pins { pinmux = , /* UART4_TX */ @@ -830,6 +900,7 @@ }; }; + /omit-if-no-ref/ uart7_pins_a: uart7-0 { pins1 { pinmux = , /* UART7_TX */ @@ -845,6 +916,7 @@ }; }; + /omit-if-no-ref/ uart7_idle_pins_a: uart7-idle-0 { pins1 { pinmux = , /* UART7_TX */ @@ -862,6 +934,7 @@ }; }; + /omit-if-no-ref/ uart7_sleep_pins_a: uart7-sleep-0 { pins { pinmux = , /* UART7_TX */ @@ -871,6 +944,7 @@ }; }; + /omit-if-no-ref/ uart8_pins_a: uart8-0 { pins1 { pinmux = ; /* UART8_TX */ @@ -884,6 +958,7 @@ }; }; + /omit-if-no-ref/ uart8_idle_pins_a: uart8-idle-0 { pins1 { pinmux = ; /* UART8_TX */ @@ -894,6 +969,7 @@ }; }; + /omit-if-no-ref/ uart8_sleep_pins_a: uart8-sleep-0 { pins { pinmux = , /* UART8_TX */ @@ -901,6 +977,7 @@ }; }; + /omit-if-no-ref/ usart1_pins_a: usart1-0 { pins1 { pinmux = , /* USART1_TX */ @@ -916,6 +993,7 @@ }; }; + /omit-if-no-ref/ usart1_idle_pins_a: usart1-idle-0 { pins1 { pinmux = , /* USART1_TX */ @@ -933,6 +1011,7 @@ }; }; + /omit-if-no-ref/ usart1_sleep_pins_a: usart1-sleep-0 { pins { pinmux = , /* USART1_TX */ @@ -942,6 +1021,7 @@ }; }; + /omit-if-no-ref/ usart1_pins_b: usart1-1 { pins1 { pinmux = ; /* USART1_TX */ @@ -955,6 +1035,7 @@ }; }; + /omit-if-no-ref/ usart1_idle_pins_b: usart1-idle-1 { pins1 { pinmux = ; /* USART1_TX */ @@ -965,6 +1046,7 @@ }; }; + /omit-if-no-ref/ usart1_sleep_pins_b: usart1-sleep-1 { pins { pinmux = , /* USART1_TX */ @@ -972,6 +1054,7 @@ }; }; + /omit-if-no-ref/ usart2_pins_a: usart2-0 { pins1 { pinmux = , /* USART2_TX */ @@ -987,6 +1070,7 @@ }; }; + /omit-if-no-ref/ usart2_idle_pins_a: usart2-idle-0 { pins1 { pinmux = , /* USART2_TX */ @@ -1004,6 +1088,7 @@ }; }; + /omit-if-no-ref/ usart2_sleep_pins_a: usart2-sleep-0 { pins { pinmux = , /* USART2_TX */ @@ -1013,6 +1098,7 @@ }; }; + /omit-if-no-ref/ usart2_pins_b: usart2-1 { pins1 { pinmux = , /* USART2_TX */ @@ -1028,6 +1114,7 @@ }; }; + /omit-if-no-ref/ usart2_idle_pins_b: usart2-idle-1 { pins1 { pinmux = , /* USART2_TX */ @@ -1045,6 +1132,7 @@ }; }; + /omit-if-no-ref/ usart2_sleep_pins_b: usart2-sleep-1 { pins { pinmux = , /* USART2_TX */ -- cgit From cfa65ef7c84adafcbd1f9c7ba349812e1692d0a2 Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 1 Jul 2024 13:30:09 +0200 Subject: ARM: dts: turris-omnia: Add MCU system-controller node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Turris Omnia's MCU provides various features that can be configured over I2C at address 0x2a. Add device-tree node. This does not carry a Fixes tag - we do not want this to get backported to stable kernels for the following reason: U-Boot since v2022.10 inserts a phy-reset-gpio property into the WAN ethernet node pointing to the MCU node if it finds the MCU node with a cznic,turris-omnia-mcu compatible. Thus if this change got backported to a stable kernel, the WAN interface driver would defer probe indefinitely (since it would wait for the turris-omnia-mcu driver which would not be present). Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn Signed-off-by: Gregory CLEMENT --- .../boot/dts/marvell/armada-385-turris-omnia.dts | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 7b755bb4e4e7..59079d63fe27 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -218,7 +218,22 @@ #size-cells = <0>; reg = <0>; - /* STM32F0 command interface at address 0x2a */ + mcu: system-controller@2a { + compatible = "cznic,turris-omnia-mcu"; + reg = <0x2a>; + + pinctrl-names = "default"; + pinctrl-0 = <&mcu_pins>; + + interrupt-parent = <&gpio1>; + interrupts = <11 IRQ_TYPE_NONE>; + + gpio-controller; + #gpio-cells = <3>; + + interrupt-controller; + #interrupt-cells = <2>; + }; led-controller@2b { compatible = "cznic,turris-omnia-leds"; @@ -501,6 +516,11 @@ }; &pinctrl { + mcu_pins: mcu-pins { + marvell,pins = "mpp43"; + marvell,function = "gpio"; + }; + pcawan_pins: pcawan-pins { marvell,pins = "mpp46"; marvell,function = "gpio"; -- cgit From 731daaa5093d5c93c3b46dfbe46970cc52e15335 Mon Sep 17 00:00:00 2001 From: Marek Behún Date: Mon, 1 Jul 2024 13:30:10 +0200 Subject: ARM: dts: turris-omnia: Add GPIO key node for front button MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Now that we have the MCU device-tree node, which acts as a GPIO controller, add GPIO key node for the front button. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 59079d63fe27..43202890c959 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -112,6 +112,19 @@ status = "disabled"; }; + gpio-keys { + compatible = "gpio-keys"; + + front-button { + label = "Front Button"; + linux,code = ; + linux,can-disable; + gpios = <&mcu 0 12 GPIO_ACTIVE_HIGH>; + /* debouncing is done by the microcontroller */ + debounce-interval = <0>; + }; + }; + sound { compatible = "simple-audio-card"; simple-audio-card,name = "SPDIF"; -- cgit From c1842643a3df6004d1bc9df74e34d8b72997d886 Mon Sep 17 00:00:00 2001 From: David Heidelberg Date: Sat, 6 Jul 2024 15:00:30 -0700 Subject: ARM: dts: qcom: msm8960: correct memory base DeviceTree validation requires a unit address on the memory node, adjust the base to match [Ref] and use this as unit address. The bootloader will update the information with the actual values during boot. Ref: https://github.com/msm8916-mainline/lk2nd/blob/main/target/msm8960/rules.mk Reviewed-by: Dmitry Baryshkov Signed-off-by: David Heidelberg Link: https://lore.kernel.org/r/20240706220041.241839-1-david@ixit.cz Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi index a9c6d2dbb460..ebc43c5c6e5f 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -47,9 +47,9 @@ }; }; - memory { + memory@80000000 { device_type = "memory"; - reg = <0x0 0x0>; + reg = <0x80000000 0>; }; cpu-pmu { -- cgit From 8b5d415c4f9cc5a147c791d0300ee0b0cd8deae0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 3 Jul 2024 15:23:41 +0200 Subject: ARM: dts: ixp4xx: nslu2: beeper uses PWM The beeper in the NSLU2 is just a GPIO connected to a speaker, so we need to use PWM on the GPIO to get any kind of sound out. Tested with some random beeps by enabling INPUT_EVDEV and running beep.c with e.g. beep 400 for a 400 Hz tone. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/20240627-ixp4xx-dts-v1-1-cdbbe1150873@linaro.org Link: https://lore.kernel.org/r/20240703-ixp4xx-dts-v1-1-e5149da36f6e@linaro.org Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts index 2eec5f63d399..2f7c34c649ea 100644 --- a/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts +++ b/arch/arm/boot/dts/intel/ixp/intel-ixp42x-linksys-nslu2.dts @@ -90,11 +90,18 @@ timeout-ms = <5000>; }; - gpio-beeper { - compatible = "gpio-beeper"; + gpio_pwm: pwm { + #pwm-cells = <3>; + compatible = "pwm-gpio"; gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>; }; + beeper { + compatible = "pwm-beeper"; + pwms = <&gpio_pwm 0 1 0>; + beeper-hz = <1000>; + }; + soc { bus@c4000000 { /* The first 16MB region at CS0 on the expansion bus */ -- cgit