From 6adc521e7127732512ebd7fcfd3926d7970a82e1 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 30 Mar 2011 02:54:33 -0400 Subject: Blackfin: unify core IRQ definitions Start a new common IRQ header and move all of the CEC pieces there. This lets the individual part headers worry just about its SIC defines. Signed-off-by: Mike Frysinger --- arch/blackfin/mach-bf537/include/mach/irq.h | 39 +---------------------------- 1 file changed, 1 insertion(+), 38 deletions(-) (limited to 'arch/blackfin/mach-bf537') diff --git a/arch/blackfin/mach-bf537/include/mach/irq.h b/arch/blackfin/mach-bf537/include/mach/irq.h index 1a6d617c5fcf..2a8194eadb4c 100644 --- a/arch/blackfin/mach-bf537/include/mach/irq.h +++ b/arch/blackfin/mach-bf537/include/mach/irq.h @@ -7,37 +7,11 @@ #ifndef _BF537_IRQ_H_ #define _BF537_IRQ_H_ -/* - * Interrupt source definitions - * Event Source Core Event Name - * Core Emulation ** - * Events (highest priority) EMU 0 - * Reset RST 1 - * NMI NMI 2 - * Exception EVX 3 - * Reserved -- 4 - * Hardware Error IVHW 5 - * Core Timer IVTMR 6 - * ..... - * - * Softirq IVG14 - * System Call -- - * (lowest priority) IVG15 - */ +#include #define SYS_IRQS 39 #define NR_PERI_INTS 32 -/* The ABSTRACT IRQ definitions */ -/** the first seven of the following are fixed, the rest you change if you need to **/ -#define IRQ_EMU 0 /*Emulation */ -#define IRQ_RST 1 /*reset */ -#define IRQ_NMI 2 /*Non Maskable */ -#define IRQ_EVX 3 /*Exception */ -#define IRQ_UNUSED 4 /*- unused interrupt*/ -#define IRQ_HWERR 5 /*Hardware Error */ -#define IRQ_CORETMR 6 /*Core timer */ - #define IRQ_PLL_WAKEUP 7 /*PLL Wakeup Interrupt */ #define IRQ_DMA_ERROR 8 /*DMA Error (general) */ #define IRQ_GENERIC_ERROR 9 /*GENERIC Error Interrupt */ @@ -144,17 +118,6 @@ #define IRQ_MAC_STMDONE 105 /* Station Mgt. Transfer Done Interrupt */ #define NR_MACH_IRQS (IRQ_MAC_STMDONE + 1) -#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) - -#define IVG7 7 -#define IVG8 8 -#define IVG9 9 -#define IVG10 10 -#define IVG11 11 -#define IVG12 12 -#define IVG13 13 -#define IVG14 14 -#define IVG15 15 /* IAR0 BIT FIELDS*/ #define IRQ_PLL_WAKEUP_POS 0 -- cgit