From edfb6d5f1a05627204d1640ba527312dc8ea745a Mon Sep 17 00:00:00 2001 From: Rabin Vincent Date: Mon, 9 Mar 2015 18:48:25 +0100 Subject: CRISv32: use MMIO clocksource Use a generic MMIO clocksource and get rid of some lines of code. Signed-off-by: Rabin Vincent Signed-off-by: Jesper Nilsson --- arch/cris/arch-v32/kernel/time.c | 25 ++++--------------------- 1 file changed, 4 insertions(+), 21 deletions(-) (limited to 'arch/cris/arch-v32/kernel/time.c') diff --git a/arch/cris/arch-v32/kernel/time.c b/arch/cris/arch-v32/kernel/time.c index 77e241d6fa3d..7c802121c0c3 100644 --- a/arch/cris/arch-v32/kernel/time.c +++ b/arch/cris/arch-v32/kernel/time.c @@ -39,27 +39,6 @@ #define CRISV32_TIMER_FREQ (100000000lu) -/* Register the continuos readonly timer available in FS and ARTPEC-3. */ -static cycle_t read_cont_rotime(struct clocksource *cs) -{ - return (u32)REG_RD(timer, regi_timer0, r_time); -} - -static struct clocksource cont_rotime = { - .name = "crisv32_rotime", - .rating = 300, - .read = read_cont_rotime, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -static int __init etrax_init_cont_rotime(void) -{ - clocksource_register_khz(&cont_rotime, 100000); - return 0; -} -arch_initcall(etrax_init_cont_rotime); - unsigned long timer_regs[NR_CPUS] = { regi_timer0, @@ -296,6 +275,10 @@ void __init time_init(void) crisv32_timer_init(); + clocksource_mmio_init(timer_base + REG_RD_ADDR_timer_r_time, + "crisv32-timer", CRISV32_TIMER_FREQ, + 300, 32, clocksource_mmio_readl_up); + crisv32_clockevent.cpumask = cpu_possible_mask; crisv32_clockevent.irq = irq; -- cgit