From dd8314739a1ff8ed081d3a06f5f87045f7384636 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Wed, 22 Feb 2023 13:24:22 +0000 Subject: MIPS: Remove DMA_PERDEV_COHERENT MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As now we are always managing DMA coherence on per dev bias, there is no need to have such option. And it's not selected by any platform. Signed-off-by: Jiaxun Yang Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 5 ----- 1 file changed, 5 deletions(-) (limited to 'arch/mips/Kconfig') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 37072e15b263..a1170f0a0c04 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1080,11 +1080,6 @@ config FW_CFE config ARCH_SUPPORTS_UPROBES bool -config DMA_PERDEV_COHERENT - bool - select ARCH_HAS_SETUP_DMA_OPS - select DMA_NONCOHERENT - config DMA_NONCOHERENT bool # -- cgit From f2b95d7a9fa43bd72d442a9df01e29274b1769b2 Mon Sep 17 00:00:00 2001 From: Arınç ÜNAL Date: Tue, 21 Feb 2023 12:24:34 +0300 Subject: mips: remove SYS_HAS_CPU_MIPS32_R1 from RALINK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All MIPS processors on the Ralink SoCs implement the MIPS32 Release 2 Architecture. Remove SYS_HAS_CPU_MIPS32_R1. Signed-off-by: Arınç ÜNAL Acked-by: Sergio Paracuellos Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/mips/Kconfig') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a1170f0a0c04..875c29246555 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -610,7 +610,6 @@ config RALINK select DMA_NONCOHERENT select IRQ_MIPS_CPU select USE_OF - select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN -- cgit From 1a2c73f4834dd79e4f2c590ac75358fb44137650 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 28 Feb 2023 19:34:59 +0000 Subject: MIPS: Workaround clang inline compat branch issue Clang is unable to handle the situation that a chunk of inline assembly ends with a compat branch instruction and then compiler generates another control transfer instruction immediately after this compat branch. The later instruction will end up in forbidden slot and cause exception. Workaround by add a option to control the use of compact branch. Currently it's selected by CC_IS_CLANG and hopefully we can change it to a version check in future if clang manages to fix it. Fix boot on boston board. Link: https://github.com/llvm/llvm-project/issues/61045 Signed-off-by: Jiaxun Yang Acked-by: Nathan Chancellor Acked-by: Nick Desaulniers Signed-off-by: Thomas Bogendoerfer --- arch/mips/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/mips/Kconfig') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 875c29246555..e2f3ca73f40d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -3200,6 +3200,10 @@ config CC_HAS_MNO_BRANCH_LIKELY def_bool y depends on $(cc-option,-mno-branch-likely) +# https://github.com/llvm/llvm-project/issues/61045 +config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH + def_bool y if CC_IS_CLANG + menu "Power management options" config ARCH_HIBERNATION_POSSIBLE -- cgit