From cfc8be04c36a1a6546b6f9cb8f02fd9f215c9d38 Mon Sep 17 00:00:00 2001
From: Jaedon Shin <jaedon.shin@gmail.com>
Date: Fri, 19 Aug 2016 11:52:29 +0900
Subject: MIPS: BMIPS: Add support NAND device nodes

Adds NAND device nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14003/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
 arch/mips/boot/dts/brcm/bcm7362.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

(limited to 'arch/mips/boot/dts/brcm/bcm7362.dtsi')

diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index ff734f45df92..784d58725227 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -287,6 +287,26 @@
 			status = "disabled";
 		};
 
+		hif_l2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+		};
+
+		nand: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_l2_intc>;
+			interrupts = <24>;
+			status = "disabled";
+		};
+
 		sata: sata@181000 {
 			compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
 			reg-names = "ahci", "top-ctrl";
-- 
cgit