From 802b83627f54d63d3d95d0285ec9a5d80be434c0 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Mon, 24 Aug 2020 18:32:43 +0200 Subject: MIPS: Convert R4600_V1_INDEX_ICACHEOP into a config option Use a new config option to enable R4600 V1 index I-cacheop workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/mach-ip30/war.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/mips/include/asm/mach-ip30/war.h') diff --git a/arch/mips/include/asm/mach-ip30/war.h b/arch/mips/include/asm/mach-ip30/war.h index a1fa0c1f5300..9f5c3305674c 100644 --- a/arch/mips/include/asm/mach-ip30/war.h +++ b/arch/mips/include/asm/mach-ip30/war.h @@ -5,7 +5,6 @@ #ifndef __ASM_MIPS_MACH_IP30_WAR_H #define __ASM_MIPS_MACH_IP30_WAR_H -#define R4600_V1_INDEX_ICACHEOP_WAR 0 #define R4600_V1_HIT_CACHEOP_WAR 0 #define R4600_V2_HIT_CACHEOP_WAR 0 #define BCM1250_M3_WAR 0 -- cgit