From c4a987db1b3cd89207cece4b8121c09cbfbc978a Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Fri, 21 Mar 2014 18:44:09 +0800 Subject: MIPS: Loongson 3: Add CPU hotplug support Tips of Loongson's CPU hotplug: 1, To fully shutdown a core in Loongson 3, the target core should go to CKSEG1 and flush all L1 cache entries at first. Then, another core (usually Core 0) can safely disable the clock of the target core. So play_dead() call loongson3_play_dead() via CKSEG1 (both uncached and unmmaped). 2, The default clocksource of Loongson is MIPS. Since clock source is a global device, timekeeping need the CP0' Count registers of each core be synchronous. Thus, when a core is up, we use a SMP_ASK_C0COUNT IPI to ask Core-0's Count. Signed-off-by: Huacai Chen Signed-off-by: Hongliang Tao Signed-off-by: Hua Yan Tested-by: Alex Smith Reviewed-by: Alex Smith Cc: John Crispin Cc: Steven J. Hill Cc: Aurelien Jarno Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang Cc: Zhangjin Wu Patchwork: https://patchwork.linux-mips.org/patch/6639 Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mach-loongson/irq.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips/include/asm/mach-loongson/irq.h') diff --git a/arch/mips/include/asm/mach-loongson/irq.h b/arch/mips/include/asm/mach-loongson/irq.h index 0c77b22a6630..34560bda6626 100644 --- a/arch/mips/include/asm/mach-loongson/irq.h +++ b/arch/mips/include/asm/mach-loongson/irq.h @@ -37,6 +37,7 @@ #endif +extern void fixup_irqs(void); extern void loongson3_ipi_interrupt(struct pt_regs *regs); #include_next -- cgit