From fcecdcd388ea6725ceb66bb3c71f947f98f50966 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Wed, 25 Mar 2020 11:55:03 +0800 Subject: MIPS: Loongson64: Load built-in dtbs Load proper dtb according to firmware passed parameters and CPU PRID. Signed-off-by: Jiaxun Yang Co-developed-by: Huacai Chen Signed-off-by: Huacai Chen Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/mach-loongson64/loongson.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips/include/asm/mach-loongson64/loongson.h') diff --git a/arch/mips/include/asm/mach-loongson64/loongson.h b/arch/mips/include/asm/mach-loongson64/loongson.h index a8fce112a9b0..fde1b75c45ea 100644 --- a/arch/mips/include/asm/mach-loongson64/loongson.h +++ b/arch/mips/include/asm/mach-loongson64/loongson.h @@ -25,6 +25,7 @@ extern const struct plat_smp_ops loongson3_smp_ops; /* loongson-specific command line, env and memory initialization */ extern void __init prom_init_memory(void); extern void __init prom_init_env(void); +extern void *loongson_fdt_blob; /* irq operation functions */ extern void mach_irq_dispatch(unsigned int pending); -- cgit