From 3b2e7c7c83873f4c073d501c2fff80518e264240 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 4 Jan 2016 20:24:00 +0100 Subject: MIPS: ralink: Add a few missing clocks Signed-off-by: John Crispin Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11995/ Signed-off-by: Ralf Baechle --- arch/mips/ralink/mt7620.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/mips/ralink/mt7620.c') diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index da01e1f904b4..0d3d1a97895f 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -456,7 +456,10 @@ void __init ralink_clk_init(void) ralink_clk_add("10000100.timer", periph_rate); ralink_clk_add("10000120.watchdog", periph_rate); ralink_clk_add("10000b00.spi", sys_rate); + ralink_clk_add("10000b40.spi", sys_rate); ralink_clk_add("10000c00.uartlite", periph_rate); + ralink_clk_add("10000d00.uart1", periph_rate); + ralink_clk_add("10000e00.uart2", periph_rate); ralink_clk_add("10180000.wmac", xtal_rate); if (IS_ENABLED(CONFIG_USB) && !is_mt76x8()) { -- cgit