From dd0bc75ee3ec4ef694c2d0483b6ffeed17141435 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 14 Jul 2015 21:41:12 +0200 Subject: MIPS: SB1: Remove support for Pass 1 parts. Pass 1 parts had a number of significant erratas and were only available in small numbers and under NDA. Full support also required the use of a special toolchain that kept branches properly aligned. These workarounds were never upstreamed and the only toolchain known to have them is Montavista's GCC 3.0-based toolchain which completly obsoleted if not useless these days. So now that automated testing has tripped over the user of the -msb1-pass1-workarounds option, rather than fixing it remove support for pass 1 parts. Probably nobody will notice. I seem to own the last know pass 1 board and I haven't noticed another one in the wild in the past decade, at least. Signed-off-by: Ralf Baechle --- arch/mips/sibyte/Kconfig | 5 ----- arch/mips/sibyte/common/bus_watcher.c | 5 +---- arch/mips/sibyte/sb1250/setup.c | 2 -- 3 files changed, 1 insertion(+), 11 deletions(-) (limited to 'arch/mips/sibyte') diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig index a8bb972fd9fd..cb9a095f5c5e 100644 --- a/arch/mips/sibyte/Kconfig +++ b/arch/mips/sibyte/Kconfig @@ -81,11 +81,6 @@ choice prompt "SiByte SOC Stepping" depends on SIBYTE_SB1xxx_SOC -config CPU_SB1_PASS_1 - bool "1250 Pass1" - depends on SIBYTE_SB1250 - select CPU_HAS_PREFETCH - config CPU_SB1_PASS_2_1250 bool "1250 An" depends on SIBYTE_SB1250 diff --git a/arch/mips/sibyte/common/bus_watcher.c b/arch/mips/sibyte/common/bus_watcher.c index 5581844c9194..41a1d2242211 100644 --- a/arch/mips/sibyte/common/bus_watcher.c +++ b/arch/mips/sibyte/common/bus_watcher.c @@ -81,10 +81,7 @@ void check_bus_watcher(void) { u32 status, l2_err, memio_err; -#ifdef CONFIG_SB1_PASS_1_WORKAROUNDS - /* Destructive read, clears register and interrupt */ - status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); -#elif defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) +#if defined(CONFIG_SIBYTE_BCM112X) || defined(CONFIG_SIBYTE_SB1250) /* Use non-destructive register */ status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); #elif defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80) diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c index 3c02b2a77ae9..9d3c24efdf4a 100644 --- a/arch/mips/sibyte/sb1250/setup.c +++ b/arch/mips/sibyte/sb1250/setup.c @@ -202,12 +202,10 @@ void __init sb1250_setup(void) switch (war_pass) { case K_SYS_REVISION_BCM1250_PASS1: -#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " "and the kernel doesn't have the proper " "workarounds compiled in. @@@@\n"); bad_config = 1; -#endif break; case K_SYS_REVISION_BCM1250_PASS2: /* Pass 2 - easiest as default for now - so many numbers */ -- cgit