From 5dd671333171d1ba44c16e1404f72788412e36f4 Mon Sep 17 00:00:00 2001 From: Palmer Dabbelt Date: Fri, 22 Jan 2021 19:34:29 -0800 Subject: RISC-V: probes: Treat the instruction stream as host-endian Neither of these are actually correct: the instruction stream is defined (for versions of the ISA manual newer than 2.2) as a stream of 16-bit little-endian parcels, which is different than just being little-endian. In theory we should represent this as a type, but we don't have any concrete plans for the big endian stuff so it doesn't seem worth the time -- we've got variants of this all over the place. Instead I'm just dropping the unnecessary type conversion, which is a NOP on LE systems but causes an sparse error as the types are all mixed up. Reported-by: kernel test robot Signed-off-by: Palmer Dabbelt Acked-by: Guo Ren Signed-off-by: Palmer Dabbelt --- arch/riscv/kernel/probes/decode-insn.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/riscv/kernel/probes/decode-insn.c') diff --git a/arch/riscv/kernel/probes/decode-insn.c b/arch/riscv/kernel/probes/decode-insn.c index 0876c304ca77..0ed043acc882 100644 --- a/arch/riscv/kernel/probes/decode-insn.c +++ b/arch/riscv/kernel/probes/decode-insn.c @@ -16,7 +16,7 @@ enum probe_insn __kprobes riscv_probe_decode_insn(probe_opcode_t *addr, struct arch_probe_insn *api) { - probe_opcode_t insn = le32_to_cpu(*addr); + probe_opcode_t insn = *addr; /* * Reject instructions list: -- cgit