From a35707c3d850dda0ceefb75b1b3bd191921d5765 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 11 May 2022 21:29:21 +0200 Subject: riscv: add memory-type errata for T-Head Some current cpus based on T-Head cores implement memory-types way different than described in the svpbmt spec even going so far as using PTE bits marked as reserved. Add the T-Head vendor-id and necessary errata code to replace the affected instructions. Signed-off-by: Heiko Stuebner Tested-by: Samuel Holland Link: https://lore.kernel.org/r/20220511192921.2223629-13-heiko@sntech.de Signed-off-by: Palmer Dabbelt --- arch/riscv/kernel/Makefile | 14 ++++++++++++++ arch/riscv/kernel/alternative.c | 26 ++++++++++++++++++++++++++ arch/riscv/kernel/cpufeature.c | 7 ++++++- 3 files changed, 46 insertions(+), 1 deletion(-) (limited to 'arch/riscv/kernel') diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index 0f8348ac30f1..bf3876a77ed7 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -14,6 +14,20 @@ ifdef CONFIG_KEXEC AFLAGS_kexec_relocate.o := -mcmodel=medany $(call cc-option,-mno-relax) endif +# cmodel=medany and notrace when patching early +ifdef CONFIG_RISCV_ALTERNATIVE_EARLY +CFLAGS_alternative.o := -mcmodel=medany +CFLAGS_cpufeature.o := -mcmodel=medany +ifdef CONFIG_FTRACE +CFLAGS_REMOVE_alternative.o = $(CC_FLAGS_FTRACE) +CFLAGS_REMOVE_cpufeature.o = $(CC_FLAGS_FTRACE) +endif +ifdef CONFIG_KASAN +KASAN_SANITIZE_alternative.o := n +KASAN_SANITIZE_cpufeature.o := n +endif +endif + extra-y += head.o extra-y += vmlinux.lds diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c index 27f722ae452b..c9d0d3c53223 100644 --- a/arch/riscv/kernel/alternative.c +++ b/arch/riscv/kernel/alternative.c @@ -42,6 +42,11 @@ static void __init_or_module riscv_fill_cpu_mfr_info(struct cpu_manufacturer_inf case SIFIVE_VENDOR_ID: cpu_mfr_info->vendor_patch_func = sifive_errata_patch_func; break; +#endif +#ifdef CONFIG_ERRATA_THEAD + case THEAD_VENDOR_ID: + cpu_mfr_info->vendor_patch_func = thead_errata_patch_func; + break; #endif default: cpu_mfr_info->vendor_patch_func = NULL; @@ -82,6 +87,27 @@ void __init apply_boot_alternatives(void) RISCV_ALTERNATIVES_BOOT); } +/* + * apply_early_boot_alternatives() is called from setup_vm() with MMU-off. + * + * Following requirements should be honoured for it to work correctly: + * 1) It should use PC-relative addressing for accessing kernel symbols. + * To achieve this we always use GCC cmodel=medany. + * 2) The compiler instrumentation for FTRACE will not work for setup_vm() + * so disable compiler instrumentation when FTRACE is enabled. + * + * Currently, the above requirements are honoured by using custom CFLAGS + * for alternative.o in kernel/Makefile. + */ +void __init apply_early_boot_alternatives(void) +{ +#ifdef CONFIG_RISCV_ALTERNATIVE_EARLY + _apply_alternatives((struct alt_entry *)__alt_start, + (struct alt_entry *)__alt_end, + RISCV_ALTERNATIVES_EARLY_BOOT); +#endif +} + #ifdef CONFIG_MODULES void apply_module_alternatives(void *start, size_t length) { diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index f514b949c6a7..dea3ea19deee 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -254,7 +254,12 @@ struct cpufeature_info { static bool __init_or_module cpufeature_svpbmt_check_func(unsigned int stage) { #ifdef CONFIG_RISCV_ISA_SVPBMT - return riscv_isa_extension_available(NULL, SVPBMT); + switch (stage) { + case RISCV_ALTERNATIVES_EARLY_BOOT: + return false; + default: + return riscv_isa_extension_available(NULL, SVPBMT); + } #endif return false; -- cgit