From b6a32f023fcc9cbd1602f78a467fd8d41bbc9457 Mon Sep 17 00:00:00 2001 From: Jiri Olsa Date: Thu, 18 Aug 2016 11:09:52 +0200 Subject: perf/x86: Fix PEBS threshold initialization Latest PEBS rework change could skip initialization of the ds->pebs_interrupt_threshold for single event PEBS threshold events. Make sure the PEBS threshold gets always initialized. Signed-off-by: Jiri Olsa Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Peter Zijlstra Cc: Thomas Gleixner Fixes: 09e61b4f7849 ("perf/x86/intel: Rework the large PEBS setup code") Link: http://lkml.kernel.org/r/1471511392-29875-1-git-send-email-jolsa@kernel.org Signed-off-by: Ingo Molnar --- arch/x86/events/intel/ds.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'arch/x86/events/intel/ds.c') diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 248023f54c87..e0288d555367 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -834,14 +834,24 @@ static inline void pebs_update_threshold(struct cpu_hw_events *cpuc) static void pebs_update_state(bool needed_cb, struct cpu_hw_events *cpuc, struct pmu *pmu) { + /* + * Make sure we get updated with the first PEBS + * event. It will trigger also during removal, but + * that does not hurt: + */ + bool update = cpuc->n_pebs == 1; + if (needed_cb != pebs_needs_sched_cb(cpuc)) { if (!needed_cb) perf_sched_cb_inc(pmu); else perf_sched_cb_dec(pmu); - pebs_update_threshold(cpuc); + update = true; } + + if (update) + pebs_update_threshold(cpuc); } void intel_pmu_pebs_add(struct perf_event *event) -- cgit