From bc5378fcba974317f9657c4fdc78af227e1e1068 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Mon, 15 Oct 2012 03:55:38 +0400 Subject: xtensa: reorganize SR referencing - reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: Max Filippov Signed-off-by: Chris Zankel --- arch/xtensa/include/asm/cmpxchg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/xtensa/include/asm/cmpxchg.h') diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cmpxchg.h index e32149063d83..64dad04a9d27 100644 --- a/arch/xtensa/include/asm/cmpxchg.h +++ b/arch/xtensa/include/asm/cmpxchg.h @@ -27,7 +27,7 @@ __cmpxchg_u32(volatile int *p, int old, int new) "bne %0, %2, 1f \n\t" "s32i %3, %1, 0 \n\t" "1: \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n\t" : "=&a" (old) : "a" (p), "a" (old), "r" (new) @@ -97,7 +97,7 @@ static inline unsigned long xchg_u32(volatile int * m, unsigned long val) __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" "l32i %0, %1, 0 \n\t" "s32i %2, %1, 0 \n\t" - "wsr a15, "__stringify(PS)" \n\t" + "wsr a15, ps \n\t" "rsync \n\t" : "=&a" (tmp) : "a" (m), "a" (val) -- cgit